imxusb.c revision 1.1.6.2 1 1.1.6.2 rmind /* $NetBSD: imxusb.c,v 1.1.6.2 2011/03/05 20:49:35 rmind Exp $ */
2 1.1.6.2 rmind /*
3 1.1.6.2 rmind * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
4 1.1.6.2 rmind * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
5 1.1.6.2 rmind *
6 1.1.6.2 rmind * Redistribution and use in source and binary forms, with or without
7 1.1.6.2 rmind * modification, are permitted provided that the following conditions
8 1.1.6.2 rmind * are met:
9 1.1.6.2 rmind * 1. Redistributions of source code must retain the above copyright
10 1.1.6.2 rmind * notice, this list of conditions and the following disclaimer.
11 1.1.6.2 rmind * 2. Redistributions in binary form must reproduce the above copyright
12 1.1.6.2 rmind * notice, this list of conditions and the following disclaimer in the
13 1.1.6.2 rmind * documentation and/or other materials provided with the distribution.
14 1.1.6.2 rmind *
15 1.1.6.2 rmind * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
16 1.1.6.2 rmind * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17 1.1.6.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18 1.1.6.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
19 1.1.6.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 1.1.6.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 1.1.6.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 1.1.6.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 1.1.6.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 1.1.6.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 1.1.6.2 rmind * POSSIBILITY OF SUCH DAMAGE.
26 1.1.6.2 rmind */
27 1.1.6.2 rmind #include <sys/cdefs.h>
28 1.1.6.2 rmind __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.1.6.2 2011/03/05 20:49:35 rmind Exp $");
29 1.1.6.2 rmind
30 1.1.6.2 rmind #include <sys/param.h>
31 1.1.6.2 rmind #include <sys/systm.h>
32 1.1.6.2 rmind #include <sys/conf.h>
33 1.1.6.2 rmind #include <sys/kernel.h>
34 1.1.6.2 rmind #include <sys/device.h>
35 1.1.6.2 rmind #include <sys/intr.h>
36 1.1.6.2 rmind #include <sys/bus.h>
37 1.1.6.2 rmind
38 1.1.6.2 rmind #include <dev/usb/usb.h>
39 1.1.6.2 rmind #include <dev/usb/usbdi.h>
40 1.1.6.2 rmind #include <dev/usb/usbdivar.h>
41 1.1.6.2 rmind #include <dev/usb/usb_mem.h>
42 1.1.6.2 rmind
43 1.1.6.2 rmind #include <dev/usb/ehcireg.h>
44 1.1.6.2 rmind #include <dev/usb/ehcivar.h>
45 1.1.6.2 rmind
46 1.1.6.2 rmind #include <arm/imx/imxusbreg.h>
47 1.1.6.2 rmind #include <arm/imx/imxusbvar.h>
48 1.1.6.2 rmind #include <arm/imx/imxgpiovar.h>
49 1.1.6.2 rmind #include "locators.h"
50 1.1.6.2 rmind
51 1.1.6.2 rmind #include <dev/usb/ulpireg.h> /* for test */
52 1.1.6.2 rmind
53 1.1.6.2 rmind static int imxehci_match(device_t, cfdata_t, void *);
54 1.1.6.2 rmind static void imxehci_attach(device_t, device_t, void *);
55 1.1.6.2 rmind
56 1.1.6.2 rmind uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
57 1.1.6.2 rmind void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
58 1.1.6.2 rmind static void ulpi_reset(struct imxehci_softc *sc);
59 1.1.6.2 rmind
60 1.1.6.2 rmind
61 1.1.6.2 rmind
62 1.1.6.2 rmind /* attach structures */
63 1.1.6.2 rmind CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
64 1.1.6.2 rmind imxehci_match, imxehci_attach, NULL, NULL);
65 1.1.6.2 rmind
66 1.1.6.2 rmind static int
67 1.1.6.2 rmind imxehci_match(device_t parent, cfdata_t cf, void *aux)
68 1.1.6.2 rmind {
69 1.1.6.2 rmind struct imxusbc_attach_args *aa = aux;
70 1.1.6.2 rmind
71 1.1.6.2 rmind if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
72 1.1.6.2 rmind return 0;
73 1.1.6.2 rmind }
74 1.1.6.2 rmind
75 1.1.6.2 rmind return 1;
76 1.1.6.2 rmind }
77 1.1.6.2 rmind
78 1.1.6.2 rmind static void
79 1.1.6.2 rmind imxehci_attach(device_t parent, device_t self, void *aux)
80 1.1.6.2 rmind {
81 1.1.6.2 rmind struct imxusbc_attach_args *aa = aux;
82 1.1.6.2 rmind struct imxusbc_softc *usbc = device_private(parent);
83 1.1.6.2 rmind struct imxehci_softc *sc = device_private(self);
84 1.1.6.2 rmind ehci_softc_t *hsc = &sc->sc_hsc;
85 1.1.6.2 rmind bus_space_tag_t iot;
86 1.1.6.2 rmind uint16_t hcirev;
87 1.1.6.2 rmind usbd_status r;
88 1.1.6.2 rmind uint32_t id, hwhost, hwdevice;
89 1.1.6.2 rmind const char *comma;
90 1.1.6.2 rmind
91 1.1.6.2 rmind sc->sc_hsc.sc_dev = self;
92 1.1.6.2 rmind iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot;
93 1.1.6.2 rmind sc->sc_unit = aa->aa_unit;
94 1.1.6.2 rmind sc->sc_usbc = usbc;
95 1.1.6.2 rmind hsc->sc_bus.hci_private = sc;
96 1.1.6.2 rmind
97 1.1.6.2 rmind aprint_normal("\n");
98 1.1.6.2 rmind
99 1.1.6.2 rmind /* per unit registers */
100 1.1.6.2 rmind if (bus_space_subregion(iot, aa->aa_ioh,
101 1.1.6.2 rmind aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
102 1.1.6.2 rmind &sc->sc_ioh) ||
103 1.1.6.2 rmind bus_space_subregion(iot, aa->aa_ioh,
104 1.1.6.2 rmind aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS,
105 1.1.6.2 rmind IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS,
106 1.1.6.2 rmind &sc->sc_hsc.ioh)) {
107 1.1.6.2 rmind
108 1.1.6.2 rmind aprint_error_dev(self, "can't subregion\n");
109 1.1.6.2 rmind return;
110 1.1.6.2 rmind }
111 1.1.6.2 rmind
112 1.1.6.2 rmind id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
113 1.1.6.2 rmind hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
114 1.1.6.2 rmind
115 1.1.6.2 rmind aprint_normal_dev(self,
116 1.1.6.2 rmind "i.MX USB Controller id=%d revision=%d HCI revision=0x%x\n",
117 1.1.6.2 rmind id & (uint32_t)IMXUSB_ID_ID_MASK,
118 1.1.6.2 rmind (id & (uint32_t)IMXUSB_ID_REVISION_MASK) >>
119 1.1.6.2 rmind IMXUSB_ID_REVISION_SHIFT,
120 1.1.6.2 rmind hcirev);
121 1.1.6.2 rmind
122 1.1.6.2 rmind hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
123 1.1.6.2 rmind hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
124 1.1.6.2 rmind
125 1.1.6.2 rmind aprint_normal_dev(self, "");
126 1.1.6.2 rmind
127 1.1.6.2 rmind comma = "";
128 1.1.6.2 rmind if (hwhost & HWHOST_HC) {
129 1.1.6.2 rmind int n_ports = 1 + ((hwhost & HWHOST_NPORT_MASK) >>
130 1.1.6.2 rmind HWHOST_NPORT_SHIFT);
131 1.1.6.2 rmind aprint_normal("%d host port%s",
132 1.1.6.2 rmind n_ports, n_ports > 1 ? "s" : "");
133 1.1.6.2 rmind comma = ", ";
134 1.1.6.2 rmind }
135 1.1.6.2 rmind
136 1.1.6.2 rmind if (hwdevice & HWDEVICE_DC) {
137 1.1.6.2 rmind int n_endpoints = (hwdevice & HWDEVICE_DEVEP_MASK) >>
138 1.1.6.2 rmind HWDEVICE_DEVEP_SHIFT;
139 1.1.6.2 rmind aprint_normal("%sdevice capable, %d endpoint%s",
140 1.1.6.2 rmind comma,
141 1.1.6.2 rmind n_endpoints, n_endpoints > 1 ? "s" : "");
142 1.1.6.2 rmind }
143 1.1.6.2 rmind aprint_normal("\n");
144 1.1.6.2 rmind
145 1.1.6.2 rmind sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
146 1.1.6.2 rmind
147 1.1.6.2 rmind sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
148 1.1.6.2 rmind EHCI_CAPLENGTH);
149 1.1.6.2 rmind
150 1.1.6.2 rmind /* Platform dependent setup */
151 1.1.6.2 rmind if (usbc->sc_init_md_hook)
152 1.1.6.2 rmind usbc->sc_init_md_hook(sc);
153 1.1.6.2 rmind
154 1.1.6.2 rmind
155 1.1.6.2 rmind imxehci_reset(sc);
156 1.1.6.2 rmind imxehci_select_interface(sc, sc->sc_iftype);
157 1.1.6.2 rmind
158 1.1.6.2 rmind if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
159 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
160 1.1.6.2 rmind
161 1.1.6.2 rmind aprint_normal_dev(hsc->sc_dev,
162 1.1.6.2 rmind "ULPI phy VID 0x%04x PID 0x%04x\n",
163 1.1.6.2 rmind (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
164 1.1.6.2 rmind imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
165 1.1.6.2 rmind (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
166 1.1.6.2 rmind imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
167 1.1.6.2 rmind
168 1.1.6.2 rmind ulpi_reset(sc);
169 1.1.6.2 rmind
170 1.1.6.2 rmind }
171 1.1.6.2 rmind
172 1.1.6.2 rmind imxehci_host_mode(sc);
173 1.1.6.2 rmind
174 1.1.6.2 rmind if (usbc->sc_setup_md_hook)
175 1.1.6.2 rmind usbc->sc_setup_md_hook(sc, IMXUSB_HOST);
176 1.1.6.2 rmind else if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
177 1.1.6.2 rmind imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
178 1.1.6.2 rmind OTG_CONTROL_IDPULLUP);
179 1.1.6.2 rmind
180 1.1.6.2 rmind imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
181 1.1.6.2 rmind OTG_CONTROL_USEEXTVBUSIND |
182 1.1.6.2 rmind OTG_CONTROL_DRVVBUSEXT |
183 1.1.6.2 rmind OTG_CONTROL_DRVVBUS |
184 1.1.6.2 rmind OTG_CONTROL_CHRGVBUS
185 1.1.6.2 rmind );
186 1.1.6.2 rmind }
187 1.1.6.2 rmind
188 1.1.6.2 rmind /* Disable interrupts, so we don't get any spurious ones. */
189 1.1.6.2 rmind EOWRITE2(hsc, EHCI_USBINTR, 0);
190 1.1.6.2 rmind
191 1.1.6.2 rmind intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
192 1.1.6.2 rmind
193 1.1.6.2 rmind /* Figure out vendor for root hub descriptor. */
194 1.1.6.2 rmind strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor));
195 1.1.6.2 rmind
196 1.1.6.2 rmind r = ehci_init(hsc);
197 1.1.6.2 rmind if (r != USBD_NORMAL_COMPLETION) {
198 1.1.6.2 rmind aprint_error_dev(self, "init failed, error=%d\n", r);
199 1.1.6.2 rmind return;
200 1.1.6.2 rmind }
201 1.1.6.2 rmind
202 1.1.6.2 rmind /* Attach usb device. */
203 1.1.6.2 rmind hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint);
204 1.1.6.2 rmind }
205 1.1.6.2 rmind
206 1.1.6.2 rmind
207 1.1.6.2 rmind
208 1.1.6.2 rmind
209 1.1.6.2 rmind void
210 1.1.6.2 rmind imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
211 1.1.6.2 rmind {
212 1.1.6.2 rmind uint32_t reg;
213 1.1.6.2 rmind struct ehci_softc *hsc = &sc->sc_hsc;
214 1.1.6.2 rmind
215 1.1.6.2 rmind reg = EOREAD4(hsc, EHCI_PORTSC(1));
216 1.1.6.2 rmind reg = (reg & ~PORTSC_PTS_MASK) | (interface << PORTSC_PTS_SHIFT);
217 1.1.6.2 rmind EOWRITE4(hsc, EHCI_PORTSC(1), reg);
218 1.1.6.2 rmind }
219 1.1.6.2 rmind
220 1.1.6.2 rmind
221 1.1.6.2 rmind static uint32_t
222 1.1.6.2 rmind ulpi_wakeup(struct imxehci_softc *sc, int tout)
223 1.1.6.2 rmind {
224 1.1.6.2 rmind uint32_t ulpi_view;
225 1.1.6.2 rmind int i = 0;
226 1.1.6.2 rmind ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
227 1.1.6.2 rmind
228 1.1.6.2 rmind if ( !(ulpi_view & ULPI_SS) ) {
229 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh,
230 1.1.6.2 rmind IMXUSB_ULPIVIEW, ULPI_WU);
231 1.1.6.2 rmind for (i = 0; (tout < 0) || (i < tout); i++) {
232 1.1.6.2 rmind ulpi_view = bus_space_read_4(sc->sc_iot,
233 1.1.6.2 rmind sc->sc_ioh, IMXUSB_ULPIVIEW);
234 1.1.6.2 rmind if ( !(ulpi_view & ULPI_WU) )
235 1.1.6.2 rmind break;
236 1.1.6.2 rmind delay(1);
237 1.1.6.2 rmind };
238 1.1.6.2 rmind }
239 1.1.6.2 rmind
240 1.1.6.2 rmind if ((tout > 0) && (i >= tout)) {
241 1.1.6.2 rmind aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
242 1.1.6.2 rmind }
243 1.1.6.2 rmind
244 1.1.6.2 rmind return ulpi_view;
245 1.1.6.2 rmind }
246 1.1.6.2 rmind
247 1.1.6.2 rmind static uint32_t
248 1.1.6.2 rmind ulpi_wait(struct imxehci_softc *sc, int tout)
249 1.1.6.2 rmind {
250 1.1.6.2 rmind uint32_t ulpi_view;
251 1.1.6.2 rmind int i;
252 1.1.6.2 rmind ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
253 1.1.6.2 rmind
254 1.1.6.2 rmind for (i = 0; (tout < 0) | (i < tout); i++) {
255 1.1.6.2 rmind ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
256 1.1.6.2 rmind IMXUSB_ULPIVIEW);
257 1.1.6.2 rmind if (!(ulpi_view & ULPI_RUN))
258 1.1.6.2 rmind break;
259 1.1.6.2 rmind delay(1);
260 1.1.6.2 rmind }
261 1.1.6.2 rmind
262 1.1.6.2 rmind if ((tout > 0) && (i >= tout)) {
263 1.1.6.2 rmind aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
264 1.1.6.2 rmind }
265 1.1.6.2 rmind
266 1.1.6.2 rmind return ulpi_view;
267 1.1.6.2 rmind }
268 1.1.6.2 rmind
269 1.1.6.2 rmind #define TIMEOUT 100000
270 1.1.6.2 rmind
271 1.1.6.2 rmind uint8_t
272 1.1.6.2 rmind imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
273 1.1.6.2 rmind {
274 1.1.6.2 rmind uint32_t data;
275 1.1.6.2 rmind
276 1.1.6.2 rmind ulpi_wakeup(sc, TIMEOUT);
277 1.1.6.2 rmind
278 1.1.6.2 rmind data = ULPI_RUN | (addr << ULPI_ADDR_SHIFT);
279 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data);
280 1.1.6.2 rmind
281 1.1.6.2 rmind data = ulpi_wait(sc, TIMEOUT);
282 1.1.6.2 rmind
283 1.1.6.2 rmind return (data & ULPI_DATRD_MASK) >> ULPI_DATRD_SHIFT;
284 1.1.6.2 rmind }
285 1.1.6.2 rmind
286 1.1.6.2 rmind void
287 1.1.6.2 rmind imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
288 1.1.6.2 rmind {
289 1.1.6.2 rmind uint32_t reg;
290 1.1.6.2 rmind
291 1.1.6.2 rmind ulpi_wakeup(sc, TIMEOUT);
292 1.1.6.2 rmind
293 1.1.6.2 rmind reg = ULPI_RUN | ULPI_RW | ((addr) << ULPI_ADDR_SHIFT) | data;
294 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
295 1.1.6.2 rmind
296 1.1.6.2 rmind ulpi_wait(sc, TIMEOUT);
297 1.1.6.2 rmind
298 1.1.6.2 rmind return;
299 1.1.6.2 rmind }
300 1.1.6.2 rmind
301 1.1.6.2 rmind #if 0
302 1.1.6.2 rmind static int
303 1.1.6.2 rmind ulpi_scratch_test(struct imxehci_softc *sc)
304 1.1.6.2 rmind {
305 1.1.6.2 rmind uint32_t ulpi_view;
306 1.1.6.2 rmind
307 1.1.6.2 rmind ulpi_view = ulpi_wakeup(sc, 1000);
308 1.1.6.2 rmind if (ulpi_view & ULPI_WU) {
309 1.1.6.2 rmind return -1;
310 1.1.6.2 rmind }
311 1.1.6.2 rmind
312 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW,
313 1.1.6.2 rmind (ULPI_RUN | ULPI_RW |
314 1.1.6.2 rmind (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA));
315 1.1.6.2 rmind
316 1.1.6.2 rmind ulpi_view = ulpi_wait(sc, 1000);
317 1.1.6.2 rmind
318 1.1.6.2 rmind if (ulpi_view & ULPI_RUN) {
319 1.1.6.2 rmind return -1;
320 1.1.6.2 rmind }
321 1.1.6.2 rmind
322 1.1.6.2 rmind return 0;
323 1.1.6.2 rmind }
324 1.1.6.2 rmind #endif
325 1.1.6.2 rmind
326 1.1.6.2 rmind static void
327 1.1.6.2 rmind ulpi_reset(struct imxehci_softc *sc)
328 1.1.6.2 rmind {
329 1.1.6.2 rmind uint8_t data;
330 1.1.6.2 rmind int timo = 1000 * 1000; /* XXXX: 1sec */
331 1.1.6.2 rmind
332 1.1.6.2 rmind imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
333 1.1.6.2 rmind FUNCTION_CONTROL_RESET /*0x20*/);
334 1.1.6.2 rmind do {
335 1.1.6.2 rmind data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
336 1.1.6.2 rmind if (!(data & FUNCTION_CONTROL_RESET))
337 1.1.6.2 rmind break;
338 1.1.6.2 rmind delay(100);
339 1.1.6.2 rmind timo -= 100;
340 1.1.6.2 rmind } while (timo > 0);
341 1.1.6.2 rmind if (timo <= 0) {
342 1.1.6.2 rmind aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n",
343 1.1.6.2 rmind __func__);
344 1.1.6.2 rmind return;
345 1.1.6.2 rmind }
346 1.1.6.2 rmind
347 1.1.6.2 rmind return;
348 1.1.6.2 rmind }
349 1.1.6.2 rmind
350 1.1.6.2 rmind void
351 1.1.6.2 rmind imxehci_reset(struct imxehci_softc *sc)
352 1.1.6.2 rmind {
353 1.1.6.2 rmind u_int32_t reg;
354 1.1.6.2 rmind int i;
355 1.1.6.2 rmind struct ehci_softc *hsc = &sc->sc_hsc;
356 1.1.6.2 rmind #define RESET_TIMEOUT 100
357 1.1.6.2 rmind
358 1.1.6.2 rmind reg = EOREAD4(hsc, EHCI_USBCMD);
359 1.1.6.2 rmind reg &= ~EHCI_CMD_RS;
360 1.1.6.2 rmind EOWRITE4(hsc, EHCI_USBCMD, reg);
361 1.1.6.2 rmind
362 1.1.6.2 rmind for (i=0; i < RESET_TIMEOUT; ++i) {
363 1.1.6.2 rmind reg = EOREAD4(hsc, EHCI_USBCMD);
364 1.1.6.2 rmind if ((reg & EHCI_CMD_RS) == 0)
365 1.1.6.2 rmind break;
366 1.1.6.2 rmind usb_delay_ms(&hsc->sc_bus, 1);
367 1.1.6.2 rmind }
368 1.1.6.2 rmind
369 1.1.6.2 rmind EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
370 1.1.6.2 rmind for (i = 0; i < RESET_TIMEOUT; i++) {
371 1.1.6.2 rmind reg = EOREAD4(hsc, EHCI_USBCMD);
372 1.1.6.2 rmind if ((reg & EHCI_CMD_HCRESET) == 0)
373 1.1.6.2 rmind break;
374 1.1.6.2 rmind usb_delay_ms(&hsc->sc_bus, 1);
375 1.1.6.2 rmind }
376 1.1.6.2 rmind if (i >= RESET_TIMEOUT) {
377 1.1.6.2 rmind aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
378 1.1.6.2 rmind }
379 1.1.6.2 rmind
380 1.1.6.2 rmind usb_delay_ms(&hsc->sc_bus, 100);
381 1.1.6.2 rmind }
382 1.1.6.2 rmind
383 1.1.6.2 rmind void
384 1.1.6.2 rmind imxehci_host_mode(struct imxehci_softc *sc)
385 1.1.6.2 rmind {
386 1.1.6.2 rmind struct ehci_softc *hsc = &sc->sc_hsc;
387 1.1.6.2 rmind uint32_t reg;
388 1.1.6.2 rmind
389 1.1.6.2 rmind reg = EOREAD4(hsc, EHCI_PORTSC(1));
390 1.1.6.2 rmind reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
391 1.1.6.2 rmind reg |= EHCI_PS_PP | EHCI_PS_PE;
392 1.1.6.2 rmind EOWRITE4(hsc, EHCI_PORTSC(1), reg);
393 1.1.6.2 rmind
394 1.1.6.2 rmind reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
395 1.1.6.2 rmind reg |= OTGSC_IDPU;
396 1.1.6.2 rmind reg |= OTGSC_DPIE | OTGSC_IDIE;
397 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
398 1.1.6.2 rmind
399 1.1.6.2 rmind reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE);
400 1.1.6.2 rmind reg |= USBMODE_HOST;
401 1.1.6.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg);
402 1.1.6.2 rmind }
403