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imxusb.c revision 1.5.2.1
      1  1.5.2.1    tls /*	$NetBSD: imxusb.c,v 1.5.2.1 2014/08/10 06:53:51 tls Exp $	*/
      2      1.1    bsh /*
      3      1.1    bsh  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
      4      1.1    bsh  * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
      5      1.1    bsh  *
      6      1.1    bsh  * Redistribution and use in source and binary forms, with or without
      7      1.1    bsh  * modification, are permitted provided that the following conditions
      8      1.1    bsh  * are met:
      9      1.1    bsh  * 1. Redistributions of source code must retain the above copyright
     10      1.1    bsh  *    notice, this list of conditions and the following disclaimer.
     11      1.1    bsh  * 2. Redistributions in binary form must reproduce the above copyright
     12      1.1    bsh  *    notice, this list of conditions and the following disclaimer in the
     13      1.1    bsh  *    documentation and/or other materials provided with the distribution.
     14      1.1    bsh  *
     15      1.1    bsh  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     16      1.1    bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     17      1.1    bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     18      1.1    bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     19      1.1    bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     20      1.1    bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     21      1.1    bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     22      1.1    bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     23      1.1    bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     24      1.1    bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     25      1.1    bsh  * POSSIBILITY OF SUCH DAMAGE.
     26      1.1    bsh  */
     27      1.1    bsh #include <sys/cdefs.h>
     28  1.5.2.1    tls __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.5.2.1 2014/08/10 06:53:51 tls Exp $");
     29  1.5.2.1    tls 
     30  1.5.2.1    tls #include "opt_imx.h"
     31      1.1    bsh 
     32      1.1    bsh #include <sys/param.h>
     33      1.1    bsh #include <sys/systm.h>
     34      1.1    bsh #include <sys/conf.h>
     35      1.1    bsh #include <sys/kernel.h>
     36      1.1    bsh #include <sys/device.h>
     37      1.1    bsh #include <sys/intr.h>
     38      1.1    bsh #include <sys/bus.h>
     39      1.1    bsh 
     40      1.1    bsh #include <dev/usb/usb.h>
     41      1.1    bsh #include <dev/usb/usbdi.h>
     42      1.1    bsh #include <dev/usb/usbdivar.h>
     43      1.1    bsh #include <dev/usb/usb_mem.h>
     44      1.1    bsh 
     45      1.1    bsh #include <dev/usb/ehcireg.h>
     46      1.1    bsh #include <dev/usb/ehcivar.h>
     47      1.1    bsh 
     48      1.5   matt #include <arm/pic/picvar.h>	/* XXX: for intr_establish! */
     49      1.5   matt 
     50      1.1    bsh #include <arm/imx/imxusbreg.h>
     51      1.1    bsh #include <arm/imx/imxusbvar.h>
     52      1.1    bsh #include <arm/imx/imxgpiovar.h>
     53      1.1    bsh #include "locators.h"
     54      1.1    bsh 
     55      1.1    bsh #include <dev/usb/ulpireg.h>	/* for test */
     56      1.1    bsh 
     57      1.1    bsh static int	imxehci_match(device_t, cfdata_t, void *);
     58      1.1    bsh static void	imxehci_attach(device_t, device_t, void *);
     59      1.1    bsh 
     60      1.1    bsh uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
     61      1.1    bsh void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
     62      1.1    bsh static void ulpi_reset(struct imxehci_softc *sc);
     63      1.1    bsh 
     64      1.1    bsh 
     65      1.1    bsh 
     66      1.1    bsh /* attach structures */
     67      1.1    bsh CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
     68      1.1    bsh     imxehci_match, imxehci_attach, NULL, NULL);
     69      1.1    bsh 
     70      1.1    bsh static int
     71      1.1    bsh imxehci_match(device_t parent, cfdata_t cf, void *aux)
     72      1.1    bsh {
     73      1.1    bsh 	struct imxusbc_attach_args *aa = aux;
     74      1.1    bsh 
     75      1.1    bsh 	if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
     76      1.1    bsh 		return 0;
     77      1.1    bsh 	}
     78      1.1    bsh 
     79      1.1    bsh 	return 1;
     80      1.1    bsh }
     81      1.1    bsh 
     82      1.1    bsh static void
     83      1.1    bsh imxehci_attach(device_t parent, device_t self, void *aux)
     84      1.1    bsh {
     85      1.1    bsh 	struct imxusbc_attach_args *aa = aux;
     86      1.1    bsh 	struct imxusbc_softc *usbc = device_private(parent);
     87      1.1    bsh 	struct imxehci_softc *sc = device_private(self);
     88      1.1    bsh 	ehci_softc_t *hsc = &sc->sc_hsc;
     89      1.1    bsh 	bus_space_tag_t iot;
     90      1.1    bsh 	uint16_t hcirev;
     91      1.1    bsh 	usbd_status r;
     92      1.1    bsh 	uint32_t id, hwhost, hwdevice;
     93      1.1    bsh 	const char *comma;
     94      1.1    bsh 
     95      1.1    bsh 	sc->sc_hsc.sc_dev = self;
     96      1.1    bsh 	iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot;
     97      1.1    bsh 	sc->sc_unit = aa->aa_unit;
     98      1.1    bsh 	sc->sc_usbc = usbc;
     99      1.1    bsh 	hsc->sc_bus.hci_private = sc;
    100      1.4   matt 	hsc->sc_flags |= EHCIF_ETTF;
    101      1.1    bsh 
    102      1.1    bsh 	aprint_normal("\n");
    103      1.1    bsh 
    104      1.1    bsh 	/* per unit registers */
    105      1.1    bsh 	if (bus_space_subregion(iot, aa->aa_ioh,
    106      1.1    bsh 		aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
    107      1.1    bsh 		&sc->sc_ioh) ||
    108      1.1    bsh 	    bus_space_subregion(iot, aa->aa_ioh,
    109      1.1    bsh 		aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS,
    110      1.1    bsh 		IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS,
    111      1.1    bsh 		&sc->sc_hsc.ioh)) {
    112      1.1    bsh 
    113      1.1    bsh 		aprint_error_dev(self, "can't subregion\n");
    114      1.1    bsh 		return;
    115      1.1    bsh 	}
    116      1.1    bsh 
    117      1.1    bsh 	id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
    118      1.1    bsh 	hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
    119      1.1    bsh 
    120      1.1    bsh 	aprint_normal_dev(self,
    121      1.1    bsh 	    "i.MX USB Controller id=%d revision=%d HCI revision=0x%x\n",
    122  1.5.2.1    tls 	    (int)__SHIFTOUT(id, IMXUSB_ID_ID),
    123  1.5.2.1    tls 	    (int)__SHIFTOUT(id, IMXUSB_ID_REVISION),
    124      1.1    bsh 	    hcirev);
    125      1.1    bsh 
    126      1.1    bsh 	hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
    127      1.1    bsh 	hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
    128      1.1    bsh 
    129      1.1    bsh 	aprint_normal_dev(self, "");
    130      1.1    bsh 
    131      1.1    bsh 	comma = "";
    132      1.1    bsh 	if (hwhost & HWHOST_HC) {
    133  1.5.2.1    tls 		int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT);
    134      1.1    bsh 		aprint_normal("%d host port%s",
    135      1.1    bsh 		    n_ports, n_ports > 1 ? "s" : "");
    136      1.1    bsh 		comma = ", ";
    137      1.1    bsh 	}
    138      1.1    bsh 
    139      1.1    bsh 	if (hwdevice & HWDEVICE_DC) {
    140  1.5.2.1    tls 		int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP);
    141      1.1    bsh 		aprint_normal("%sdevice capable, %d endpoint%s",
    142      1.1    bsh 		    comma,
    143      1.1    bsh 		    n_endpoints, n_endpoints > 1 ? "s" : "");
    144      1.1    bsh 	}
    145      1.1    bsh 	aprint_normal("\n");
    146      1.1    bsh 
    147      1.1    bsh 	sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
    148      1.1    bsh 
    149      1.1    bsh 	sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
    150      1.1    bsh 	    EHCI_CAPLENGTH);
    151      1.1    bsh 
    152      1.1    bsh 	/* Platform dependent setup */
    153      1.1    bsh 	if (usbc->sc_init_md_hook)
    154      1.1    bsh 		usbc->sc_init_md_hook(sc);
    155      1.1    bsh 
    156      1.1    bsh 
    157      1.1    bsh 	imxehci_reset(sc);
    158      1.1    bsh 	imxehci_select_interface(sc, sc->sc_iftype);
    159      1.1    bsh 
    160      1.1    bsh 	if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
    161      1.1    bsh 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
    162      1.1    bsh 
    163      1.1    bsh 		aprint_normal_dev(hsc->sc_dev,
    164      1.1    bsh 		    "ULPI phy VID 0x%04x PID 0x%04x\n",
    165      1.1    bsh 		    (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
    166      1.1    bsh 			imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
    167      1.1    bsh 		    (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
    168      1.1    bsh 			imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
    169      1.1    bsh 
    170      1.1    bsh 		ulpi_reset(sc);
    171      1.1    bsh 
    172      1.1    bsh 	}
    173      1.1    bsh 
    174      1.1    bsh 	imxehci_host_mode(sc);
    175      1.1    bsh 
    176      1.1    bsh 	if (usbc->sc_setup_md_hook)
    177      1.1    bsh 		usbc->sc_setup_md_hook(sc, IMXUSB_HOST);
    178  1.5.2.1    tls 
    179  1.5.2.1    tls 	if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
    180  1.5.2.1    tls #if 0
    181  1.5.2.1    tls 		if(hsc->sc_bus.usbrev == USBREV_2_0)
    182  1.5.2.1    tls 			ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0));
    183  1.5.2.1    tls 		else
    184  1.5.2.1    tls 			ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2));
    185  1.5.2.1    tls #endif
    186  1.5.2.1    tls 
    187      1.1    bsh 		imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
    188      1.1    bsh 		    OTG_CONTROL_IDPULLUP);
    189      1.1    bsh 
    190      1.1    bsh 		imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
    191      1.1    bsh 		    OTG_CONTROL_USEEXTVBUSIND |
    192      1.1    bsh 		    OTG_CONTROL_DRVVBUSEXT |
    193      1.1    bsh 		    OTG_CONTROL_DRVVBUS |
    194      1.1    bsh 		    OTG_CONTROL_CHRGVBUS
    195      1.1    bsh 		    );
    196      1.1    bsh 	}
    197      1.1    bsh 
    198      1.1    bsh 	/* Disable interrupts, so we don't get any spurious ones. */
    199      1.2   matt 	EOWRITE4(hsc, EHCI_USBINTR, 0);
    200      1.1    bsh 
    201      1.1    bsh 	intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
    202      1.1    bsh 
    203      1.1    bsh 	/* Figure out vendor for root hub descriptor. */
    204      1.1    bsh 	strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor));
    205      1.1    bsh 
    206      1.1    bsh 	r = ehci_init(hsc);
    207      1.1    bsh 	if (r != USBD_NORMAL_COMPLETION) {
    208      1.1    bsh 		aprint_error_dev(self, "init failed, error=%d\n", r);
    209      1.1    bsh 		return;
    210      1.1    bsh 	}
    211      1.1    bsh 
    212      1.1    bsh 	/* Attach usb device. */
    213      1.1    bsh 	hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint);
    214      1.1    bsh }
    215      1.1    bsh 
    216      1.1    bsh 
    217      1.1    bsh 
    218      1.1    bsh 
    219      1.1    bsh void
    220      1.1    bsh imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
    221      1.1    bsh {
    222      1.1    bsh 	uint32_t reg;
    223      1.1    bsh 	struct ehci_softc *hsc = &sc->sc_hsc;
    224      1.1    bsh 
    225      1.1    bsh 	reg = EOREAD4(hsc, EHCI_PORTSC(1));
    226  1.5.2.1    tls 	reg &= ~(PORTSC_PTS | PORTSC_PTW);
    227  1.5.2.1    tls 	switch (interface) {
    228  1.5.2.1    tls 	case IMXUSBC_IF_UTMI_WIDE:
    229  1.5.2.1    tls 		reg |= PORTSC_PTW_16;
    230  1.5.2.1    tls 	case IMXUSBC_IF_UTMI:
    231  1.5.2.1    tls 		reg |= PORTSC_PTS_UTMI;
    232  1.5.2.1    tls 		break;
    233  1.5.2.1    tls 	case IMXUSBC_IF_PHILIPS:
    234  1.5.2.1    tls 		reg |= PORTSC_PTS_PHILIPS;
    235  1.5.2.1    tls 		break;
    236  1.5.2.1    tls 	case IMXUSBC_IF_ULPI:
    237  1.5.2.1    tls 		reg |= PORTSC_PTS_ULPI;
    238  1.5.2.1    tls 		break;
    239  1.5.2.1    tls 	case IMXUSBC_IF_SERIAL:
    240  1.5.2.1    tls 		reg |= PORTSC_PTS_SERIAL;
    241  1.5.2.1    tls 		break;
    242  1.5.2.1    tls 	}
    243      1.1    bsh 	EOWRITE4(hsc, EHCI_PORTSC(1), reg);
    244      1.1    bsh }
    245      1.1    bsh 
    246      1.1    bsh 
    247      1.1    bsh static uint32_t
    248      1.1    bsh ulpi_wakeup(struct imxehci_softc *sc, int tout)
    249      1.1    bsh {
    250      1.1    bsh 	uint32_t ulpi_view;
    251      1.1    bsh 	int i = 0;
    252      1.1    bsh 	ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
    253      1.1    bsh 
    254      1.1    bsh 	if ( !(ulpi_view & ULPI_SS) ) {
    255      1.1    bsh 		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
    256      1.1    bsh 		    IMXUSB_ULPIVIEW, ULPI_WU);
    257      1.1    bsh 		for (i = 0; (tout < 0) || (i < tout); i++) {
    258      1.1    bsh 			ulpi_view = bus_space_read_4(sc->sc_iot,
    259      1.1    bsh 			    sc->sc_ioh, IMXUSB_ULPIVIEW);
    260      1.1    bsh 			if ( !(ulpi_view & ULPI_WU) )
    261      1.1    bsh 				break;
    262      1.1    bsh 			delay(1);
    263      1.1    bsh 		};
    264      1.1    bsh 	}
    265      1.1    bsh 
    266      1.1    bsh 	if ((tout > 0) && (i >= tout)) {
    267      1.1    bsh 		aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
    268      1.1    bsh 	}
    269      1.1    bsh 
    270      1.1    bsh 	return ulpi_view;
    271      1.1    bsh }
    272      1.1    bsh 
    273      1.1    bsh static uint32_t
    274      1.1    bsh ulpi_wait(struct imxehci_softc *sc, int tout)
    275      1.1    bsh {
    276      1.1    bsh 	uint32_t ulpi_view;
    277      1.1    bsh 	int i;
    278      1.1    bsh 	ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
    279      1.1    bsh 
    280      1.1    bsh 	for (i = 0; (tout < 0) | (i < tout); i++) {
    281      1.1    bsh 		ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    282      1.1    bsh 		    IMXUSB_ULPIVIEW);
    283      1.1    bsh 		if (!(ulpi_view & ULPI_RUN))
    284      1.1    bsh 			break;
    285      1.1    bsh 		delay(1);
    286      1.1    bsh 	}
    287      1.1    bsh 
    288      1.1    bsh 	if ((tout > 0) && (i >= tout)) {
    289      1.1    bsh 		aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
    290      1.1    bsh 	}
    291      1.1    bsh 
    292      1.1    bsh 	return ulpi_view;
    293      1.1    bsh }
    294      1.1    bsh 
    295      1.1    bsh #define	TIMEOUT	100000
    296      1.1    bsh 
    297      1.1    bsh uint8_t
    298      1.1    bsh imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
    299      1.1    bsh {
    300      1.1    bsh 	uint32_t data;
    301      1.1    bsh 
    302      1.1    bsh 	ulpi_wakeup(sc, TIMEOUT);
    303      1.1    bsh 
    304  1.5.2.1    tls 	data = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR);
    305      1.1    bsh 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data);
    306      1.1    bsh 
    307      1.1    bsh 	data = ulpi_wait(sc, TIMEOUT);
    308      1.1    bsh 
    309  1.5.2.1    tls 	return __SHIFTOUT(data, ULPI_DATRD);
    310      1.1    bsh }
    311      1.1    bsh 
    312      1.1    bsh void
    313      1.1    bsh imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
    314      1.1    bsh {
    315      1.1    bsh 	uint32_t reg;
    316      1.1    bsh 
    317      1.1    bsh 	ulpi_wakeup(sc, TIMEOUT);
    318      1.1    bsh 
    319  1.5.2.1    tls 	reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR);
    320      1.1    bsh 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
    321      1.1    bsh 
    322      1.1    bsh 	ulpi_wait(sc, TIMEOUT);
    323      1.1    bsh 
    324      1.1    bsh 	return;
    325      1.1    bsh }
    326      1.1    bsh 
    327      1.1    bsh #if 0
    328      1.1    bsh static int
    329      1.1    bsh ulpi_scratch_test(struct imxehci_softc *sc)
    330      1.1    bsh {
    331      1.1    bsh 	uint32_t ulpi_view;
    332      1.1    bsh 
    333      1.1    bsh 	ulpi_view = ulpi_wakeup(sc, 1000);
    334      1.1    bsh 	if (ulpi_view & ULPI_WU) {
    335      1.1    bsh 		return -1;
    336      1.1    bsh 	}
    337      1.1    bsh 
    338      1.1    bsh 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW,
    339      1.1    bsh 		(ULPI_RUN | ULPI_RW |
    340      1.1    bsh 		 (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA));
    341      1.1    bsh 
    342      1.1    bsh 	ulpi_view = ulpi_wait(sc, 1000);
    343      1.1    bsh 
    344      1.1    bsh 	if (ulpi_view & ULPI_RUN) {
    345      1.1    bsh 		return -1;
    346      1.1    bsh 	}
    347      1.1    bsh 
    348      1.1    bsh 	return 0;
    349      1.1    bsh }
    350      1.1    bsh #endif
    351      1.1    bsh 
    352      1.1    bsh static void
    353      1.1    bsh ulpi_reset(struct imxehci_softc *sc)
    354      1.1    bsh {
    355      1.1    bsh 	uint8_t data;
    356      1.1    bsh 	int timo = 1000 * 1000;	/* XXXX: 1sec */
    357      1.1    bsh 
    358      1.1    bsh 	imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
    359      1.1    bsh 	    FUNCTION_CONTROL_RESET /*0x20*/);
    360      1.1    bsh 	do {
    361      1.1    bsh 		data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
    362      1.1    bsh 		if (!(data & FUNCTION_CONTROL_RESET))
    363      1.1    bsh 			break;
    364      1.1    bsh 		delay(100);
    365      1.1    bsh 		timo -= 100;
    366      1.1    bsh 	} while (timo > 0);
    367      1.1    bsh 	if (timo <= 0) {
    368      1.1    bsh 		aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n",
    369      1.1    bsh 		    __func__);
    370      1.1    bsh 		return;
    371      1.1    bsh 	}
    372      1.1    bsh 
    373      1.1    bsh 	return;
    374      1.1    bsh }
    375      1.1    bsh 
    376      1.1    bsh void
    377      1.1    bsh imxehci_reset(struct imxehci_softc *sc)
    378      1.1    bsh {
    379      1.3  skrll 	uint32_t reg;
    380      1.1    bsh 	int i;
    381      1.1    bsh 	struct ehci_softc *hsc = &sc->sc_hsc;
    382      1.1    bsh #define	RESET_TIMEOUT 100
    383      1.1    bsh 
    384      1.1    bsh 	reg = EOREAD4(hsc, EHCI_USBCMD);
    385      1.1    bsh 	reg &= ~EHCI_CMD_RS;
    386      1.1    bsh 	EOWRITE4(hsc, EHCI_USBCMD, reg);
    387      1.1    bsh 
    388      1.1    bsh 	for (i=0; i < RESET_TIMEOUT; ++i) {
    389      1.1    bsh 		reg = EOREAD4(hsc, EHCI_USBCMD);
    390      1.1    bsh 		if ((reg & EHCI_CMD_RS) == 0)
    391      1.1    bsh 			break;
    392      1.1    bsh 		usb_delay_ms(&hsc->sc_bus, 1);
    393      1.1    bsh 	}
    394      1.1    bsh 
    395      1.1    bsh 	EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
    396      1.1    bsh 	for (i = 0; i < RESET_TIMEOUT; i++) {
    397      1.1    bsh 		reg = EOREAD4(hsc, EHCI_USBCMD);
    398      1.1    bsh 		if ((reg &  EHCI_CMD_HCRESET) == 0)
    399      1.1    bsh 			break;
    400      1.1    bsh 		usb_delay_ms(&hsc->sc_bus, 1);
    401      1.1    bsh 	}
    402      1.1    bsh 	if (i >= RESET_TIMEOUT) {
    403      1.1    bsh 		aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
    404      1.1    bsh 	}
    405      1.1    bsh 
    406      1.1    bsh 	usb_delay_ms(&hsc->sc_bus, 100);
    407      1.1    bsh }
    408      1.1    bsh 
    409      1.1    bsh void
    410      1.1    bsh imxehci_host_mode(struct imxehci_softc *sc)
    411      1.1    bsh {
    412      1.1    bsh 	struct ehci_softc *hsc = &sc->sc_hsc;
    413      1.1    bsh 	uint32_t reg;
    414      1.1    bsh 
    415      1.1    bsh 	reg = EOREAD4(hsc, EHCI_PORTSC(1));
    416      1.1    bsh 	reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
    417      1.1    bsh 	reg |= EHCI_PS_PP | EHCI_PS_PE;
    418      1.1    bsh 	EOWRITE4(hsc, EHCI_PORTSC(1), reg);
    419      1.1    bsh 
    420      1.1    bsh 	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
    421      1.1    bsh 	reg |= OTGSC_IDPU;
    422      1.5   matt 	/* disable IDIE not to conflict with SSP1_DETECT. */
    423      1.5   matt 	//reg |= OTGSC_DPIE | OTGSC_IDIE;
    424      1.5   matt 	reg |= OTGSC_DPIE;
    425      1.1    bsh 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
    426      1.1    bsh 
    427      1.1    bsh 	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE);
    428  1.5.2.1    tls 	reg |= USBMODE_CM_HOST;
    429      1.1    bsh 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg);
    430      1.1    bsh }
    431