imxusb.c revision 1.1.10.3
1 /* $NetBSD: imxusb.c,v 1.1.10.3 2014/05/22 11:39:32 yamt Exp $ */ 2 /* 3 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved. 4 * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.1.10.3 2014/05/22 11:39:32 yamt Exp $"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/conf.h> 33 #include <sys/kernel.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/bus.h> 37 38 #include <dev/usb/usb.h> 39 #include <dev/usb/usbdi.h> 40 #include <dev/usb/usbdivar.h> 41 #include <dev/usb/usb_mem.h> 42 43 #include <dev/usb/ehcireg.h> 44 #include <dev/usb/ehcivar.h> 45 46 #include <arm/pic/picvar.h> /* XXX: for intr_establish! */ 47 48 #include <arm/imx/imxusbreg.h> 49 #include <arm/imx/imxusbvar.h> 50 #include <arm/imx/imxgpiovar.h> 51 #include "locators.h" 52 53 #include <dev/usb/ulpireg.h> /* for test */ 54 55 static int imxehci_match(device_t, cfdata_t, void *); 56 static void imxehci_attach(device_t, device_t, void *); 57 58 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr); 59 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data); 60 static void ulpi_reset(struct imxehci_softc *sc); 61 62 63 64 /* attach structures */ 65 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc), 66 imxehci_match, imxehci_attach, NULL, NULL); 67 68 static int 69 imxehci_match(device_t parent, cfdata_t cf, void *aux) 70 { 71 struct imxusbc_attach_args *aa = aux; 72 73 if (aa->aa_unit < 0 || 3 < aa->aa_unit) { 74 return 0; 75 } 76 77 return 1; 78 } 79 80 static void 81 imxehci_attach(device_t parent, device_t self, void *aux) 82 { 83 struct imxusbc_attach_args *aa = aux; 84 struct imxusbc_softc *usbc = device_private(parent); 85 struct imxehci_softc *sc = device_private(self); 86 ehci_softc_t *hsc = &sc->sc_hsc; 87 bus_space_tag_t iot; 88 uint16_t hcirev; 89 usbd_status r; 90 uint32_t id, hwhost, hwdevice; 91 const char *comma; 92 93 sc->sc_hsc.sc_dev = self; 94 iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot; 95 sc->sc_unit = aa->aa_unit; 96 sc->sc_usbc = usbc; 97 hsc->sc_bus.hci_private = sc; 98 hsc->sc_flags |= EHCIF_ETTF; 99 100 aprint_normal("\n"); 101 102 /* per unit registers */ 103 if (bus_space_subregion(iot, aa->aa_ioh, 104 aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE, 105 &sc->sc_ioh) || 106 bus_space_subregion(iot, aa->aa_ioh, 107 aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS, 108 IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS, 109 &sc->sc_hsc.ioh)) { 110 111 aprint_error_dev(self, "can't subregion\n"); 112 return; 113 } 114 115 id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID); 116 hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION); 117 118 aprint_normal_dev(self, 119 "i.MX USB Controller id=%d revision=%d HCI revision=0x%x\n", 120 id & (uint32_t)IMXUSB_ID_ID_MASK, 121 (id & (uint32_t)IMXUSB_ID_REVISION_MASK) >> 122 IMXUSB_ID_REVISION_SHIFT, 123 hcirev); 124 125 hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST); 126 hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE); 127 128 aprint_normal_dev(self, ""); 129 130 comma = ""; 131 if (hwhost & HWHOST_HC) { 132 int n_ports = 1 + ((hwhost & HWHOST_NPORT_MASK) >> 133 HWHOST_NPORT_SHIFT); 134 aprint_normal("%d host port%s", 135 n_ports, n_ports > 1 ? "s" : ""); 136 comma = ", "; 137 } 138 139 if (hwdevice & HWDEVICE_DC) { 140 int n_endpoints = (hwdevice & HWDEVICE_DEVEP_MASK) >> 141 HWDEVICE_DEVEP_SHIFT; 142 aprint_normal("%sdevice capable, %d endpoint%s", 143 comma, 144 n_endpoints, n_endpoints > 1 ? "s" : ""); 145 } 146 aprint_normal("\n"); 147 148 sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat; 149 150 sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh, 151 EHCI_CAPLENGTH); 152 153 /* Platform dependent setup */ 154 if (usbc->sc_init_md_hook) 155 usbc->sc_init_md_hook(sc); 156 157 158 imxehci_reset(sc); 159 imxehci_select_interface(sc, sc->sc_iftype); 160 161 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0); 163 164 aprint_normal_dev(hsc->sc_dev, 165 "ULPI phy VID 0x%04x PID 0x%04x\n", 166 (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) | 167 imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8), 168 (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) | 169 imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8)); 170 171 ulpi_reset(sc); 172 173 } 174 175 imxehci_host_mode(sc); 176 177 if (usbc->sc_setup_md_hook) 178 usbc->sc_setup_md_hook(sc, IMXUSB_HOST); 179 else if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 180 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, 181 OTG_CONTROL_IDPULLUP); 182 183 imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET, 184 OTG_CONTROL_USEEXTVBUSIND | 185 OTG_CONTROL_DRVVBUSEXT | 186 OTG_CONTROL_DRVVBUS | 187 OTG_CONTROL_CHRGVBUS 188 ); 189 } 190 191 /* Disable interrupts, so we don't get any spurious ones. */ 192 EOWRITE4(hsc, EHCI_USBINTR, 0); 193 194 intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc); 195 196 /* Figure out vendor for root hub descriptor. */ 197 strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor)); 198 199 r = ehci_init(hsc); 200 if (r != USBD_NORMAL_COMPLETION) { 201 aprint_error_dev(self, "init failed, error=%d\n", r); 202 return; 203 } 204 205 /* Attach usb device. */ 206 hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint); 207 } 208 209 210 211 212 void 213 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface) 214 { 215 uint32_t reg; 216 struct ehci_softc *hsc = &sc->sc_hsc; 217 218 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 219 reg = (reg & ~PORTSC_PTS_MASK) | (interface << PORTSC_PTS_SHIFT); 220 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 221 } 222 223 224 static uint32_t 225 ulpi_wakeup(struct imxehci_softc *sc, int tout) 226 { 227 uint32_t ulpi_view; 228 int i = 0; 229 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 230 231 if ( !(ulpi_view & ULPI_SS) ) { 232 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 233 IMXUSB_ULPIVIEW, ULPI_WU); 234 for (i = 0; (tout < 0) || (i < tout); i++) { 235 ulpi_view = bus_space_read_4(sc->sc_iot, 236 sc->sc_ioh, IMXUSB_ULPIVIEW); 237 if ( !(ulpi_view & ULPI_WU) ) 238 break; 239 delay(1); 240 }; 241 } 242 243 if ((tout > 0) && (i >= tout)) { 244 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__); 245 } 246 247 return ulpi_view; 248 } 249 250 static uint32_t 251 ulpi_wait(struct imxehci_softc *sc, int tout) 252 { 253 uint32_t ulpi_view; 254 int i; 255 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 256 257 for (i = 0; (tout < 0) | (i < tout); i++) { 258 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 259 IMXUSB_ULPIVIEW); 260 if (!(ulpi_view & ULPI_RUN)) 261 break; 262 delay(1); 263 } 264 265 if ((tout > 0) && (i >= tout)) { 266 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__); 267 } 268 269 return ulpi_view; 270 } 271 272 #define TIMEOUT 100000 273 274 uint8_t 275 imxusb_ulpi_read(struct imxehci_softc *sc, int addr) 276 { 277 uint32_t data; 278 279 ulpi_wakeup(sc, TIMEOUT); 280 281 data = ULPI_RUN | (addr << ULPI_ADDR_SHIFT); 282 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data); 283 284 data = ulpi_wait(sc, TIMEOUT); 285 286 return (data & ULPI_DATRD_MASK) >> ULPI_DATRD_SHIFT; 287 } 288 289 void 290 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data) 291 { 292 uint32_t reg; 293 294 ulpi_wakeup(sc, TIMEOUT); 295 296 reg = ULPI_RUN | ULPI_RW | ((addr) << ULPI_ADDR_SHIFT) | data; 297 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg); 298 299 ulpi_wait(sc, TIMEOUT); 300 301 return; 302 } 303 304 #if 0 305 static int 306 ulpi_scratch_test(struct imxehci_softc *sc) 307 { 308 uint32_t ulpi_view; 309 310 ulpi_view = ulpi_wakeup(sc, 1000); 311 if (ulpi_view & ULPI_WU) { 312 return -1; 313 } 314 315 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 316 (ULPI_RUN | ULPI_RW | 317 (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA)); 318 319 ulpi_view = ulpi_wait(sc, 1000); 320 321 if (ulpi_view & ULPI_RUN) { 322 return -1; 323 } 324 325 return 0; 326 } 327 #endif 328 329 static void 330 ulpi_reset(struct imxehci_softc *sc) 331 { 332 uint8_t data; 333 int timo = 1000 * 1000; /* XXXX: 1sec */ 334 335 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, 336 FUNCTION_CONTROL_RESET /*0x20*/); 337 do { 338 data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL); 339 if (!(data & FUNCTION_CONTROL_RESET)) 340 break; 341 delay(100); 342 timo -= 100; 343 } while (timo > 0); 344 if (timo <= 0) { 345 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n", 346 __func__); 347 return; 348 } 349 350 return; 351 } 352 353 void 354 imxehci_reset(struct imxehci_softc *sc) 355 { 356 uint32_t reg; 357 int i; 358 struct ehci_softc *hsc = &sc->sc_hsc; 359 #define RESET_TIMEOUT 100 360 361 reg = EOREAD4(hsc, EHCI_USBCMD); 362 reg &= ~EHCI_CMD_RS; 363 EOWRITE4(hsc, EHCI_USBCMD, reg); 364 365 for (i=0; i < RESET_TIMEOUT; ++i) { 366 reg = EOREAD4(hsc, EHCI_USBCMD); 367 if ((reg & EHCI_CMD_RS) == 0) 368 break; 369 usb_delay_ms(&hsc->sc_bus, 1); 370 } 371 372 EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET); 373 for (i = 0; i < RESET_TIMEOUT; i++) { 374 reg = EOREAD4(hsc, EHCI_USBCMD); 375 if ((reg & EHCI_CMD_HCRESET) == 0) 376 break; 377 usb_delay_ms(&hsc->sc_bus, 1); 378 } 379 if (i >= RESET_TIMEOUT) { 380 aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg); 381 } 382 383 usb_delay_ms(&hsc->sc_bus, 100); 384 } 385 386 void 387 imxehci_host_mode(struct imxehci_softc *sc) 388 { 389 struct ehci_softc *hsc = &sc->sc_hsc; 390 uint32_t reg; 391 392 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 393 reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC); 394 reg |= EHCI_PS_PP | EHCI_PS_PE; 395 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 396 397 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC); 398 reg |= OTGSC_IDPU; 399 /* disable IDIE not to conflict with SSP1_DETECT. */ 400 //reg |= OTGSC_DPIE | OTGSC_IDIE; 401 reg |= OTGSC_DPIE; 402 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg); 403 404 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE); 405 reg |= USBMODE_HOST; 406 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg); 407 } 408
Indexes created Thu Oct 02 10:09:58 GMT 2025