imxusb.c revision 1.15
1 /* $NetBSD: imxusb.c,v 1.15 2019/07/26 06:57:54 skrll Exp $ */ 2 /* 3 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved. 4 * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.15 2019/07/26 06:57:54 skrll Exp $"); 29 30 #include "locators.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/conf.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/intr.h> 38 #include <sys/bus.h> 39 40 #include <dev/usb/usb.h> 41 #include <dev/usb/usbdi.h> 42 #include <dev/usb/usbdivar.h> 43 #include <dev/usb/usb_mem.h> 44 45 #include <dev/usb/ehcireg.h> 46 #include <dev/usb/ehcivar.h> 47 48 #include <arm/pic/picvar.h> /* XXX: for intr_establish! */ 49 50 #include <arm/imx/imxusbreg.h> 51 #include <arm/imx/imxusbvar.h> 52 53 #include <dev/usb/ulpireg.h> /* for test */ 54 55 static int imxehci_match(device_t, cfdata_t, void *); 56 static void imxehci_attach(device_t, device_t, void *); 57 58 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr); 59 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data); 60 static void ulpi_reset(struct imxehci_softc *sc); 61 62 static void imxehci_select_interface(struct imxehci_softc *, enum imx_usb_if); 63 static void imxehci_init(struct ehci_softc *); 64 65 /* attach structures */ 66 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc), 67 imxehci_match, imxehci_attach, NULL, NULL); 68 69 static int 70 imxehci_match(device_t parent, cfdata_t cf, void *aux) 71 { 72 struct imxusbc_attach_args *aa = aux; 73 74 if (aa->aa_unit < 0 || 3 < aa->aa_unit) 75 return 0; 76 77 return 1; 78 } 79 80 static void 81 imxehci_attach(device_t parent, device_t self, void *aux) 82 { 83 struct imxusbc_attach_args *aa = aux; 84 struct imxusbc_softc *usbc = device_private(parent); 85 struct imxehci_softc *sc = device_private(self); 86 ehci_softc_t *hsc = &sc->sc_hsc; 87 bus_space_tag_t iot; 88 uint16_t hcirev; 89 uint32_t id, hwhost, hwdevice; 90 const char *comma; 91 92 iot = aa->aa_iot; 93 94 sc->sc_dev = self; 95 sc->sc_unit = aa->aa_unit; 96 sc->sc_usbc = usbc; 97 sc->sc_iot = iot; 98 99 hsc->sc_dev = self; 100 hsc->iot = iot; 101 hsc->sc_bus.ub_hcpriv = sc; 102 hsc->sc_bus.ub_dmatag = aa->aa_dmat; 103 hsc->sc_flags |= EHCIF_ETTF; 104 hsc->sc_vendor_init = imxehci_init; 105 106 aprint_naive("\n"); 107 aprint_normal(": i.MX USB Controller\n"); 108 109 if (usbc->sc_ehci_size == 0) 110 usbc->sc_ehci_size = IMXUSB_EHCI_SIZE; /* use default */ 111 112 /* per unit registers */ 113 if (bus_space_subregion(iot, aa->aa_ioh, 114 sc->sc_unit * usbc->sc_ehci_offset, usbc->sc_ehci_size, 115 &sc->sc_ioh) || 116 bus_space_subregion(iot, aa->aa_ioh, 117 sc->sc_unit * usbc->sc_ehci_offset + IMXUSB_EHCIREGS, 118 usbc->sc_ehci_size - IMXUSB_EHCIREGS, 119 &hsc->ioh)) { 120 121 aprint_error_dev(self, "can't subregion\n"); 122 return; 123 } 124 125 id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID); 126 hcirev = bus_space_read_2(iot, hsc->ioh, EHCI_HCIVERSION); 127 128 aprint_normal_dev(self, 129 "id=%d revision=%d HCI revision=0x%x\n", 130 (int)__SHIFTOUT(id, IMXUSB_ID_ID), 131 (int)__SHIFTOUT(id, IMXUSB_ID_REVISION), 132 hcirev); 133 134 hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST); 135 hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE); 136 137 aprint_normal_dev(self, ""); 138 139 comma = ""; 140 if (hwhost & HWHOST_HC) { 141 int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT); 142 aprint_normal("%d host port%s", 143 n_ports, n_ports > 1 ? "s" : ""); 144 comma = ", "; 145 } 146 147 if (hwdevice & HWDEVICE_DC) { 148 int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP); 149 aprint_normal("%sdevice capable, %d endpoint%s", 150 comma, 151 n_endpoints, n_endpoints > 1 ? "s" : ""); 152 } 153 aprint_normal("\n"); 154 155 hsc->sc_offs = bus_space_read_1(iot, hsc->ioh, 156 EHCI_CAPLENGTH); 157 158 /* Platform dependent setup */ 159 if (usbc->sc_init_md_hook) 160 usbc->sc_init_md_hook(sc); 161 162 imxehci_reset(sc); 163 imxehci_select_interface(sc, sc->sc_iftype); 164 165 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 166 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0); 167 168 aprint_normal_dev(hsc->sc_dev, 169 "ULPI phy VID 0x%04x PID 0x%04x\n", 170 (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) | 171 imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8), 172 (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) | 173 imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8)); 174 175 ulpi_reset(sc); 176 177 } 178 179 if (usbc->sc_setup_md_hook) 180 usbc->sc_setup_md_hook(sc, IMXUSB_HOST); 181 182 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 183 #if 0 184 if(hsc->sc_bus.ub_revision == USBREV_2_0) 185 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0)); 186 else 187 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2)); 188 #endif 189 190 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, 191 OTG_CONTROL_IDPULLUP); 192 193 imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET, 194 OTG_CONTROL_USEEXTVBUSIND | 195 OTG_CONTROL_DRVVBUSEXT | 196 OTG_CONTROL_DRVVBUS | 197 OTG_CONTROL_CHRGVBUS); 198 } 199 200 /* Disable interrupts, so we don't get any spurious ones. */ 201 EOWRITE4(hsc, EHCI_USBINTR, 0); 202 203 if (usbc->sc_intr_establish_md_hook) 204 sc->sc_ih = usbc->sc_intr_establish_md_hook(sc); 205 else if (aa->aa_irq > 0) 206 sc->sc_ih = intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc); 207 KASSERT(sc->sc_ih != NULL); 208 209 int err = ehci_init(hsc); 210 if (err) { 211 aprint_error_dev(self, "init failed, error=%d\n", err); 212 return; 213 } 214 215 /* Attach usb device. */ 216 hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint); 217 } 218 219 static void 220 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface) 221 { 222 uint32_t reg; 223 struct ehci_softc *hsc = &sc->sc_hsc; 224 225 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 226 reg &= ~(PORTSC_PTS | PORTSC_PTW | PORTSC_PTS2); 227 switch (interface) { 228 case IMXUSBC_IF_UTMI_WIDE: 229 reg |= PORTSC_PTW_16; 230 case IMXUSBC_IF_UTMI: 231 reg |= PORTSC_PTS_UTMI; 232 break; 233 case IMXUSBC_IF_PHILIPS: 234 reg |= PORTSC_PTS_PHILIPS; 235 break; 236 case IMXUSBC_IF_ULPI: 237 reg |= PORTSC_PTS_ULPI; 238 break; 239 case IMXUSBC_IF_SERIAL: 240 reg |= PORTSC_PTS_SERIAL; 241 break; 242 case IMXUSBC_IF_HSIC: 243 reg |= PORTSC_PTS2; 244 break; 245 } 246 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 247 } 248 249 static uint32_t 250 ulpi_wakeup(struct imxehci_softc *sc, int tout) 251 { 252 struct ehci_softc *hsc = &sc->sc_hsc; 253 uint32_t ulpi_view; 254 255 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 256 257 if (!(ulpi_view & ULPI_SS)) { 258 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 259 IMXUSB_ULPIVIEW, ULPI_WU); 260 while (tout-- > 0) { 261 ulpi_view = bus_space_read_4(sc->sc_iot, 262 sc->sc_ioh, IMXUSB_ULPIVIEW); 263 if (!(ulpi_view & ULPI_WU)) 264 break; 265 delay(1); 266 }; 267 } 268 269 if (tout == 0) 270 aprint_error_dev(hsc->sc_dev, "%s: timeout\n", __func__); 271 272 return ulpi_view; 273 } 274 275 static uint32_t 276 ulpi_wait(struct imxehci_softc *sc, int tout) 277 { 278 struct ehci_softc *hsc = &sc->sc_hsc; 279 uint32_t ulpi_view; 280 281 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 282 283 while (tout-- > 0) { 284 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 285 IMXUSB_ULPIVIEW); 286 if (!(ulpi_view & ULPI_RUN)) 287 break; 288 delay(1); 289 } 290 291 if (tout == 0) 292 aprint_error_dev(hsc->sc_dev, "%s: timeout\n", __func__); 293 294 return ulpi_view; 295 } 296 297 #define TIMEOUT 100000 298 299 uint8_t 300 imxusb_ulpi_read(struct imxehci_softc *sc, int addr) 301 { 302 uint32_t reg; 303 304 ulpi_wakeup(sc, TIMEOUT); 305 306 reg = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR); 307 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg); 308 309 reg = ulpi_wait(sc, TIMEOUT); 310 311 return __SHIFTOUT(reg, ULPI_DATRD); 312 } 313 314 void 315 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data) 316 { 317 uint32_t reg; 318 319 ulpi_wakeup(sc, TIMEOUT); 320 321 reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR); 322 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg); 323 324 ulpi_wait(sc, TIMEOUT); 325 326 return; 327 } 328 329 static void 330 ulpi_reset(struct imxehci_softc *sc) 331 { 332 struct ehci_softc *hsc = &sc->sc_hsc; 333 uint8_t data; 334 int timo = 1000 * 1000; /* XXXX: 1sec */ 335 336 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, 337 FUNCTION_CONTROL_RESET /*0x20*/); 338 do { 339 data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL); 340 if (!(data & FUNCTION_CONTROL_RESET)) 341 break; 342 delay(100); 343 timo -= 100; 344 } while (timo > 0); 345 346 if (timo <= 0) { 347 aprint_error_dev(hsc->sc_dev, "%s: reset failed!!\n", 348 __func__); 349 return; 350 } 351 352 return; 353 } 354 355 void 356 imxehci_reset(struct imxehci_softc *sc) 357 { 358 uint32_t reg; 359 struct ehci_softc *hsc = &sc->sc_hsc; 360 int tout; 361 #define RESET_TIMEOUT 100 362 363 reg = EOREAD4(hsc, EHCI_USBCMD); 364 reg &= ~EHCI_CMD_RS; 365 EOWRITE4(hsc, EHCI_USBCMD, reg); 366 367 for (tout = RESET_TIMEOUT; tout > 0; tout--) { 368 reg = EOREAD4(hsc, EHCI_USBCMD); 369 if ((reg & EHCI_CMD_RS) == 0) 370 break; 371 usb_delay_ms(&hsc->sc_bus, 1); 372 } 373 374 EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET); 375 376 for (tout = RESET_TIMEOUT; tout > 0; tout--) { 377 reg = EOREAD4(hsc, EHCI_USBCMD); 378 if ((reg & EHCI_CMD_HCRESET) == 0) 379 break; 380 usb_delay_ms(&hsc->sc_bus, 1); 381 } 382 383 if (tout == 0) 384 aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg); 385 386 usb_delay_ms(&hsc->sc_bus, 100); 387 } 388 389 static void 390 imxehci_init(struct ehci_softc *hsc) 391 { 392 struct imxehci_softc *sc = device_private(hsc->sc_dev); 393 uint32_t reg; 394 395 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 396 reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC); 397 reg |= EHCI_PS_PP | EHCI_PS_PE; 398 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 399 400 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC); 401 reg |= OTGSC_IDPU; 402 /* disable IDIE not to conflict with SSP1_DETECT. */ 403 //reg |= OTGSC_DPIE | OTGSC_IDIE; 404 reg |= OTGSC_DPIE; 405 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg); 406 407 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE); 408 reg &= ~USBMODE_CM; 409 reg |= USBMODE_CM_HOST; 410 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE, reg); 411 } 412
Indexes created Thu Oct 02 07:10:07 GMT 2025