imxusb.c revision 1.16
1 /* $NetBSD: imxusb.c,v 1.16 2020/12/23 14:42:38 skrll Exp $ */ 2 /* 3 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved. 4 * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.16 2020/12/23 14:42:38 skrll Exp $"); 29 30 #include "locators.h" 31 #include "opt_imx.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/bus.h> 40 41 #include <dev/usb/usb.h> 42 #include <dev/usb/usbdi.h> 43 #include <dev/usb/usbdivar.h> 44 #include <dev/usb/usb_mem.h> 45 46 #include <dev/usb/ehcireg.h> 47 #include <dev/usb/ehcivar.h> 48 49 #include <arm/pic/picvar.h> /* XXX: for intr_establish! */ 50 51 #include <arm/imx/imxusbreg.h> 52 #include <arm/imx/imxusbvar.h> 53 54 #include <dev/usb/ulpireg.h> /* for test */ 55 56 static int imxehci_match(device_t, cfdata_t, void *); 57 static void imxehci_attach(device_t, device_t, void *); 58 59 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr); 60 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data); 61 static void ulpi_reset(struct imxehci_softc *sc); 62 63 static void imxehci_select_interface(struct imxehci_softc *, enum imx_usb_if); 64 static void imxehci_init(struct ehci_softc *); 65 66 /* attach structures */ 67 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc), 68 imxehci_match, imxehci_attach, NULL, NULL); 69 70 static int 71 imxehci_match(device_t parent, cfdata_t cf, void *aux) 72 { 73 struct imxusbc_attach_args *aa = aux; 74 75 if (aa->aa_unit < 0 || 3 < aa->aa_unit) 76 return 0; 77 78 return 1; 79 } 80 81 static void 82 imxehci_attach(device_t parent, device_t self, void *aux) 83 { 84 struct imxusbc_attach_args *aa = aux; 85 struct imxusbc_softc *usbc = device_private(parent); 86 struct imxehci_softc *sc = device_private(self); 87 ehci_softc_t *hsc = &sc->sc_hsc; 88 bus_space_tag_t iot; 89 uint16_t hcirev; 90 uint32_t id, hwhost, hwdevice; 91 const char *comma; 92 93 iot = aa->aa_iot; 94 95 sc->sc_dev = self; 96 sc->sc_unit = aa->aa_unit; 97 sc->sc_usbc = usbc; 98 sc->sc_iot = iot; 99 100 hsc->sc_dev = self; 101 hsc->iot = iot; 102 hsc->sc_bus.ub_hcpriv = sc; 103 hsc->sc_bus.ub_dmatag = aa->aa_dmat; 104 hsc->sc_flags |= EHCIF_ETTF; 105 hsc->sc_vendor_init = imxehci_init; 106 107 aprint_naive("\n"); 108 aprint_normal(": i.MX USB Controller\n"); 109 110 if (usbc->sc_ehci_size == 0) 111 usbc->sc_ehci_size = IMXUSB_EHCI_SIZE; /* use default */ 112 113 /* per unit registers */ 114 if (bus_space_subregion(iot, aa->aa_ioh, 115 sc->sc_unit * usbc->sc_ehci_offset, usbc->sc_ehci_size, 116 &sc->sc_ioh) || 117 bus_space_subregion(iot, aa->aa_ioh, 118 sc->sc_unit * usbc->sc_ehci_offset + IMXUSB_EHCIREGS, 119 usbc->sc_ehci_size - IMXUSB_EHCIREGS, 120 &hsc->ioh)) { 121 122 aprint_error_dev(self, "can't subregion\n"); 123 return; 124 } 125 126 id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID); 127 hcirev = bus_space_read_2(iot, hsc->ioh, EHCI_HCIVERSION); 128 129 aprint_normal_dev(self, 130 "id=%d revision=%d HCI revision=0x%x\n", 131 (int)__SHIFTOUT(id, IMXUSB_ID_ID), 132 (int)__SHIFTOUT(id, IMXUSB_ID_REVISION), 133 hcirev); 134 135 hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST); 136 hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE); 137 138 aprint_normal_dev(self, ""); 139 140 comma = ""; 141 if (hwhost & HWHOST_HC) { 142 int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT); 143 aprint_normal("%d host port%s", 144 n_ports, n_ports > 1 ? "s" : ""); 145 comma = ", "; 146 } 147 148 if (hwdevice & HWDEVICE_DC) { 149 int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP); 150 aprint_normal("%sdevice capable, %d endpoint%s", 151 comma, 152 n_endpoints, n_endpoints > 1 ? "s" : ""); 153 } 154 aprint_normal("\n"); 155 156 hsc->sc_offs = bus_space_read_1(iot, hsc->ioh, 157 EHCI_CAPLENGTH); 158 159 /* Platform dependent setup */ 160 if (usbc->sc_init_md_hook) 161 usbc->sc_init_md_hook(sc); 162 163 imxehci_reset(sc); 164 imxehci_select_interface(sc, sc->sc_iftype); 165 166 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 167 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0); 168 169 aprint_normal_dev(hsc->sc_dev, 170 "ULPI phy VID 0x%04x PID 0x%04x\n", 171 (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) | 172 imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8), 173 (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) | 174 imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8)); 175 176 ulpi_reset(sc); 177 178 } 179 180 if (usbc->sc_setup_md_hook) 181 usbc->sc_setup_md_hook(sc, IMXUSB_HOST); 182 183 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 184 #if 0 185 if(hsc->sc_bus.ub_revision == USBREV_2_0) 186 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0)); 187 else 188 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2)); 189 #endif 190 191 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, 192 OTG_CONTROL_IDPULLUP); 193 194 imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET, 195 OTG_CONTROL_USEEXTVBUSIND | 196 OTG_CONTROL_DRVVBUSEXT | 197 OTG_CONTROL_DRVVBUS | 198 OTG_CONTROL_CHRGVBUS); 199 } 200 201 /* Disable interrupts, so we don't get any spurious ones. */ 202 EOWRITE4(hsc, EHCI_USBINTR, 0); 203 204 if (usbc->sc_intr_establish_md_hook) 205 sc->sc_ih = usbc->sc_intr_establish_md_hook(sc); 206 else if (aa->aa_irq > 0) 207 sc->sc_ih = intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc); 208 KASSERT(sc->sc_ih != NULL); 209 210 int err = ehci_init(hsc); 211 if (err) { 212 aprint_error_dev(self, "init failed, error=%d\n", err); 213 return; 214 } 215 216 /* Attach usb device. */ 217 hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint); 218 } 219 220 static void 221 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface) 222 { 223 uint32_t reg; 224 struct ehci_softc *hsc = &sc->sc_hsc; 225 226 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 227 reg &= ~(PORTSC_PTS | PORTSC_PTW | PORTSC_PTS2); 228 switch (interface) { 229 case IMXUSBC_IF_UTMI_WIDE: 230 reg |= PORTSC_PTW_16; 231 case IMXUSBC_IF_UTMI: 232 reg |= PORTSC_PTS_UTMI; 233 break; 234 case IMXUSBC_IF_PHILIPS: 235 reg |= PORTSC_PTS_PHILIPS; 236 break; 237 case IMXUSBC_IF_ULPI: 238 reg |= PORTSC_PTS_ULPI; 239 break; 240 case IMXUSBC_IF_SERIAL: 241 reg |= PORTSC_PTS_SERIAL; 242 break; 243 case IMXUSBC_IF_HSIC: 244 reg |= PORTSC_PTS2; 245 break; 246 } 247 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 248 } 249 250 static uint32_t 251 ulpi_wakeup(struct imxehci_softc *sc, int tout) 252 { 253 struct ehci_softc *hsc = &sc->sc_hsc; 254 uint32_t ulpi_view; 255 256 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 257 258 if (!(ulpi_view & ULPI_SS)) { 259 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 260 IMXUSB_ULPIVIEW, ULPI_WU); 261 while (tout-- > 0) { 262 ulpi_view = bus_space_read_4(sc->sc_iot, 263 sc->sc_ioh, IMXUSB_ULPIVIEW); 264 if (!(ulpi_view & ULPI_WU)) 265 break; 266 delay(1); 267 }; 268 } 269 270 if (tout == 0) 271 aprint_error_dev(hsc->sc_dev, "%s: timeout\n", __func__); 272 273 return ulpi_view; 274 } 275 276 static uint32_t 277 ulpi_wait(struct imxehci_softc *sc, int tout) 278 { 279 struct ehci_softc *hsc = &sc->sc_hsc; 280 uint32_t ulpi_view; 281 282 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 283 284 while (tout-- > 0) { 285 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 286 IMXUSB_ULPIVIEW); 287 if (!(ulpi_view & ULPI_RUN)) 288 break; 289 delay(1); 290 } 291 292 if (tout == 0) 293 aprint_error_dev(hsc->sc_dev, "%s: timeout\n", __func__); 294 295 return ulpi_view; 296 } 297 298 #define TIMEOUT 100000 299 300 uint8_t 301 imxusb_ulpi_read(struct imxehci_softc *sc, int addr) 302 { 303 uint32_t reg; 304 305 ulpi_wakeup(sc, TIMEOUT); 306 307 reg = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR); 308 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg); 309 310 reg = ulpi_wait(sc, TIMEOUT); 311 312 return __SHIFTOUT(reg, ULPI_DATRD); 313 } 314 315 void 316 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data) 317 { 318 uint32_t reg; 319 320 ulpi_wakeup(sc, TIMEOUT); 321 322 reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR); 323 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg); 324 325 ulpi_wait(sc, TIMEOUT); 326 327 return; 328 } 329 330 static void 331 ulpi_reset(struct imxehci_softc *sc) 332 { 333 struct ehci_softc *hsc = &sc->sc_hsc; 334 uint8_t data; 335 int timo = 1000 * 1000; /* XXXX: 1sec */ 336 337 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, 338 FUNCTION_CONTROL_RESET /*0x20*/); 339 do { 340 data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL); 341 if (!(data & FUNCTION_CONTROL_RESET)) 342 break; 343 delay(100); 344 timo -= 100; 345 } while (timo > 0); 346 347 if (timo <= 0) { 348 aprint_error_dev(hsc->sc_dev, "%s: reset failed!!\n", 349 __func__); 350 return; 351 } 352 353 return; 354 } 355 356 void 357 imxehci_reset(struct imxehci_softc *sc) 358 { 359 uint32_t reg; 360 struct ehci_softc *hsc = &sc->sc_hsc; 361 int tout; 362 #define RESET_TIMEOUT 100 363 364 reg = EOREAD4(hsc, EHCI_USBCMD); 365 reg &= ~EHCI_CMD_RS; 366 EOWRITE4(hsc, EHCI_USBCMD, reg); 367 368 for (tout = RESET_TIMEOUT; tout > 0; tout--) { 369 reg = EOREAD4(hsc, EHCI_USBCMD); 370 if ((reg & EHCI_CMD_RS) == 0) 371 break; 372 usb_delay_ms(&hsc->sc_bus, 1); 373 } 374 375 EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET); 376 377 for (tout = RESET_TIMEOUT; tout > 0; tout--) { 378 reg = EOREAD4(hsc, EHCI_USBCMD); 379 if ((reg & EHCI_CMD_HCRESET) == 0) 380 break; 381 usb_delay_ms(&hsc->sc_bus, 1); 382 } 383 384 if (tout == 0) 385 aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg); 386 387 usb_delay_ms(&hsc->sc_bus, 100); 388 } 389 390 static void 391 imxehci_init(struct ehci_softc *hsc) 392 { 393 struct imxehci_softc *sc = device_private(hsc->sc_dev); 394 uint32_t reg; 395 396 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 397 reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC); 398 reg |= EHCI_PS_PP | EHCI_PS_PE; 399 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 400 401 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC); 402 reg |= OTGSC_IDPU; 403 /* disable IDIE not to conflict with SSP1_DETECT. */ 404 //reg |= OTGSC_DPIE | OTGSC_IDIE; 405 reg |= OTGSC_DPIE; 406 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg); 407 408 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE); 409 reg &= ~USBMODE_CM; 410 reg |= USBMODE_CM_HOST; 411 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE, reg); 412 } 413
Indexes created Thu Oct 02 10:09:58 GMT 2025