imxusb.c revision 1.4 1 /* $NetBSD: imxusb.c,v 1.4 2012/11/23 02:17:15 matt Exp $ */
2 /*
3 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
4 * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.4 2012/11/23 02:17:15 matt Exp $");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/conf.h>
33 #include <sys/kernel.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/bus.h>
37
38 #include <dev/usb/usb.h>
39 #include <dev/usb/usbdi.h>
40 #include <dev/usb/usbdivar.h>
41 #include <dev/usb/usb_mem.h>
42
43 #include <dev/usb/ehcireg.h>
44 #include <dev/usb/ehcivar.h>
45
46 #include <arm/imx/imxusbreg.h>
47 #include <arm/imx/imxusbvar.h>
48 #include <arm/imx/imxgpiovar.h>
49 #include "locators.h"
50
51 #include <dev/usb/ulpireg.h> /* for test */
52
53 static int imxehci_match(device_t, cfdata_t, void *);
54 static void imxehci_attach(device_t, device_t, void *);
55
56 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
57 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
58 static void ulpi_reset(struct imxehci_softc *sc);
59
60
61
62 /* attach structures */
63 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
64 imxehci_match, imxehci_attach, NULL, NULL);
65
66 static int
67 imxehci_match(device_t parent, cfdata_t cf, void *aux)
68 {
69 struct imxusbc_attach_args *aa = aux;
70
71 if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
72 return 0;
73 }
74
75 return 1;
76 }
77
78 static void
79 imxehci_attach(device_t parent, device_t self, void *aux)
80 {
81 struct imxusbc_attach_args *aa = aux;
82 struct imxusbc_softc *usbc = device_private(parent);
83 struct imxehci_softc *sc = device_private(self);
84 ehci_softc_t *hsc = &sc->sc_hsc;
85 bus_space_tag_t iot;
86 uint16_t hcirev;
87 usbd_status r;
88 uint32_t id, hwhost, hwdevice;
89 const char *comma;
90
91 sc->sc_hsc.sc_dev = self;
92 iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot;
93 sc->sc_unit = aa->aa_unit;
94 sc->sc_usbc = usbc;
95 hsc->sc_bus.hci_private = sc;
96 hsc->sc_flags |= EHCIF_ETTF;
97
98 aprint_normal("\n");
99
100 /* per unit registers */
101 if (bus_space_subregion(iot, aa->aa_ioh,
102 aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
103 &sc->sc_ioh) ||
104 bus_space_subregion(iot, aa->aa_ioh,
105 aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS,
106 IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS,
107 &sc->sc_hsc.ioh)) {
108
109 aprint_error_dev(self, "can't subregion\n");
110 return;
111 }
112
113 id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
114 hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
115
116 aprint_normal_dev(self,
117 "i.MX USB Controller id=%d revision=%d HCI revision=0x%x\n",
118 id & (uint32_t)IMXUSB_ID_ID_MASK,
119 (id & (uint32_t)IMXUSB_ID_REVISION_MASK) >>
120 IMXUSB_ID_REVISION_SHIFT,
121 hcirev);
122
123 hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
124 hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
125
126 aprint_normal_dev(self, "");
127
128 comma = "";
129 if (hwhost & HWHOST_HC) {
130 int n_ports = 1 + ((hwhost & HWHOST_NPORT_MASK) >>
131 HWHOST_NPORT_SHIFT);
132 aprint_normal("%d host port%s",
133 n_ports, n_ports > 1 ? "s" : "");
134 comma = ", ";
135 }
136
137 if (hwdevice & HWDEVICE_DC) {
138 int n_endpoints = (hwdevice & HWDEVICE_DEVEP_MASK) >>
139 HWDEVICE_DEVEP_SHIFT;
140 aprint_normal("%sdevice capable, %d endpoint%s",
141 comma,
142 n_endpoints, n_endpoints > 1 ? "s" : "");
143 }
144 aprint_normal("\n");
145
146 sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
147
148 sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
149 EHCI_CAPLENGTH);
150
151 /* Platform dependent setup */
152 if (usbc->sc_init_md_hook)
153 usbc->sc_init_md_hook(sc);
154
155
156 imxehci_reset(sc);
157 imxehci_select_interface(sc, sc->sc_iftype);
158
159 if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
160 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
161
162 aprint_normal_dev(hsc->sc_dev,
163 "ULPI phy VID 0x%04x PID 0x%04x\n",
164 (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
165 imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
166 (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
167 imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
168
169 ulpi_reset(sc);
170
171 }
172
173 imxehci_host_mode(sc);
174
175 if (usbc->sc_setup_md_hook)
176 usbc->sc_setup_md_hook(sc, IMXUSB_HOST);
177 else if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
178 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
179 OTG_CONTROL_IDPULLUP);
180
181 imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
182 OTG_CONTROL_USEEXTVBUSIND |
183 OTG_CONTROL_DRVVBUSEXT |
184 OTG_CONTROL_DRVVBUS |
185 OTG_CONTROL_CHRGVBUS
186 );
187 }
188
189 /* Disable interrupts, so we don't get any spurious ones. */
190 EOWRITE4(hsc, EHCI_USBINTR, 0);
191
192 intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
193
194 /* Figure out vendor for root hub descriptor. */
195 strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor));
196
197 r = ehci_init(hsc);
198 if (r != USBD_NORMAL_COMPLETION) {
199 aprint_error_dev(self, "init failed, error=%d\n", r);
200 return;
201 }
202
203 /* Attach usb device. */
204 hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint);
205 }
206
207
208
209
210 void
211 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
212 {
213 uint32_t reg;
214 struct ehci_softc *hsc = &sc->sc_hsc;
215
216 reg = EOREAD4(hsc, EHCI_PORTSC(1));
217 reg = (reg & ~PORTSC_PTS_MASK) | (interface << PORTSC_PTS_SHIFT);
218 EOWRITE4(hsc, EHCI_PORTSC(1), reg);
219 }
220
221
222 static uint32_t
223 ulpi_wakeup(struct imxehci_softc *sc, int tout)
224 {
225 uint32_t ulpi_view;
226 int i = 0;
227 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
228
229 if ( !(ulpi_view & ULPI_SS) ) {
230 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
231 IMXUSB_ULPIVIEW, ULPI_WU);
232 for (i = 0; (tout < 0) || (i < tout); i++) {
233 ulpi_view = bus_space_read_4(sc->sc_iot,
234 sc->sc_ioh, IMXUSB_ULPIVIEW);
235 if ( !(ulpi_view & ULPI_WU) )
236 break;
237 delay(1);
238 };
239 }
240
241 if ((tout > 0) && (i >= tout)) {
242 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
243 }
244
245 return ulpi_view;
246 }
247
248 static uint32_t
249 ulpi_wait(struct imxehci_softc *sc, int tout)
250 {
251 uint32_t ulpi_view;
252 int i;
253 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
254
255 for (i = 0; (tout < 0) | (i < tout); i++) {
256 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
257 IMXUSB_ULPIVIEW);
258 if (!(ulpi_view & ULPI_RUN))
259 break;
260 delay(1);
261 }
262
263 if ((tout > 0) && (i >= tout)) {
264 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
265 }
266
267 return ulpi_view;
268 }
269
270 #define TIMEOUT 100000
271
272 uint8_t
273 imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
274 {
275 uint32_t data;
276
277 ulpi_wakeup(sc, TIMEOUT);
278
279 data = ULPI_RUN | (addr << ULPI_ADDR_SHIFT);
280 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data);
281
282 data = ulpi_wait(sc, TIMEOUT);
283
284 return (data & ULPI_DATRD_MASK) >> ULPI_DATRD_SHIFT;
285 }
286
287 void
288 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
289 {
290 uint32_t reg;
291
292 ulpi_wakeup(sc, TIMEOUT);
293
294 reg = ULPI_RUN | ULPI_RW | ((addr) << ULPI_ADDR_SHIFT) | data;
295 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
296
297 ulpi_wait(sc, TIMEOUT);
298
299 return;
300 }
301
302 #if 0
303 static int
304 ulpi_scratch_test(struct imxehci_softc *sc)
305 {
306 uint32_t ulpi_view;
307
308 ulpi_view = ulpi_wakeup(sc, 1000);
309 if (ulpi_view & ULPI_WU) {
310 return -1;
311 }
312
313 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW,
314 (ULPI_RUN | ULPI_RW |
315 (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA));
316
317 ulpi_view = ulpi_wait(sc, 1000);
318
319 if (ulpi_view & ULPI_RUN) {
320 return -1;
321 }
322
323 return 0;
324 }
325 #endif
326
327 static void
328 ulpi_reset(struct imxehci_softc *sc)
329 {
330 uint8_t data;
331 int timo = 1000 * 1000; /* XXXX: 1sec */
332
333 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
334 FUNCTION_CONTROL_RESET /*0x20*/);
335 do {
336 data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
337 if (!(data & FUNCTION_CONTROL_RESET))
338 break;
339 delay(100);
340 timo -= 100;
341 } while (timo > 0);
342 if (timo <= 0) {
343 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n",
344 __func__);
345 return;
346 }
347
348 return;
349 }
350
351 void
352 imxehci_reset(struct imxehci_softc *sc)
353 {
354 uint32_t reg;
355 int i;
356 struct ehci_softc *hsc = &sc->sc_hsc;
357 #define RESET_TIMEOUT 100
358
359 reg = EOREAD4(hsc, EHCI_USBCMD);
360 reg &= ~EHCI_CMD_RS;
361 EOWRITE4(hsc, EHCI_USBCMD, reg);
362
363 for (i=0; i < RESET_TIMEOUT; ++i) {
364 reg = EOREAD4(hsc, EHCI_USBCMD);
365 if ((reg & EHCI_CMD_RS) == 0)
366 break;
367 usb_delay_ms(&hsc->sc_bus, 1);
368 }
369
370 EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
371 for (i = 0; i < RESET_TIMEOUT; i++) {
372 reg = EOREAD4(hsc, EHCI_USBCMD);
373 if ((reg & EHCI_CMD_HCRESET) == 0)
374 break;
375 usb_delay_ms(&hsc->sc_bus, 1);
376 }
377 if (i >= RESET_TIMEOUT) {
378 aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
379 }
380
381 usb_delay_ms(&hsc->sc_bus, 100);
382 }
383
384 void
385 imxehci_host_mode(struct imxehci_softc *sc)
386 {
387 struct ehci_softc *hsc = &sc->sc_hsc;
388 uint32_t reg;
389
390 reg = EOREAD4(hsc, EHCI_PORTSC(1));
391 reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
392 reg |= EHCI_PS_PP | EHCI_PS_PE;
393 EOWRITE4(hsc, EHCI_PORTSC(1), reg);
394
395 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
396 reg |= OTGSC_IDPU;
397 reg |= OTGSC_DPIE | OTGSC_IDIE;
398 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
399
400 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE);
401 reg |= USBMODE_HOST;
402 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg);
403 }
404