imxusb.c revision 1.6 1 /* $NetBSD: imxusb.c,v 1.6 2014/07/25 07:49:56 hkenken Exp $ */
2 /*
3 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
4 * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.6 2014/07/25 07:49:56 hkenken Exp $");
29
30 #include "opt_imx.h"
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/conf.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/intr.h>
38 #include <sys/bus.h>
39
40 #include <dev/usb/usb.h>
41 #include <dev/usb/usbdi.h>
42 #include <dev/usb/usbdivar.h>
43 #include <dev/usb/usb_mem.h>
44
45 #include <dev/usb/ehcireg.h>
46 #include <dev/usb/ehcivar.h>
47
48 #include <arm/pic/picvar.h> /* XXX: for intr_establish! */
49
50 #include <arm/imx/imxusbreg.h>
51 #include <arm/imx/imxusbvar.h>
52 #include <arm/imx/imxgpiovar.h>
53 #include "locators.h"
54
55 #include <dev/usb/ulpireg.h> /* for test */
56
57 static int imxehci_match(device_t, cfdata_t, void *);
58 static void imxehci_attach(device_t, device_t, void *);
59
60 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
61 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
62 static void ulpi_reset(struct imxehci_softc *sc);
63
64
65
66 /* attach structures */
67 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
68 imxehci_match, imxehci_attach, NULL, NULL);
69
70 static int
71 imxehci_match(device_t parent, cfdata_t cf, void *aux)
72 {
73 struct imxusbc_attach_args *aa = aux;
74
75 if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
76 return 0;
77 }
78
79 return 1;
80 }
81
82 static void
83 imxehci_attach(device_t parent, device_t self, void *aux)
84 {
85 struct imxusbc_attach_args *aa = aux;
86 struct imxusbc_softc *usbc = device_private(parent);
87 struct imxehci_softc *sc = device_private(self);
88 ehci_softc_t *hsc = &sc->sc_hsc;
89 bus_space_tag_t iot;
90 uint16_t hcirev;
91 usbd_status r;
92 uint32_t id, hwhost, hwdevice;
93 const char *comma;
94
95 sc->sc_hsc.sc_dev = self;
96 iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot;
97 sc->sc_unit = aa->aa_unit;
98 sc->sc_usbc = usbc;
99 hsc->sc_bus.hci_private = sc;
100 hsc->sc_flags |= EHCIF_ETTF;
101
102 aprint_normal("\n");
103
104 /* per unit registers */
105 if (bus_space_subregion(iot, aa->aa_ioh,
106 aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
107 &sc->sc_ioh) ||
108 bus_space_subregion(iot, aa->aa_ioh,
109 aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS,
110 IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS,
111 &sc->sc_hsc.ioh)) {
112
113 aprint_error_dev(self, "can't subregion\n");
114 return;
115 }
116
117 id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
118 hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
119
120 aprint_normal_dev(self,
121 "i.MX USB Controller id=%d revision=%d HCI revision=0x%x\n",
122 (int)__SHIFTOUT(id, IMXUSB_ID_ID),
123 (int)__SHIFTOUT(id, IMXUSB_ID_REVISION),
124 hcirev);
125
126 hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
127 hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
128
129 aprint_normal_dev(self, "");
130
131 comma = "";
132 if (hwhost & HWHOST_HC) {
133 int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT);
134 aprint_normal("%d host port%s",
135 n_ports, n_ports > 1 ? "s" : "");
136 comma = ", ";
137 }
138
139 if (hwdevice & HWDEVICE_DC) {
140 int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP);
141 aprint_normal("%sdevice capable, %d endpoint%s",
142 comma,
143 n_endpoints, n_endpoints > 1 ? "s" : "");
144 }
145 aprint_normal("\n");
146
147 sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
148
149 sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
150 EHCI_CAPLENGTH);
151
152 /* Platform dependent setup */
153 if (usbc->sc_init_md_hook)
154 usbc->sc_init_md_hook(sc);
155
156
157 imxehci_reset(sc);
158 imxehci_select_interface(sc, sc->sc_iftype);
159
160 if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
161 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
162
163 aprint_normal_dev(hsc->sc_dev,
164 "ULPI phy VID 0x%04x PID 0x%04x\n",
165 (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
166 imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
167 (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
168 imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
169
170 ulpi_reset(sc);
171
172 }
173
174 imxehci_host_mode(sc);
175
176 if (usbc->sc_setup_md_hook)
177 usbc->sc_setup_md_hook(sc, IMXUSB_HOST);
178
179 if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
180 #if 0
181 if(hsc->sc_bus.usbrev == USBREV_2_0)
182 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0));
183 else
184 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2));
185 #endif
186
187 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
188 OTG_CONTROL_IDPULLUP);
189
190 imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
191 OTG_CONTROL_USEEXTVBUSIND |
192 OTG_CONTROL_DRVVBUSEXT |
193 OTG_CONTROL_DRVVBUS |
194 OTG_CONTROL_CHRGVBUS
195 );
196 }
197
198 /* Disable interrupts, so we don't get any spurious ones. */
199 EOWRITE4(hsc, EHCI_USBINTR, 0);
200
201 intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
202
203 /* Figure out vendor for root hub descriptor. */
204 strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor));
205
206 r = ehci_init(hsc);
207 if (r != USBD_NORMAL_COMPLETION) {
208 aprint_error_dev(self, "init failed, error=%d\n", r);
209 return;
210 }
211
212 /* Attach usb device. */
213 hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint);
214 }
215
216
217
218
219 void
220 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
221 {
222 uint32_t reg;
223 struct ehci_softc *hsc = &sc->sc_hsc;
224
225 reg = EOREAD4(hsc, EHCI_PORTSC(1));
226 reg &= ~(PORTSC_PTS | PORTSC_PTW);
227 switch (interface) {
228 case IMXUSBC_IF_UTMI_WIDE:
229 reg |= PORTSC_PTW_16;
230 case IMXUSBC_IF_UTMI:
231 reg |= PORTSC_PTS_UTMI;
232 break;
233 case IMXUSBC_IF_PHILIPS:
234 reg |= PORTSC_PTS_PHILIPS;
235 break;
236 case IMXUSBC_IF_ULPI:
237 reg |= PORTSC_PTS_ULPI;
238 break;
239 case IMXUSBC_IF_SERIAL:
240 reg |= PORTSC_PTS_SERIAL;
241 break;
242 }
243 EOWRITE4(hsc, EHCI_PORTSC(1), reg);
244 }
245
246
247 static uint32_t
248 ulpi_wakeup(struct imxehci_softc *sc, int tout)
249 {
250 uint32_t ulpi_view;
251 int i = 0;
252 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
253
254 if ( !(ulpi_view & ULPI_SS) ) {
255 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
256 IMXUSB_ULPIVIEW, ULPI_WU);
257 for (i = 0; (tout < 0) || (i < tout); i++) {
258 ulpi_view = bus_space_read_4(sc->sc_iot,
259 sc->sc_ioh, IMXUSB_ULPIVIEW);
260 if ( !(ulpi_view & ULPI_WU) )
261 break;
262 delay(1);
263 };
264 }
265
266 if ((tout > 0) && (i >= tout)) {
267 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
268 }
269
270 return ulpi_view;
271 }
272
273 static uint32_t
274 ulpi_wait(struct imxehci_softc *sc, int tout)
275 {
276 uint32_t ulpi_view;
277 int i;
278 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
279
280 for (i = 0; (tout < 0) | (i < tout); i++) {
281 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
282 IMXUSB_ULPIVIEW);
283 if (!(ulpi_view & ULPI_RUN))
284 break;
285 delay(1);
286 }
287
288 if ((tout > 0) && (i >= tout)) {
289 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
290 }
291
292 return ulpi_view;
293 }
294
295 #define TIMEOUT 100000
296
297 uint8_t
298 imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
299 {
300 uint32_t data;
301
302 ulpi_wakeup(sc, TIMEOUT);
303
304 data = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR);
305 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data);
306
307 data = ulpi_wait(sc, TIMEOUT);
308
309 return __SHIFTOUT(data, ULPI_DATRD);
310 }
311
312 void
313 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
314 {
315 uint32_t reg;
316
317 ulpi_wakeup(sc, TIMEOUT);
318
319 reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR);
320 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
321
322 ulpi_wait(sc, TIMEOUT);
323
324 return;
325 }
326
327 #if 0
328 static int
329 ulpi_scratch_test(struct imxehci_softc *sc)
330 {
331 uint32_t ulpi_view;
332
333 ulpi_view = ulpi_wakeup(sc, 1000);
334 if (ulpi_view & ULPI_WU) {
335 return -1;
336 }
337
338 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW,
339 (ULPI_RUN | ULPI_RW |
340 (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA));
341
342 ulpi_view = ulpi_wait(sc, 1000);
343
344 if (ulpi_view & ULPI_RUN) {
345 return -1;
346 }
347
348 return 0;
349 }
350 #endif
351
352 static void
353 ulpi_reset(struct imxehci_softc *sc)
354 {
355 uint8_t data;
356 int timo = 1000 * 1000; /* XXXX: 1sec */
357
358 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
359 FUNCTION_CONTROL_RESET /*0x20*/);
360 do {
361 data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
362 if (!(data & FUNCTION_CONTROL_RESET))
363 break;
364 delay(100);
365 timo -= 100;
366 } while (timo > 0);
367 if (timo <= 0) {
368 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n",
369 __func__);
370 return;
371 }
372
373 return;
374 }
375
376 void
377 imxehci_reset(struct imxehci_softc *sc)
378 {
379 uint32_t reg;
380 int i;
381 struct ehci_softc *hsc = &sc->sc_hsc;
382 #define RESET_TIMEOUT 100
383
384 reg = EOREAD4(hsc, EHCI_USBCMD);
385 reg &= ~EHCI_CMD_RS;
386 EOWRITE4(hsc, EHCI_USBCMD, reg);
387
388 for (i=0; i < RESET_TIMEOUT; ++i) {
389 reg = EOREAD4(hsc, EHCI_USBCMD);
390 if ((reg & EHCI_CMD_RS) == 0)
391 break;
392 usb_delay_ms(&hsc->sc_bus, 1);
393 }
394
395 EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
396 for (i = 0; i < RESET_TIMEOUT; i++) {
397 reg = EOREAD4(hsc, EHCI_USBCMD);
398 if ((reg & EHCI_CMD_HCRESET) == 0)
399 break;
400 usb_delay_ms(&hsc->sc_bus, 1);
401 }
402 if (i >= RESET_TIMEOUT) {
403 aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
404 }
405
406 usb_delay_ms(&hsc->sc_bus, 100);
407 }
408
409 void
410 imxehci_host_mode(struct imxehci_softc *sc)
411 {
412 struct ehci_softc *hsc = &sc->sc_hsc;
413 uint32_t reg;
414
415 reg = EOREAD4(hsc, EHCI_PORTSC(1));
416 reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
417 reg |= EHCI_PS_PP | EHCI_PS_PE;
418 EOWRITE4(hsc, EHCI_PORTSC(1), reg);
419
420 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
421 reg |= OTGSC_IDPU;
422 /* disable IDIE not to conflict with SSP1_DETECT. */
423 //reg |= OTGSC_DPIE | OTGSC_IDIE;
424 reg |= OTGSC_DPIE;
425 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
426
427 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE);
428 reg |= USBMODE_CM_HOST;
429 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg);
430 }
431