imxusb.c revision 1.7
1 /* $NetBSD: imxusb.c,v 1.7 2014/09/25 05:05:28 ryo Exp $ */ 2 /* 3 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved. 4 * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.7 2014/09/25 05:05:28 ryo Exp $"); 29 30 #include "opt_imx.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/conf.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/intr.h> 38 #include <sys/bus.h> 39 40 #include <dev/usb/usb.h> 41 #include <dev/usb/usbdi.h> 42 #include <dev/usb/usbdivar.h> 43 #include <dev/usb/usb_mem.h> 44 45 #include <dev/usb/ehcireg.h> 46 #include <dev/usb/ehcivar.h> 47 48 #include <arm/pic/picvar.h> /* XXX: for intr_establish! */ 49 50 #include <arm/imx/imxusbreg.h> 51 #include <arm/imx/imxusbvar.h> 52 #include <arm/imx/imxgpiovar.h> 53 #include "locators.h" 54 55 #include <dev/usb/ulpireg.h> /* for test */ 56 57 static int imxehci_match(device_t, cfdata_t, void *); 58 static void imxehci_attach(device_t, device_t, void *); 59 60 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr); 61 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data); 62 static void ulpi_reset(struct imxehci_softc *sc); 63 64 65 66 /* attach structures */ 67 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc), 68 imxehci_match, imxehci_attach, NULL, NULL); 69 70 static int 71 imxehci_match(device_t parent, cfdata_t cf, void *aux) 72 { 73 struct imxusbc_attach_args *aa = aux; 74 75 if (aa->aa_unit < 0 || 3 < aa->aa_unit) { 76 return 0; 77 } 78 79 return 1; 80 } 81 82 static void 83 imxehci_attach(device_t parent, device_t self, void *aux) 84 { 85 struct imxusbc_attach_args *aa = aux; 86 struct imxusbc_softc *usbc = device_private(parent); 87 struct imxehci_softc *sc = device_private(self); 88 ehci_softc_t *hsc = &sc->sc_hsc; 89 bus_space_tag_t iot; 90 uint16_t hcirev; 91 usbd_status r; 92 uint32_t id, hwhost, hwdevice; 93 const char *comma; 94 95 sc->sc_hsc.sc_dev = self; 96 iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot; 97 sc->sc_unit = aa->aa_unit; 98 sc->sc_usbc = usbc; 99 hsc->sc_bus.hci_private = sc; 100 hsc->sc_flags |= EHCIF_ETTF; 101 102 aprint_naive("\n"); 103 aprint_normal(": i.MX USB Controller\n"); 104 105 /* per unit registers */ 106 if (bus_space_subregion(iot, aa->aa_ioh, 107 aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE, 108 &sc->sc_ioh) || 109 bus_space_subregion(iot, aa->aa_ioh, 110 aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS, 111 IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS, 112 &sc->sc_hsc.ioh)) { 113 114 aprint_error_dev(self, "can't subregion\n"); 115 return; 116 } 117 118 id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID); 119 hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION); 120 121 aprint_normal_dev(self, 122 "id=%d revision=%d HCI revision=0x%x\n", 123 (int)__SHIFTOUT(id, IMXUSB_ID_ID), 124 (int)__SHIFTOUT(id, IMXUSB_ID_REVISION), 125 hcirev); 126 127 hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST); 128 hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE); 129 130 aprint_normal_dev(self, ""); 131 132 comma = ""; 133 if (hwhost & HWHOST_HC) { 134 int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT); 135 aprint_normal("%d host port%s", 136 n_ports, n_ports > 1 ? "s" : ""); 137 comma = ", "; 138 } 139 140 if (hwdevice & HWDEVICE_DC) { 141 int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP); 142 aprint_normal("%sdevice capable, %d endpoint%s", 143 comma, 144 n_endpoints, n_endpoints > 1 ? "s" : ""); 145 } 146 aprint_normal("\n"); 147 148 sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat; 149 150 sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh, 151 EHCI_CAPLENGTH); 152 153 /* Platform dependent setup */ 154 if (usbc->sc_init_md_hook) 155 usbc->sc_init_md_hook(sc); 156 157 158 imxehci_reset(sc); 159 imxehci_select_interface(sc, sc->sc_iftype); 160 161 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0); 163 164 aprint_normal_dev(hsc->sc_dev, 165 "ULPI phy VID 0x%04x PID 0x%04x\n", 166 (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) | 167 imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8), 168 (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) | 169 imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8)); 170 171 ulpi_reset(sc); 172 173 } 174 175 imxehci_host_mode(sc); 176 177 if (usbc->sc_setup_md_hook) 178 usbc->sc_setup_md_hook(sc, IMXUSB_HOST); 179 180 if (sc->sc_iftype == IMXUSBC_IF_ULPI) { 181 #if 0 182 if(hsc->sc_bus.usbrev == USBREV_2_0) 183 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0)); 184 else 185 ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2)); 186 #endif 187 188 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, 189 OTG_CONTROL_IDPULLUP); 190 191 imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET, 192 OTG_CONTROL_USEEXTVBUSIND | 193 OTG_CONTROL_DRVVBUSEXT | 194 OTG_CONTROL_DRVVBUS | 195 OTG_CONTROL_CHRGVBUS 196 ); 197 } 198 199 /* Disable interrupts, so we don't get any spurious ones. */ 200 EOWRITE4(hsc, EHCI_USBINTR, 0); 201 202 intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc); 203 204 /* Figure out vendor for root hub descriptor. */ 205 strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor)); 206 207 r = ehci_init(hsc); 208 if (r != USBD_NORMAL_COMPLETION) { 209 aprint_error_dev(self, "init failed, error=%d\n", r); 210 return; 211 } 212 213 /* Attach usb device. */ 214 hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint); 215 } 216 217 218 219 220 void 221 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface) 222 { 223 uint32_t reg; 224 struct ehci_softc *hsc = &sc->sc_hsc; 225 226 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 227 reg &= ~(PORTSC_PTS | PORTSC_PTW); 228 switch (interface) { 229 case IMXUSBC_IF_UTMI_WIDE: 230 reg |= PORTSC_PTW_16; 231 case IMXUSBC_IF_UTMI: 232 reg |= PORTSC_PTS_UTMI; 233 break; 234 case IMXUSBC_IF_PHILIPS: 235 reg |= PORTSC_PTS_PHILIPS; 236 break; 237 case IMXUSBC_IF_ULPI: 238 reg |= PORTSC_PTS_ULPI; 239 break; 240 case IMXUSBC_IF_SERIAL: 241 reg |= PORTSC_PTS_SERIAL; 242 break; 243 } 244 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 245 } 246 247 248 static uint32_t 249 ulpi_wakeup(struct imxehci_softc *sc, int tout) 250 { 251 uint32_t ulpi_view; 252 int i = 0; 253 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 254 255 if ( !(ulpi_view & ULPI_SS) ) { 256 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 257 IMXUSB_ULPIVIEW, ULPI_WU); 258 for (i = 0; (tout < 0) || (i < tout); i++) { 259 ulpi_view = bus_space_read_4(sc->sc_iot, 260 sc->sc_ioh, IMXUSB_ULPIVIEW); 261 if ( !(ulpi_view & ULPI_WU) ) 262 break; 263 delay(1); 264 }; 265 } 266 267 if ((tout > 0) && (i >= tout)) { 268 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__); 269 } 270 271 return ulpi_view; 272 } 273 274 static uint32_t 275 ulpi_wait(struct imxehci_softc *sc, int tout) 276 { 277 uint32_t ulpi_view; 278 int i; 279 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW); 280 281 for (i = 0; (tout < 0) | (i < tout); i++) { 282 ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 283 IMXUSB_ULPIVIEW); 284 if (!(ulpi_view & ULPI_RUN)) 285 break; 286 delay(1); 287 } 288 289 if ((tout > 0) && (i >= tout)) { 290 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__); 291 } 292 293 return ulpi_view; 294 } 295 296 #define TIMEOUT 100000 297 298 uint8_t 299 imxusb_ulpi_read(struct imxehci_softc *sc, int addr) 300 { 301 uint32_t data; 302 303 ulpi_wakeup(sc, TIMEOUT); 304 305 data = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR); 306 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data); 307 308 data = ulpi_wait(sc, TIMEOUT); 309 310 return __SHIFTOUT(data, ULPI_DATRD); 311 } 312 313 void 314 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data) 315 { 316 uint32_t reg; 317 318 ulpi_wakeup(sc, TIMEOUT); 319 320 reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR); 321 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg); 322 323 ulpi_wait(sc, TIMEOUT); 324 325 return; 326 } 327 328 #if 0 329 static int 330 ulpi_scratch_test(struct imxehci_softc *sc) 331 { 332 uint32_t ulpi_view; 333 334 ulpi_view = ulpi_wakeup(sc, 1000); 335 if (ulpi_view & ULPI_WU) { 336 return -1; 337 } 338 339 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 340 (ULPI_RUN | ULPI_RW | 341 (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA)); 342 343 ulpi_view = ulpi_wait(sc, 1000); 344 345 if (ulpi_view & ULPI_RUN) { 346 return -1; 347 } 348 349 return 0; 350 } 351 #endif 352 353 static void 354 ulpi_reset(struct imxehci_softc *sc) 355 { 356 uint8_t data; 357 int timo = 1000 * 1000; /* XXXX: 1sec */ 358 359 imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, 360 FUNCTION_CONTROL_RESET /*0x20*/); 361 do { 362 data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL); 363 if (!(data & FUNCTION_CONTROL_RESET)) 364 break; 365 delay(100); 366 timo -= 100; 367 } while (timo > 0); 368 if (timo <= 0) { 369 aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n", 370 __func__); 371 return; 372 } 373 374 return; 375 } 376 377 void 378 imxehci_reset(struct imxehci_softc *sc) 379 { 380 uint32_t reg; 381 int i; 382 struct ehci_softc *hsc = &sc->sc_hsc; 383 #define RESET_TIMEOUT 100 384 385 reg = EOREAD4(hsc, EHCI_USBCMD); 386 reg &= ~EHCI_CMD_RS; 387 EOWRITE4(hsc, EHCI_USBCMD, reg); 388 389 for (i=0; i < RESET_TIMEOUT; ++i) { 390 reg = EOREAD4(hsc, EHCI_USBCMD); 391 if ((reg & EHCI_CMD_RS) == 0) 392 break; 393 usb_delay_ms(&hsc->sc_bus, 1); 394 } 395 396 EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET); 397 for (i = 0; i < RESET_TIMEOUT; i++) { 398 reg = EOREAD4(hsc, EHCI_USBCMD); 399 if ((reg & EHCI_CMD_HCRESET) == 0) 400 break; 401 usb_delay_ms(&hsc->sc_bus, 1); 402 } 403 if (i >= RESET_TIMEOUT) { 404 aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg); 405 } 406 407 usb_delay_ms(&hsc->sc_bus, 100); 408 } 409 410 void 411 imxehci_host_mode(struct imxehci_softc *sc) 412 { 413 struct ehci_softc *hsc = &sc->sc_hsc; 414 uint32_t reg; 415 416 reg = EOREAD4(hsc, EHCI_PORTSC(1)); 417 reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC); 418 reg |= EHCI_PS_PP | EHCI_PS_PE; 419 EOWRITE4(hsc, EHCI_PORTSC(1), reg); 420 421 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC); 422 reg |= OTGSC_IDPU; 423 /* disable IDIE not to conflict with SSP1_DETECT. */ 424 //reg |= OTGSC_DPIE | OTGSC_IDIE; 425 reg |= OTGSC_DPIE; 426 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg); 427 428 reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE); 429 reg |= USBMODE_CM_HOST; 430 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg); 431 } 432
Indexes created Thu Oct 02 10:09:58 GMT 2025