1 1.3 ryo /* $NetBSD: imxwdog.c,v 1.3 2014/09/25 05:05:28 ryo Exp $ */ 2 1.1 hkenken 3 1.1 hkenken /* 4 1.1 hkenken * Copyright (c) 2010 Genetec Corporation. All rights reserved. 5 1.1 hkenken * Written by Hiroyuki Bessho for Genetec Corporation. 6 1.1 hkenken * 7 1.1 hkenken * Redistribution and use in source and binary forms, with or without 8 1.1 hkenken * modification, are permitted provided that the following conditions 9 1.1 hkenken * are met: 10 1.1 hkenken * 1. Redistributions of source code must retain the above copyright 11 1.1 hkenken * notice, this list of conditions and the following disclaimer. 12 1.1 hkenken * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 hkenken * notice, this list of conditions and the following disclaimer in the 14 1.1 hkenken * documentation and/or other materials provided with the distribution. 15 1.1 hkenken * 16 1.1 hkenken * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 1.1 hkenken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.1 hkenken * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.1 hkenken * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 1.1 hkenken * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.1 hkenken * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.1 hkenken * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.1 hkenken * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.1 hkenken * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.1 hkenken * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1 hkenken * POSSIBILITY OF SUCH DAMAGE. 27 1.1 hkenken */ 28 1.1 hkenken 29 1.1 hkenken #include <sys/cdefs.h> 30 1.3 ryo __KERNEL_RCSID(0, "$NetBSD: imxwdog.c,v 1.3 2014/09/25 05:05:28 ryo Exp $"); 31 1.1 hkenken 32 1.1 hkenken #include "opt_imx.h" 33 1.1 hkenken 34 1.1 hkenken #include <sys/param.h> 35 1.1 hkenken #include <sys/bus.h> 36 1.1 hkenken #include <sys/cpu.h> 37 1.1 hkenken #include <sys/device.h> 38 1.1 hkenken #include <sys/wdog.h> 39 1.1 hkenken 40 1.1 hkenken #include <prop/proplib.h> 41 1.1 hkenken 42 1.1 hkenken #include <dev/sysmon/sysmonvar.h> 43 1.1 hkenken 44 1.1 hkenken #include <arm/imx/imxwdogreg.h> 45 1.1 hkenken #include <arm/imx/imxwdogvar.h> 46 1.1 hkenken 47 1.1 hkenken struct wdog_softc { 48 1.1 hkenken struct sysmon_wdog sc_smw; 49 1.1 hkenken device_t sc_dev; 50 1.1 hkenken bus_space_tag_t sc_iot; 51 1.1 hkenken bus_space_handle_t sc_ioh; 52 1.1 hkenken 53 1.1 hkenken u_int sc_wdog_max_period; 54 1.1 hkenken u_int sc_wdog_period; 55 1.1 hkenken bool sc_wdog_armed; 56 1.1 hkenken }; 57 1.1 hkenken 58 1.1 hkenken #ifndef IMXWDOG_PERIOD_DEFAULT 59 1.1 hkenken #define IMXWDOG_PERIOD_DEFAULT 10 60 1.1 hkenken #endif 61 1.1 hkenken 62 1.1 hkenken CFATTACH_DECL_NEW(imxwdog, sizeof(struct wdog_softc), 63 1.1 hkenken wdog_match, wdog_attach, NULL, NULL); 64 1.1 hkenken 65 1.1 hkenken static inline uint16_t 66 1.1 hkenken wdog_read(struct wdog_softc *sc, bus_size_t o) 67 1.1 hkenken { 68 1.1 hkenken return bus_space_read_2(sc->sc_iot, sc->sc_ioh, o); 69 1.1 hkenken } 70 1.1 hkenken 71 1.1 hkenken static inline void 72 1.1 hkenken wdog_write(struct wdog_softc *sc, bus_size_t o, uint16_t v) 73 1.1 hkenken { 74 1.1 hkenken bus_space_write_2(sc->sc_iot, sc->sc_ioh, o, v); 75 1.1 hkenken } 76 1.1 hkenken 77 1.1 hkenken static int 78 1.1 hkenken wdog_tickle(struct sysmon_wdog *smw) 79 1.1 hkenken { 80 1.1 hkenken struct wdog_softc * const sc = smw->smw_cookie; 81 1.1 hkenken 82 1.1 hkenken wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC1); 83 1.1 hkenken wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC2); 84 1.1 hkenken 85 1.1 hkenken return 0; 86 1.1 hkenken } 87 1.1 hkenken 88 1.1 hkenken static int 89 1.1 hkenken wdog_setmode(struct sysmon_wdog *smw) 90 1.1 hkenken { 91 1.1 hkenken struct wdog_softc * const sc = smw->smw_cookie; 92 1.1 hkenken uint16_t reg; 93 1.1 hkenken 94 1.1 hkenken if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 95 1.1 hkenken /* this chip do not support wdt disable */ 96 1.1 hkenken aprint_debug_dev(sc->sc_dev, "setmode disable\n"); 97 1.1 hkenken return sc->sc_wdog_armed ? EBUSY : 0; 98 1.1 hkenken } 99 1.1 hkenken 100 1.1 hkenken /* 101 1.1 hkenken * If no changes, just tickle it and return. 102 1.1 hkenken */ 103 1.1 hkenken if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) { 104 1.1 hkenken wdog_tickle(smw); 105 1.1 hkenken aprint_debug_dev(sc->sc_dev, "setmode refresh\n"); 106 1.1 hkenken return 0; 107 1.1 hkenken } 108 1.1 hkenken 109 1.1 hkenken /* set default */ 110 1.1 hkenken if (smw->smw_period == WDOG_PERIOD_DEFAULT) { 111 1.1 hkenken sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT; 112 1.1 hkenken smw->smw_period = IMXWDOG_PERIOD_DEFAULT; 113 1.1 hkenken } 114 1.1 hkenken 115 1.1 hkenken /* 116 1.1 hkenken * Make sure we don't overflow the counter. 117 1.1 hkenken */ 118 1.1 hkenken if (smw->smw_period >= sc->sc_wdog_max_period) 119 1.1 hkenken return EINVAL; 120 1.1 hkenken 121 1.1 hkenken sc->sc_wdog_period = smw->smw_period; 122 1.1 hkenken sc->sc_wdog_armed = true; 123 1.1 hkenken 124 1.1 hkenken reg = wdog_read(sc, IMX_WDOG_WCR); 125 1.1 hkenken reg &= ~WCR_WT; 126 1.1 hkenken reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT); 127 1.1 hkenken reg |= WCR_WDE; 128 1.1 hkenken wdog_write(sc, IMX_WDOG_WCR, reg); 129 1.1 hkenken 130 1.1 hkenken return 0; 131 1.1 hkenken } 132 1.1 hkenken 133 1.1 hkenken void 134 1.2 hkenken wdog_attach_common(device_t parent, device_t self, 135 1.1 hkenken bus_space_tag_t iot, paddr_t addr, size_t size, int irq) 136 1.1 hkenken { 137 1.1 hkenken struct wdog_softc *sc = device_private(self); 138 1.1 hkenken uint16_t reg; 139 1.1 hkenken 140 1.1 hkenken sc->sc_dev = self; 141 1.1 hkenken sc->sc_iot = iot; 142 1.1 hkenken if (bus_space_map(iot, addr, size, 0, &sc->sc_ioh)) { 143 1.1 hkenken aprint_error_dev(self, "can't map\n"); 144 1.1 hkenken return; 145 1.1 hkenken } 146 1.1 hkenken 147 1.1 hkenken sc->sc_wdog_armed = __SHIFTOUT(wdog_read(sc, IMX_WDOG_WCR), WCR_WDE); 148 1.1 hkenken /* 149 1.1 hkenken * Does the config file tell us to turn on the watchdog? 150 1.1 hkenken */ 151 1.1 hkenken if (device_cfdata(self)->cf_flags & 1) 152 1.1 hkenken sc->sc_wdog_armed = true; 153 1.1 hkenken 154 1.1 hkenken sc->sc_wdog_max_period = 0xff / 2; 155 1.1 hkenken sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT; 156 1.1 hkenken 157 1.1 hkenken reg = wdog_read(sc, IMX_WDOG_WCR); 158 1.1 hkenken reg &= ~WCR_WT; 159 1.1 hkenken reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT); 160 1.1 hkenken wdog_write(sc, IMX_WDOG_WCR, reg); 161 1.1 hkenken 162 1.1 hkenken aprint_naive("\n"); 163 1.1 hkenken aprint_normal(": i.MX Watchdog Timer, default period is %u seconds%s\n", 164 1.1 hkenken sc->sc_wdog_period, 165 1.1 hkenken sc->sc_wdog_armed ? " (armed)" : ""); 166 1.1 hkenken 167 1.1 hkenken sc->sc_smw.smw_name = device_xname(self); 168 1.1 hkenken sc->sc_smw.smw_cookie = sc; 169 1.1 hkenken sc->sc_smw.smw_setmode = wdog_setmode; 170 1.1 hkenken sc->sc_smw.smw_tickle = wdog_tickle; 171 1.1 hkenken sc->sc_smw.smw_period = sc->sc_wdog_period; 172 1.1 hkenken 173 1.1 hkenken if (sysmon_wdog_register(&sc->sc_smw) != 0) 174 1.1 hkenken aprint_error_dev(self, "unable to register with sysmon\n"); 175 1.1 hkenken 176 1.1 hkenken if (sc->sc_wdog_armed) { 177 1.1 hkenken int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE, 178 1.1 hkenken sc->sc_wdog_period); 179 1.1 hkenken if (error) 180 1.1 hkenken aprint_error_dev(self, 181 1.1 hkenken "failed to start kernel tickler: %d\n", error); 182 1.1 hkenken else { 183 1.1 hkenken reg = wdog_read(sc, IMX_WDOG_WCR); 184 1.1 hkenken reg |= WCR_WDE; 185 1.1 hkenken wdog_write(sc, IMX_WDOG_WCR, reg); 186 1.1 hkenken } 187 1.3 ryo } 188 1.1 hkenken } 189