imxwdog.c revision 1.2.2.2 1 1.2.2.2 rmind /* $NetBSD: imxwdog.c,v 1.2.2.2 2014/05/18 17:44:58 rmind Exp $ */
2 1.2.2.2 rmind
3 1.2.2.2 rmind /*
4 1.2.2.2 rmind * Copyright (c) 2010 Genetec Corporation. All rights reserved.
5 1.2.2.2 rmind * Written by Hiroyuki Bessho for Genetec Corporation.
6 1.2.2.2 rmind *
7 1.2.2.2 rmind * Redistribution and use in source and binary forms, with or without
8 1.2.2.2 rmind * modification, are permitted provided that the following conditions
9 1.2.2.2 rmind * are met:
10 1.2.2.2 rmind * 1. Redistributions of source code must retain the above copyright
11 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer.
12 1.2.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright
13 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer in the
14 1.2.2.2 rmind * documentation and/or other materials provided with the distribution.
15 1.2.2.2 rmind *
16 1.2.2.2 rmind * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
17 1.2.2.2 rmind * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.2.2.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.2.2.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
20 1.2.2.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.2.2.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.2.2.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.2.2.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.2.2.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.2.2.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.2.2.2 rmind * POSSIBILITY OF SUCH DAMAGE.
27 1.2.2.2 rmind */
28 1.2.2.2 rmind
29 1.2.2.2 rmind #include <sys/cdefs.h>
30 1.2.2.2 rmind __KERNEL_RCSID(0, "$NetBSD: imxwdog.c,v 1.2.2.2 2014/05/18 17:44:58 rmind Exp $");
31 1.2.2.2 rmind
32 1.2.2.2 rmind #include "opt_imx.h"
33 1.2.2.2 rmind
34 1.2.2.2 rmind #include <sys/param.h>
35 1.2.2.2 rmind #include <sys/bus.h>
36 1.2.2.2 rmind #include <sys/cpu.h>
37 1.2.2.2 rmind #include <sys/device.h>
38 1.2.2.2 rmind #include <sys/wdog.h>
39 1.2.2.2 rmind
40 1.2.2.2 rmind #include <prop/proplib.h>
41 1.2.2.2 rmind
42 1.2.2.2 rmind #include <dev/sysmon/sysmonvar.h>
43 1.2.2.2 rmind
44 1.2.2.2 rmind #include <arm/imx/imxwdogreg.h>
45 1.2.2.2 rmind #include <arm/imx/imxwdogvar.h>
46 1.2.2.2 rmind
47 1.2.2.2 rmind struct wdog_softc {
48 1.2.2.2 rmind struct sysmon_wdog sc_smw;
49 1.2.2.2 rmind device_t sc_dev;
50 1.2.2.2 rmind bus_space_tag_t sc_iot;
51 1.2.2.2 rmind bus_space_handle_t sc_ioh;
52 1.2.2.2 rmind
53 1.2.2.2 rmind u_int sc_wdog_max_period;
54 1.2.2.2 rmind u_int sc_wdog_period;
55 1.2.2.2 rmind bool sc_wdog_armed;
56 1.2.2.2 rmind };
57 1.2.2.2 rmind
58 1.2.2.2 rmind #ifndef IMXWDOG_PERIOD_DEFAULT
59 1.2.2.2 rmind #define IMXWDOG_PERIOD_DEFAULT 10
60 1.2.2.2 rmind #endif
61 1.2.2.2 rmind
62 1.2.2.2 rmind CFATTACH_DECL_NEW(imxwdog, sizeof(struct wdog_softc),
63 1.2.2.2 rmind wdog_match, wdog_attach, NULL, NULL);
64 1.2.2.2 rmind
65 1.2.2.2 rmind static inline uint16_t
66 1.2.2.2 rmind wdog_read(struct wdog_softc *sc, bus_size_t o)
67 1.2.2.2 rmind {
68 1.2.2.2 rmind return bus_space_read_2(sc->sc_iot, sc->sc_ioh, o);
69 1.2.2.2 rmind }
70 1.2.2.2 rmind
71 1.2.2.2 rmind static inline void
72 1.2.2.2 rmind wdog_write(struct wdog_softc *sc, bus_size_t o, uint16_t v)
73 1.2.2.2 rmind {
74 1.2.2.2 rmind bus_space_write_2(sc->sc_iot, sc->sc_ioh, o, v);
75 1.2.2.2 rmind }
76 1.2.2.2 rmind
77 1.2.2.2 rmind static int
78 1.2.2.2 rmind wdog_tickle(struct sysmon_wdog *smw)
79 1.2.2.2 rmind {
80 1.2.2.2 rmind struct wdog_softc * const sc = smw->smw_cookie;
81 1.2.2.2 rmind
82 1.2.2.2 rmind wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC1);
83 1.2.2.2 rmind wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC2);
84 1.2.2.2 rmind
85 1.2.2.2 rmind return 0;
86 1.2.2.2 rmind }
87 1.2.2.2 rmind
88 1.2.2.2 rmind static int
89 1.2.2.2 rmind wdog_setmode(struct sysmon_wdog *smw)
90 1.2.2.2 rmind {
91 1.2.2.2 rmind struct wdog_softc * const sc = smw->smw_cookie;
92 1.2.2.2 rmind uint16_t reg;
93 1.2.2.2 rmind
94 1.2.2.2 rmind if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
95 1.2.2.2 rmind /* this chip do not support wdt disable */
96 1.2.2.2 rmind aprint_debug_dev(sc->sc_dev, "setmode disable\n");
97 1.2.2.2 rmind return sc->sc_wdog_armed ? EBUSY : 0;
98 1.2.2.2 rmind }
99 1.2.2.2 rmind
100 1.2.2.2 rmind /*
101 1.2.2.2 rmind * If no changes, just tickle it and return.
102 1.2.2.2 rmind */
103 1.2.2.2 rmind if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) {
104 1.2.2.2 rmind wdog_tickle(smw);
105 1.2.2.2 rmind aprint_debug_dev(sc->sc_dev, "setmode refresh\n");
106 1.2.2.2 rmind return 0;
107 1.2.2.2 rmind }
108 1.2.2.2 rmind
109 1.2.2.2 rmind /* set default */
110 1.2.2.2 rmind if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
111 1.2.2.2 rmind sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT;
112 1.2.2.2 rmind smw->smw_period = IMXWDOG_PERIOD_DEFAULT;
113 1.2.2.2 rmind }
114 1.2.2.2 rmind
115 1.2.2.2 rmind /*
116 1.2.2.2 rmind * Make sure we don't overflow the counter.
117 1.2.2.2 rmind */
118 1.2.2.2 rmind if (smw->smw_period >= sc->sc_wdog_max_period)
119 1.2.2.2 rmind return EINVAL;
120 1.2.2.2 rmind
121 1.2.2.2 rmind sc->sc_wdog_period = smw->smw_period;
122 1.2.2.2 rmind sc->sc_wdog_armed = true;
123 1.2.2.2 rmind
124 1.2.2.2 rmind reg = wdog_read(sc, IMX_WDOG_WCR);
125 1.2.2.2 rmind reg &= ~WCR_WT;
126 1.2.2.2 rmind reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT);
127 1.2.2.2 rmind reg |= WCR_WDE;
128 1.2.2.2 rmind wdog_write(sc, IMX_WDOG_WCR, reg);
129 1.2.2.2 rmind
130 1.2.2.2 rmind return 0;
131 1.2.2.2 rmind }
132 1.2.2.2 rmind
133 1.2.2.2 rmind void
134 1.2.2.2 rmind wdog_attach_common(device_t parent, device_t self,
135 1.2.2.2 rmind bus_space_tag_t iot, paddr_t addr, size_t size, int irq)
136 1.2.2.2 rmind {
137 1.2.2.2 rmind struct wdog_softc *sc = device_private(self);
138 1.2.2.2 rmind uint16_t reg;
139 1.2.2.2 rmind
140 1.2.2.2 rmind sc->sc_dev = self;
141 1.2.2.2 rmind sc->sc_iot = iot;
142 1.2.2.2 rmind if (bus_space_map(iot, addr, size, 0, &sc->sc_ioh)) {
143 1.2.2.2 rmind aprint_error_dev(self, "can't map\n");
144 1.2.2.2 rmind return;
145 1.2.2.2 rmind }
146 1.2.2.2 rmind
147 1.2.2.2 rmind sc->sc_wdog_armed = __SHIFTOUT(wdog_read(sc, IMX_WDOG_WCR), WCR_WDE);
148 1.2.2.2 rmind /*
149 1.2.2.2 rmind * Does the config file tell us to turn on the watchdog?
150 1.2.2.2 rmind */
151 1.2.2.2 rmind if (device_cfdata(self)->cf_flags & 1)
152 1.2.2.2 rmind sc->sc_wdog_armed = true;
153 1.2.2.2 rmind
154 1.2.2.2 rmind sc->sc_wdog_max_period = 0xff / 2;
155 1.2.2.2 rmind sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT;
156 1.2.2.2 rmind
157 1.2.2.2 rmind reg = wdog_read(sc, IMX_WDOG_WCR);
158 1.2.2.2 rmind reg &= ~WCR_WT;
159 1.2.2.2 rmind reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT);
160 1.2.2.2 rmind wdog_write(sc, IMX_WDOG_WCR, reg);
161 1.2.2.2 rmind
162 1.2.2.2 rmind aprint_naive("\n");
163 1.2.2.2 rmind aprint_normal(": i.MX Watchdog Timer, default period is %u seconds%s\n",
164 1.2.2.2 rmind sc->sc_wdog_period,
165 1.2.2.2 rmind sc->sc_wdog_armed ? " (armed)" : "");
166 1.2.2.2 rmind
167 1.2.2.2 rmind sc->sc_smw.smw_name = device_xname(self);
168 1.2.2.2 rmind sc->sc_smw.smw_cookie = sc;
169 1.2.2.2 rmind sc->sc_smw.smw_setmode = wdog_setmode;
170 1.2.2.2 rmind sc->sc_smw.smw_tickle = wdog_tickle;
171 1.2.2.2 rmind sc->sc_smw.smw_period = sc->sc_wdog_period;
172 1.2.2.2 rmind
173 1.2.2.2 rmind if (sysmon_wdog_register(&sc->sc_smw) != 0)
174 1.2.2.2 rmind aprint_error_dev(self, "unable to register with sysmon\n");
175 1.2.2.2 rmind
176 1.2.2.2 rmind if (sc->sc_wdog_armed) {
177 1.2.2.2 rmind int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE,
178 1.2.2.2 rmind sc->sc_wdog_period);
179 1.2.2.2 rmind if (error)
180 1.2.2.2 rmind aprint_error_dev(self,
181 1.2.2.2 rmind "failed to start kernel tickler: %d\n", error);
182 1.2.2.2 rmind else {
183 1.2.2.2 rmind reg = wdog_read(sc, IMX_WDOG_WCR);
184 1.2.2.2 rmind reg |= WCR_WDE;
185 1.2.2.2 rmind wdog_write(sc, IMX_WDOG_WCR, reg);
186 1.2.2.2 rmind }
187 1.2.2.2 rmind }
188 1.2.2.2 rmind }
189 1.2.2.2 rmind
190