cpu.h revision 1.11
1 /* $NetBSD: cpu.h,v 1.11 2001/04/24 18:20:21 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM_CPU_H_ 49 #define _ARM_CPU_H_ 50 51 /* 52 * User-visible definitions 53 */ 54 55 /* CTL_MACHDEP definitions. */ 56 #define CPU_DEBUG 1 /* int: misc kernel debug control */ 57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */ 58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */ 59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 60 #define CPU_MAXID 5 /* number of valid machdep ids */ 61 62 #define CTL_MACHDEP_NAMES { \ 63 { 0, 0 }, \ 64 { "debug", CTLTYPE_INT }, \ 65 { "booted_device", CTLTYPE_STRING }, \ 66 { "booted_kernel", CTLTYPE_STRING }, \ 67 { "console_device", CTLTYPE_STRUCT }, \ 68 } 69 70 #ifdef _KERNEL 71 72 /* 73 * Kernel-only definitions 74 */ 75 76 #ifndef _LKM 77 #include "opt_cputypes.h" 78 #include "opt_lockdebug.h" 79 #include "opt_progmode.h" 80 81 #if defined(PROG26) && defined(PROG32) 82 #error "26-bit and 32-bit CPU support are not compatible" 83 #endif 84 #if !defined(PROG26) && !defined(PROG32) 85 #error "Support for at least one CPU type must be configured into the kernel" 86 #endif 87 88 #ifdef CPU_ARM7500 89 #ifndef CPU_ARM7 90 #error "option CPU_ARM7 is required with CPU_ARM7500" 91 #endif 92 #ifdef CPU_ARM6 93 #error "CPU options CPU_ARM6 and CPU_ARM7500 are not compatible" 94 #endif 95 #ifdef CPU_ARM8 96 #error "CPU options CPU_ARM8 and CPU_ARM7500 are not compatible" 97 #endif 98 #ifdef CPU_SA110 99 #error "CPU options CPU_SA110 and CPU_ARM7500 are not compatible" 100 #endif 101 #endif /* CPU_ARM7500 */ 102 103 #endif /* !_LKM */ 104 105 106 #include <machine/intr.h> 107 #ifndef _LOCORE 108 #include <sys/user.h> 109 #include <machine/frame.h> 110 #include <machine/pcb.h> 111 #endif /* !_LOCORE */ 112 113 #include <arm/armreg.h> 114 115 #ifdef PROG32 116 #ifdef _LOCORE 117 #define IRQdisable \ 118 stmfd sp!, {r0} ; \ 119 mrs r0, cpsr_all ; \ 120 orr r0, r0, #(I32_bit) ; \ 121 msr cpsr_all, r0 ; \ 122 ldmfd sp!, {r0} 123 124 #define IRQenable \ 125 stmfd sp!, {r0} ; \ 126 mrs r0, cpsr_all ; \ 127 bic r0, r0, #(I32_bit) ; \ 128 msr cpsr_all, r0 ; \ 129 ldmfd sp!, {r0} 130 131 #else 132 #define IRQdisable SetCPSR(I32_bit, I32_bit); 133 #define IRQenable SetCPSR(I32_bit, 0); 134 #endif /* _LOCORE */ 135 #endif 136 137 #ifndef _LOCORE 138 139 /* All the CLKF_* macros take a struct clockframe * as an argument. */ 140 141 /* 142 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the 143 * frame came from USR mode or not. 144 */ 145 #ifdef PROG32 146 #define CLKF_USERMODE(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE) 147 #else 148 #define CLKF_USERMODE(frame) ((frame->if_r15 & R15_MODE) == R15_MODE_USR) 149 #endif 150 151 /* 152 * CLKF_BASEPRI: True if we were at spl0 before the interrupt 153 * 154 * This needs straighening, prob is the frame does not have info on the 155 * priority a guess that needs trying is (current_spl_level == SPL0) 156 */ 157 #define CLKF_BASEPRI(frame) CLKF_USERMODE(frame) 158 159 /* 160 * CLKF_INTR: True if we took the interrupt from inside another 161 * interrupt handler. 162 */ 163 extern int current_intr_depth; 164 #ifdef PROG32 165 /* Hack to treat FPE time as interrupt time so we can measure it */ 166 #define CLKF_INTR(frame) \ 167 ((current_intr_depth > 1) || \ 168 (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE) 169 #else 170 #define CLKF_INTR(frame) (current_intr_depth > 1) 171 #endif 172 173 /* 174 * CLKF_PC: Extract the program counter from a clockframe 175 */ 176 #ifdef PROG32 177 #define CLKF_PC(frame) (frame->if_pc) 178 #else 179 #define CLKF_PC(frame) (frame->if_r15 & R15_PC) 180 #endif 181 182 /* 183 * PROC_PC: Find out the program counter for the given process. 184 */ 185 #ifdef PROG32 186 #define PROC_PC(p) ((p)->p_addr->u_pcb.pcb_tf->tf_pc) 187 #else 188 #define PROC_PC(p) ((p)->p_addr->u_pcb.pcb_tf->tf_r15 & R15_PC) 189 #endif 190 191 192 /* 193 * Per-CPU information. For now we assume one CPU. 194 */ 195 196 #include <sys/sched.h> 197 struct cpu_info { 198 struct schedstate_percpu ci_schedstate; /* scheduler state */ 199 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 200 u_long ci_spin_locks; /* # of spin locks held */ 201 u_long ci_simple_locks; /* # of simple locks held */ 202 #endif 203 }; 204 205 extern struct cpu_info cpu_info_store; 206 #define curcpu() (&cpu_info_store) 207 #define cpu_number() 0 208 209 210 /* 211 * Scheduling glue 212 */ 213 214 extern int astpending; 215 #define setsoftast() (astpending = 1) 216 217 /* 218 * Notify the current process (p) that it has a signal pending, 219 * process as soon as possible. 220 */ 221 222 #define signotify(p) setsoftast() 223 224 #define cpu_wait(p) /* nothing */ 225 226 /* 227 * Preempt the current process if in interrupt from user mode, 228 * or after the current trap/syscall if in system mode. 229 */ 230 int want_resched; /* resched() was called */ 231 #define need_resched(ci) (want_resched = 1, setsoftast()) 232 233 /* 234 * Give a profiling tick to the current process when the user profiling 235 * buffer pages are invalid. On the i386, request an ast to send us 236 * through trap(), marking the proc as needing a profiling tick. 237 */ 238 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast()) 239 240 #ifndef arm26 241 /* 242 * cpu device glue (belongs in cpuvar.h) 243 */ 244 245 struct device; 246 void cpu_attach __P((struct device *)); 247 #endif 248 249 250 /* 251 * Random cruft 252 */ 253 254 /* locore.S */ 255 void atomic_set_bit __P((u_int *address, u_int setmask)); 256 void atomic_clear_bit __P((u_int *address, u_int clearmask)); 257 258 /* cpuswitch.S */ 259 struct pcb; 260 void savectx __P((struct pcb *pcb)); 261 262 #ifndef arm26 263 /* ast.c */ 264 void userret __P((register struct proc *p)); 265 #endif 266 267 /* machdep.h */ 268 void bootsync __P((void)); 269 270 /* strstr.c */ 271 char *strstr __P((const char *s1, const char *s2)); 272 273 /* syscall.c */ 274 void child_return __P((void *)); 275 276 #endif /* !_LOCORE */ 277 278 #endif /* _KERNEL */ 279 280 #endif /* !_ARM_CPU_H_ */ 281 282 /* End of cpu.h */ 283
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