cpu.h revision 1.34 1 /* $NetBSD: cpu.h,v 1.34 2003/06/23 11:01:08 martin Exp $ */
2
3 /*
4 * Copyright (c) 1994-1996 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * cpu.h
40 *
41 * CPU specific symbols
42 *
43 * Created : 18/09/94
44 *
45 * Based on kate/katelib/arm6.h
46 */
47
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50
51 /*
52 * User-visible definitions
53 */
54
55 /* CTL_MACHDEP definitions. */
56 #define CPU_DEBUG 1 /* int: misc kernel debug control */
57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */
58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */
59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */
60 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */
61 #define CPU_MAXID 6 /* number of valid machdep ids */
62
63 #define CTL_MACHDEP_NAMES { \
64 { 0, 0 }, \
65 { "debug", CTLTYPE_INT }, \
66 { "booted_device", CTLTYPE_STRING }, \
67 { "booted_kernel", CTLTYPE_STRING }, \
68 { "console_device", CTLTYPE_STRUCT }, \
69 { "powersave", CTLTYPE_INT }, \
70 }
71
72 #ifdef _KERNEL
73
74 /*
75 * Kernel-only definitions
76 */
77
78 #ifndef _LKM
79 #include "opt_multiprocessor.h"
80 #include "opt_lockdebug.h"
81 #endif /* !_LKM */
82
83 #include <arm/cpuconf.h>
84
85 #include <machine/intr.h>
86 #ifndef _LOCORE
87 #include <sys/user.h>
88 #include <machine/frame.h>
89 #include <machine/pcb.h>
90 #endif /* !_LOCORE */
91
92 #include <arm/armreg.h>
93
94 #ifndef _LOCORE
95 /* 1 == use cpu_sleep(), 0 == don't */
96 extern int cpu_do_powersave;
97 #endif
98
99 #ifdef __PROG32
100 #ifdef _LOCORE
101 #define IRQdisable \
102 stmfd sp!, {r0} ; \
103 mrs r0, cpsr ; \
104 orr r0, r0, #(I32_bit) ; \
105 msr cpsr_c, r0 ; \
106 ldmfd sp!, {r0}
107
108 #define IRQenable \
109 stmfd sp!, {r0} ; \
110 mrs r0, cpsr ; \
111 bic r0, r0, #(I32_bit) ; \
112 msr cpsr_c, r0 ; \
113 ldmfd sp!, {r0}
114
115 #else
116 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
117 #define IRQenable __set_cpsr_c(I32_bit, 0);
118 #endif /* _LOCORE */
119 #endif
120
121 #ifndef _LOCORE
122
123 /* All the CLKF_* macros take a struct clockframe * as an argument. */
124
125 /*
126 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
127 * frame came from USR mode or not.
128 */
129 #ifdef __PROG32
130 #define CLKF_USERMODE(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
131 #else
132 #define CLKF_USERMODE(frame) ((frame->if_r15 & R15_MODE) == R15_MODE_USR)
133 #endif
134
135 /*
136 * CLKF_BASEPRI: True if we were at spl0 before the interrupt.
137 *
138 * This is hard-wired to 0 on the ARM, since spllowersoftclock() might
139 * not actually be able to unblock the interrupt, which would cause us
140 * to run the softclock interrupts with hardclock blocked.
141 */
142 #define CLKF_BASEPRI(frame) 0
143
144 /*
145 * CLKF_INTR: True if we took the interrupt from inside another
146 * interrupt handler.
147 */
148 extern int current_intr_depth;
149 #ifdef __PROG32
150 /* Hack to treat FPE time as interrupt time so we can measure it */
151 #define CLKF_INTR(frame) \
152 ((current_intr_depth > 1) || \
153 (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE)
154 #else
155 #define CLKF_INTR(frame) (current_intr_depth > 1)
156 #endif
157
158 /*
159 * CLKF_PC: Extract the program counter from a clockframe
160 */
161 #ifdef __PROG32
162 #define CLKF_PC(frame) (frame->if_pc)
163 #else
164 #define CLKF_PC(frame) (frame->if_r15 & R15_PC)
165 #endif
166
167 /*
168 * LWP_PC: Find out the program counter for the given lwp.
169 */
170 #ifdef __PROG32
171 #define LWP_PC(l) ((l)->l_addr->u_pcb.pcb_tf->tf_pc)
172 #else
173 #define LWP_PC(l) ((l)->l_addr->u_pcb.pcb_tf->tf_r15 & R15_PC)
174 #endif
175
176 /* The address of the vector page. */
177 extern vaddr_t vector_page;
178 #ifdef __PROG32
179 void arm32_vector_init(vaddr_t, int);
180
181 #define ARM_VEC_RESET (1 << 0)
182 #define ARM_VEC_UNDEFINED (1 << 1)
183 #define ARM_VEC_SWI (1 << 2)
184 #define ARM_VEC_PREFETCH_ABORT (1 << 3)
185 #define ARM_VEC_DATA_ABORT (1 << 4)
186 #define ARM_VEC_ADDRESS_EXCEPTION (1 << 5)
187 #define ARM_VEC_IRQ (1 << 6)
188 #define ARM_VEC_FIQ (1 << 7)
189
190 #define ARM_NVEC 8
191 #define ARM_VEC_ALL 0xffffffff
192 #endif
193
194 /*
195 * Per-CPU information. For now we assume one CPU.
196 */
197
198 #include <sys/device.h>
199 #include <sys/sched.h>
200 struct cpu_info {
201 struct schedstate_percpu ci_schedstate; /* scheduler state */
202 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
203 u_long ci_spin_locks; /* # of spin locks held */
204 u_long ci_simple_locks; /* # of simple locks held */
205 #endif
206 struct device *ci_dev; /* Device corresponding to this CPU */
207 u_int32_t ci_arm_cpuid; /* aggregate CPU id */
208 u_int32_t ci_arm_cputype; /* CPU type */
209 u_int32_t ci_arm_cpurev; /* CPU revision */
210 u_int32_t ci_ctrl; /* The CPU control register */
211 struct evcnt ci_arm700bugcount;
212 #ifdef MULTIPROCESSOR
213 MP_CPU_INFO_MEMBERS
214 #endif
215 };
216
217 #ifndef MULTIPROCESSOR
218 extern struct cpu_info cpu_info_store;
219 #define curcpu() (&cpu_info_store)
220 #define cpu_number() 0
221 #endif
222
223 #ifdef __PROG32
224 void cpu_proc_fork(struct proc *, struct proc *);
225 #else
226 #define cpu_proc_fork(p1, p2)
227 #endif
228
229 /*
230 * Scheduling glue
231 */
232
233 extern int astpending;
234 #define setsoftast() (astpending = 1)
235
236 /*
237 * Notify the current process (p) that it has a signal pending,
238 * process as soon as possible.
239 */
240
241 #define signotify(p) setsoftast()
242
243 #define cpu_wait(p) /* nothing */
244
245 /*
246 * Preempt the current process if in interrupt from user mode,
247 * or after the current trap/syscall if in system mode.
248 */
249 int want_resched; /* resched() was called */
250 #define need_resched(ci) (want_resched = 1, setsoftast())
251
252 /*
253 * Give a profiling tick to the current process when the user profiling
254 * buffer pages are invalid. On the i386, request an ast to send us
255 * through trap(), marking the proc as needing a profiling tick.
256 */
257 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast())
258
259 #ifndef acorn26
260 /*
261 * cpu device glue (belongs in cpuvar.h)
262 */
263
264 struct device;
265 void cpu_attach __P((struct device *));
266 int cpu_alloc_idlepcb __P((struct cpu_info *));
267 #endif
268
269
270 /*
271 * Random cruft
272 */
273
274 struct lwp;
275
276 /* locore.S */
277 void atomic_set_bit __P((u_int *address, u_int setmask));
278 void atomic_clear_bit __P((u_int *address, u_int clearmask));
279
280 /* cpuswitch.S */
281 struct pcb;
282 void savectx __P((struct pcb *pcb));
283
284 /* ast.c */
285 void userret __P((register struct lwp *p));
286
287 /* machdep.h */
288 void bootsync __P((void));
289
290 /* fault.c */
291 int badaddr_read __P((void *, size_t, void *));
292
293 /* syscall.c */
294 void swi_handler __P((trapframe_t *));
295
296 #endif /* !_LOCORE */
297
298 #endif /* _KERNEL */
299
300 #endif /* !_ARM_CPU_H_ */
301
302 /* End of cpu.h */
303