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cpu.h revision 1.66
      1 /*	cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp	*/
      2 
      3 /*
      4  * Copyright (c) 1994-1996 Mark Brinicombe.
      5  * Copyright (c) 1994 Brini.
      6  * All rights reserved.
      7  *
      8  * This code is derived from software written for Brini by Mark Brinicombe
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by Brini.
     21  * 4. The name of the company nor the name of the author may be used to
     22  *    endorse or promote products derived from this software without specific
     23  *    prior written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
     26  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     27  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     28  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     35  * SUCH DAMAGE.
     36  *
     37  * RiscBSD kernel project
     38  *
     39  * cpu.h
     40  *
     41  * CPU specific symbols
     42  *
     43  * Created      : 18/09/94
     44  *
     45  * Based on kate/katelib/arm6.h
     46  */
     47 
     48 #ifndef _ARM_CPU_H_
     49 #define _ARM_CPU_H_
     50 
     51 /*
     52  * User-visible definitions
     53  */
     54 
     55 /*  CTL_MACHDEP definitions. */
     56 #define	CPU_DEBUG		1	/* int: misc kernel debug control */
     57 #define	CPU_BOOTED_DEVICE	2	/* string: device we booted from */
     58 #define	CPU_BOOTED_KERNEL	3	/* string: kernel we booted */
     59 #define	CPU_CONSDEV		4	/* struct: dev_t of our console */
     60 #define	CPU_POWERSAVE		5	/* int: use CPU powersave mode */
     61 #define	CPU_MAXID		6	/* number of valid machdep ids */
     62 
     63 #if defined(_KERNEL) || defined(_KMEMUSER)
     64 
     65 /*
     66  * Kernel-only definitions
     67  */
     68 
     69 #if !defined(_LKM) && defined(_KERNEL_OPT)
     70 #include "opt_multiprocessor.h"
     71 #include "opt_cpuoptions.h"
     72 #include "opt_lockdebug.h"
     73 #include "opt_cputypes.h"
     74 #endif /* !_LKM && _KERNEL_OPT */
     75 
     76 #include <arm/cpuconf.h>
     77 
     78 #ifndef _LOCORE
     79 #include <machine/frame.h>
     80 #include <machine/pcb.h>
     81 #endif	/* !_LOCORE */
     82 
     83 #include <arm/armreg.h>
     84 
     85 
     86 #ifndef _LOCORE
     87 /* 1 == use cpu_sleep(), 0 == don't */
     88 extern int cpu_do_powersave;
     89 #endif
     90 
     91 #ifdef _LOCORE
     92 
     93 #if defined(_ARM_ARCH_6)
     94 #define IRQdisable	cprid	i
     95 #define IRQenable	cpsie	i
     96 #elif defined(__PROG32)
     97 #define IRQdisable \
     98 	stmfd	sp!, {r0} ; \
     99 	mrs	r0, cpsr ; \
    100 	orr	r0, r0, #(I32_bit) ; \
    101 	msr	cpsr_c, r0 ; \
    102 	ldmfd	sp!, {r0}
    103 
    104 #define IRQenable \
    105 	stmfd	sp!, {r0} ; \
    106 	mrs	r0, cpsr ; \
    107 	bic	r0, r0, #(I32_bit) ; \
    108 	msr	cpsr_c, r0 ; \
    109 	ldmfd	sp!, {r0}
    110 #else
    111 /* Not yet used in 26-bit code */
    112 #endif
    113 
    114 #if defined (PROCESS_ID_IS_CURCPU)
    115 #define GET_CURCPU(rX)		mrc	p15, 0, rX, c13, c0, 4
    116 #define GET_CURLWP(rX)		GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]
    117 #define GET_CURPCB(rX)		GET_CURCPU(rX); ldr rX, [rX, #CI_CURPCB]
    118 #elif defined (PROCESS_ID_IS_CURLWP)
    119 #define GET_CURLWP(rX)		mrc	p15, 0, rX, c13, c0, 4
    120 #define GET_CURCPU(rX)		GET_CURLWP(rX); ldr rX, [rX, #L_CPU]
    121 #define GET_CURPCB(rX)		GET_CURLWP(rX); ldr rX, [rX, #L_PCB]
    122 #elif !defined(MULTIPROCESSOR)
    123 #define GET_CURCPU(rX)		ldr rX, =_C_LABEL(cpu_info_store)
    124 #define GET_CURLWP(rX)		GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]
    125 #define GET_CURPCB(rX)		GET_CURCPU(rX); ldr rX, [rX, #CI_CURPCB]
    126 #endif
    127 
    128 #else /* !_LOCORE */
    129 
    130 #ifdef __PROG32
    131 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
    132 #define IRQenable __set_cpsr_c(I32_bit, 0);
    133 #else
    134 #define IRQdisable set_r15(R15_IRQ_DISABLE, R15_IRQ_DISABLE);
    135 #define IRQenable set_r15(R15_IRQ_DISABLE, 0);
    136 #endif
    137 
    138 #endif /* !_LOCORE */
    139 
    140 #ifndef _LOCORE
    141 
    142 /* All the CLKF_* macros take a struct clockframe * as an argument. */
    143 
    144 /*
    145  * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
    146  * frame came from USR mode or not.
    147  */
    148 #ifdef __PROG32
    149 #define CLKF_USERMODE(frame)	((frame->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE)
    150 #else
    151 #define CLKF_USERMODE(frame)	((frame->cf_if.if_r15 & R15_MODE) == R15_MODE_USR)
    152 #endif
    153 
    154 /*
    155  * CLKF_INTR: True if we took the interrupt from inside another
    156  * interrupt handler.
    157  */
    158 #ifdef __PROG32
    159 /* Hack to treat FPE time as interrupt time so we can measure it */
    160 #define CLKF_INTR(frame)						\
    161 	((curcpu()->ci_intr_depth > 1) ||				\
    162 	    (frame->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
    163 #else
    164 #define CLKF_INTR(frame)	(curcpu()->ci_intr_depth > 1)
    165 #endif
    166 
    167 /*
    168  * CLKF_PC: Extract the program counter from a clockframe
    169  */
    170 #ifdef __PROG32
    171 #define CLKF_PC(frame)		(frame->cf_tf.tf_pc)
    172 #else
    173 #define CLKF_PC(frame)		(frame->cf_if.if_r15 & R15_PC)
    174 #endif
    175 
    176 /*
    177  * LWP_PC: Find out the program counter for the given lwp.
    178  */
    179 #ifdef __PROG32
    180 #define LWP_PC(l)	(((struct pcb *)lwp_getpcb(l))->pcb_tf->tf_pc)
    181 #else
    182 #define LWP_PC(l)	(((struct pcb *)lwp_getpcb(l))->pcb_tf->tf_r15 & R15_PC)
    183 #endif
    184 
    185 /*
    186  * Validate a PC or PSR for a user process.  Used by various system calls
    187  * that take a context passed by the user and restore it.
    188  */
    189 
    190 #ifdef __PROG32
    191 #define VALID_R15_PSR(r15,psr)						\
    192 	(((psr) & PSR_MODE) == PSR_USR32_MODE &&			\
    193 		((psr) & (I32_bit | F32_bit)) == 0)
    194 #else
    195 #define VALID_R15_PSR(r15,psr)						\
    196 	(((r15) & R15_MODE) == R15_MODE_USR &&				\
    197 		((r15) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE)) == 0)
    198 #endif
    199 
    200 
    201 
    202 /* The address of the vector page. */
    203 extern vaddr_t vector_page;
    204 #ifdef __PROG32
    205 void	arm32_vector_init(vaddr_t, int);
    206 
    207 #define	ARM_VEC_RESET			(1 << 0)
    208 #define	ARM_VEC_UNDEFINED		(1 << 1)
    209 #define	ARM_VEC_SWI			(1 << 2)
    210 #define	ARM_VEC_PREFETCH_ABORT		(1 << 3)
    211 #define	ARM_VEC_DATA_ABORT		(1 << 4)
    212 #define	ARM_VEC_ADDRESS_EXCEPTION	(1 << 5)
    213 #define	ARM_VEC_IRQ			(1 << 6)
    214 #define	ARM_VEC_FIQ			(1 << 7)
    215 
    216 #define	ARM_NVEC			8
    217 #define	ARM_VEC_ALL			0xffffffff
    218 #endif
    219 
    220 /*
    221  * Per-CPU information.  For now we assume one CPU.
    222  */
    223 static inline int curcpl(void);
    224 static inline void set_curcpl(int);
    225 #ifdef __HAVE_FAST_SOFTINTS
    226 static inline void cpu_dosoftints(void);
    227 #endif
    228 
    229 #include <sys/device_if.h>
    230 #include <sys/evcnt.h>
    231 #include <sys/cpu_data.h>
    232 struct cpu_info {
    233 	struct cpu_data ci_data;	/* MI per-cpu data */
    234 	struct device *ci_dev;		/* Device corresponding to this CPU */
    235 	cpuid_t ci_cpuid;
    236 	u_int32_t ci_arm_cpuid;		/* aggregate CPU id */
    237 	u_int32_t ci_arm_cputype;	/* CPU type */
    238 	u_int32_t ci_arm_cpurev;	/* CPU revision */
    239 	u_int32_t ci_ctrl;		/* The CPU control register */
    240 	int ci_cpl;			/* current processor level (spl) */
    241 	int ci_astpending;		/* */
    242 	int ci_want_resched;		/* resched() was called */
    243 	int ci_intr_depth;		/* */
    244 	struct pcb *ci_curpcb;		/* current pcb */
    245 #ifdef __HAVE_FAST_SOFTINTS
    246 	lwp_t *ci_softlwps[SOFTINT_COUNT];
    247 	volatile uint32_t ci_softints;
    248 #endif
    249 #if !defined(PROCESS_ID_IS_CURLWP)
    250 	lwp_t *ci_curlwp;		/* current lwp */
    251 #endif
    252 #ifdef _ARM_ARCH_6
    253 	uint32_t ci_ccnt_freq;		/* cycle count frequency */
    254 #endif
    255 	struct evcnt ci_arm700bugcount;
    256 	int32_t ci_mtx_count;
    257 	int ci_mtx_oldspl;
    258 	uint32_t ci_vfp_id;
    259 #ifdef MULTIPROCESSOR
    260 	MP_CPU_INFO_MEMBERS
    261 #endif
    262 };
    263 
    264 #ifndef MULTIPROCESSOR
    265 extern struct cpu_info cpu_info_store;
    266 #if defined(PROCESS_ID_IS_CURLWP)
    267 static inline struct lwp *
    268 _curlwp(void)
    269 {
    270 	struct lwp *l;
    271 	__asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(l));
    272 	return l;
    273 }
    274 
    275 static inline void
    276 _curlwp_set(struct lwp *l)
    277 {
    278 	__asm("mcr\tp15, 0, %0, c13, c0, 4" : "=r"(l));
    279 }
    280 
    281 #define	curlwp		(_curlwp())
    282 static inline struct cpu_info *
    283 curcpu(void)
    284 {
    285 	return curlwp->l_cpu;
    286 }
    287 #elif defined(PROCESS_ID_IS_CURCPU)
    288 static inline struct cpu_info *
    289 curcpu(void)
    290 {
    291 	struct cpu_info *ci;
    292 	__asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(ci));
    293 	return ci;
    294 }
    295 #else
    296 #define	curcpu()	(&cpu_info_store)
    297 #endif /* !PROCESS_ID_IS_CURCPU && !PROCESS_ID_IS_CURLWP */
    298 #ifndef curpcb
    299 #define	curpcb		(curcpu()->ci_curpcb)
    300 #endif
    301 #ifndef curlwp
    302 #define	curlwp		(curcpu()->ci_curlwp)
    303 #endif
    304 #define cpu_number()	0
    305 #define	LWP0_CPU_INFO	(&cpu_info_store)
    306 #endif /* !MULTIPROCESSOR */
    307 
    308 static inline int
    309 curcpl(void)
    310 {
    311 	return curcpu()->ci_cpl;
    312 }
    313 
    314 static inline void
    315 set_curcpl(int pri)
    316 {
    317 	curcpu()->ci_cpl = pri;
    318 }
    319 
    320 #ifdef __HAVE_FAST_SOFTINTS
    321 void	dosoftints(void);
    322 static inline void
    323 cpu_dosoftints(void)
    324 {
    325 	struct cpu_info * const ci = curcpu();
    326 	if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
    327 		dosoftints();
    328 }
    329 #endif
    330 
    331 #ifdef __PROG32
    332 void	cpu_proc_fork(struct proc *, struct proc *);
    333 #else
    334 #define	cpu_proc_fork(p1, p2)
    335 #endif
    336 
    337 /*
    338  * Scheduling glue
    339  */
    340 
    341 #define setsoftast() (curcpu()->ci_astpending = 1)
    342 
    343 /*
    344  * Notify the current process (p) that it has a signal pending,
    345  * process as soon as possible.
    346  */
    347 
    348 #define cpu_signotify(l)            setsoftast()
    349 
    350 /*
    351  * Give a profiling tick to the current process when the user profiling
    352  * buffer pages are invalid.  On the i386, request an ast to send us
    353  * through trap(), marking the proc as needing a profiling tick.
    354  */
    355 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, setsoftast())
    356 
    357 #ifndef acorn26
    358 /*
    359  * cpu device glue (belongs in cpuvar.h)
    360  */
    361 
    362 struct device;
    363 void	cpu_attach(struct device *);
    364 #endif
    365 
    366 /*
    367  * Random cruft
    368  */
    369 
    370 struct lwp;
    371 
    372 /* locore.S */
    373 void atomic_set_bit(u_int *, u_int);
    374 void atomic_clear_bit(u_int *, u_int);
    375 
    376 /* cpuswitch.S */
    377 struct pcb;
    378 void	savectx(struct pcb *);
    379 
    380 /* ast.c */
    381 void userret(register struct lwp *);
    382 
    383 /* *_machdep.c */
    384 void bootsync(void);
    385 
    386 /* fault.c */
    387 int badaddr_read(void *, size_t, void *);
    388 
    389 /* syscall.c */
    390 void swi_handler(trapframe_t *);
    391 
    392 /* arm_machdep.c */
    393 void ucas_ras_check(trapframe_t *);
    394 
    395 /* vfp_init.c */
    396 void vfp_attach(void);
    397 void vfp_discardcontext(void);
    398 void vfp_savecontext(void);
    399 extern const pcu_ops_t arm_vfp_ops;
    400 
    401 #endif	/* !_LOCORE */
    402 
    403 #endif /* _KERNEL */
    404 
    405 #endif /* !_ARM_CPU_H_ */
    406