cpu.h revision 1.7
1 /* $NetBSD: cpu.h,v 1.7 2001/02/27 17:35:49 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM32_CPU_H_ 49 #define _ARM32_CPU_H_ 50 51 #if defined(_KERNEL) && !defined(_LKM) 52 #include "opt_cputypes.h" 53 #include "opt_lockdebug.h" 54 #include "opt_progmode.h" 55 #endif 56 57 #ifndef _LOCORE 58 #include <machine/frame.h> 59 #endif /* !_LOCORE */ 60 #include <machine/psl.h> 61 62 #if defined(PROG26) && defined(PROG32) 63 #error "26-bit and 32-bit CPU support are not compatible" 64 #endif 65 #if !defined(PROG26) && !defined(PROG32) 66 #error "Support for at least one CPU type must be configured into the kernel" 67 #endif 68 69 #ifdef CPU_ARM7500 70 #ifndef CPU_ARM7 71 #error "option CPU_ARM7 is required with CPU_ARM7500" 72 #endif 73 #ifdef CPU_ARM6 74 #error "CPU options CPU_ARM6 and CPU_ARM7500 are not compatible" 75 #endif 76 #ifdef CPU_ARM8 77 #error "CPU options CPU_ARM8 and CPU_ARM7500 are not compatible" 78 #endif 79 #ifdef CPU_SA110 80 #error "CPU options CPU_SA110 and CPU_ARM7500 are not compatible" 81 #endif 82 #endif /* CPU_ARM7500 */ 83 84 #include <arm/armreg.h> 85 86 #ifdef _LOCORE 87 #define IRQdisable \ 88 stmfd sp!, {r0} ; \ 89 mrs r0, cpsr_all ; \ 90 orr r0, r0, #(I32_bit) ; \ 91 msr cpsr_all, r0 ; \ 92 ldmfd sp!, {r0} 93 94 #define IRQenable \ 95 stmfd sp!, {r0} ; \ 96 mrs r0, cpsr_all ; \ 97 bic r0, r0, #(I32_bit) ; \ 98 msr cpsr_all, r0 ; \ 99 ldmfd sp!, {r0} 100 101 #else 102 #define IRQdisable SetCPSR(I32_bit, I32_bit); 103 #define IRQenable SetCPSR(I32_bit, 0); 104 #endif /* _LOCORE */ 105 106 /* 107 * Return TRUE/FALSE (1/0) depending on whether the frame came from USR 108 * mode or not. 109 */ 110 111 #define CLKF_USERMODE(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE) 112 113 /* 114 * This needs straighening, prob is the frame does not have info on the priority 115 * a guess that needs trying is (current_spl_level == SPL0) 116 */ 117 118 #define CLKF_BASEPRI(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE) 119 120 #define CLKF_PC(frame) (frame->if_pc) 121 122 /*#define CLKF_INTR(frame) (current_intr_depth > 1)*/ 123 124 /* Hack to treat FPE time as interrupt time so we can measure it */ 125 #define CLKF_INTR(frame) ((current_intr_depth > 1) || (frame->if_spsr & PSR_MODE) == PSR_UND32_MODE) 126 127 #define PROC_PC(p) ((p)->p_md.md_regs->tf_pc) 128 129 /* 130 * definitions of cpu-dependent requirements 131 * referenced in generic code 132 */ 133 134 #ifndef _LOCORE 135 #include <sys/sched.h> 136 struct cpu_info { 137 struct schedstate_percpu ci_schedstate; /* scheduler state */ 138 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 139 u_long ci_spin_locks; /* # of spin locks held */ 140 u_long ci_simple_locks; /* # of simple locks held */ 141 #endif 142 }; 143 #ifdef _KERNEL 144 extern struct cpu_info cpu_info_store; 145 #define curcpu() (&cpu_info_store) 146 #endif /* _KERNEL */ 147 #endif /* ! _LOCORE */ 148 149 /* 150 * Notify the current process (p) that it has a signal pending, 151 * process as soon as possible. 152 */ 153 154 #define signotify(p) setsoftast() 155 156 #define cpu_wait(p) /* nothing */ 157 #define cpu_number() 0 158 159 #if defined(_KERNEL) && !defined(_LOCORE) 160 extern int current_intr_depth; 161 162 /* 163 * Preempt the current process if in interrupt from user mode, 164 * or after the current trap/syscall if in system mode. 165 */ 166 int want_resched; /* resched() was called */ 167 #define need_resched(ci) (want_resched = 1, setsoftast()) 168 169 /* 170 * Give a profiling tick to the current process when the user profiling 171 * buffer pages are invalid. On the i386, request an ast to send us 172 * through trap(), marking the proc as needing a profiling tick. 173 */ 174 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast()) 175 176 /* locore.S */ 177 void atomic_set_bit __P((u_int *address, u_int setmask)); 178 void atomic_clear_bit __P((u_int *address, u_int clearmask)); 179 180 /* cpuswitch.S */ 181 struct pcb; 182 void savectx __P((struct pcb *pcb)); 183 184 /* ast.c */ 185 void userret __P((register struct proc *p)); 186 187 /* machdep.h */ 188 void bootsync __P((void)); 189 190 /* strstr.c */ 191 char *strstr __P((const char *s1, const char *s2)); 192 193 /* syscall.c */ 194 void child_return __P((void *)); 195 196 #endif /* _KERNEL && !_LOCORE */ 197 198 /* 199 * CTL_MACHDEP definitions. 200 */ 201 #define CPU_DEBUG 1 /* int: misc kernel debug control */ 202 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */ 203 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */ 204 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 205 #define CPU_MAXID 5 /* number of valid machdep ids */ 206 207 #define CTL_MACHDEP_NAMES { \ 208 { 0, 0 }, \ 209 { "debug", CTLTYPE_INT }, \ 210 { "booted_device", CTLTYPE_STRING }, \ 211 { "booted_kernel", CTLTYPE_STRING }, \ 212 { "console_device", CTLTYPE_STRUCT }, \ 213 } 214 215 #endif /* !_ARM32_CPU_H_ */ 216 217 /* End of cpu.h */ 218
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