cpu.h revision 1.76
1 /* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM_CPU_H_ 49 #define _ARM_CPU_H_ 50 51 /* 52 * User-visible definitions 53 */ 54 55 /* CTL_MACHDEP definitions. */ 56 #define CPU_DEBUG 1 /* int: misc kernel debug control */ 57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */ 58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */ 59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 60 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */ 61 #define CPU_MAXID 6 /* number of valid machdep ids */ 62 63 #if defined(_KERNEL) || defined(_KMEMUSER) 64 65 /* 66 * Kernel-only definitions 67 */ 68 69 #if !defined(_MODULE) && defined(_KERNEL_OPT) 70 #include "opt_multiprocessor.h" 71 #include "opt_cpuoptions.h" 72 #include "opt_lockdebug.h" 73 #include "opt_cputypes.h" 74 #endif /* !_MODULE && _KERNEL_OPT */ 75 76 #ifndef _LOCORE 77 /* 1 == use cpu_sleep(), 0 == don't */ 78 extern int cpu_do_powersave; 79 extern int cpu_fpu_present; 80 81 /* All the CLKF_* macros take a struct clockframe * as an argument. */ 82 83 /* 84 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the 85 * frame came from USR mode or not. 86 */ 87 #ifdef __PROG32 88 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE) 89 #else 90 #define CLKF_USERMODE(cf) (((cf)->cf_if.if_r15 & R15_MODE) == R15_MODE_USR) 91 #endif 92 93 /* 94 * CLKF_INTR: True if we took the interrupt from inside another 95 * interrupt handler. 96 */ 97 #if defined(__PROG32) && !defined(__ARM_EABI__) 98 /* Hack to treat FPE time as interrupt time so we can measure it */ 99 #define CLKF_INTR(cf) \ 100 ((curcpu()->ci_intr_depth > 1) || \ 101 ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE) 102 #else 103 #define CLKF_INTR(frame) (curcpu()->ci_intr_depth > 1) 104 #endif 105 106 /* 107 * CLKF_PC: Extract the program counter from a clockframe 108 */ 109 #ifdef __PROG32 110 #define CLKF_PC(frame) (frame->cf_tf.tf_pc) 111 #else 112 #define CLKF_PC(frame) (frame->cf_if.if_r15 & R15_PC) 113 #endif 114 115 /* 116 * LWP_PC: Find out the program counter for the given lwp. 117 */ 118 #ifdef __PROG32 119 #define LWP_PC(l) (lwp_trapframe(l)->tf_pc) 120 #else 121 #define LWP_PC(l) (lwp_trapframe(l)->tf_r15 & R15_PC) 122 #endif 123 124 /* 125 * Per-CPU information. For now we assume one CPU. 126 */ 127 static inline int curcpl(void); 128 static inline void set_curcpl(int); 129 static inline void cpu_dosoftints(void); 130 131 #include <sys/cpu_data.h> 132 #include <sys/device_if.h> 133 #include <sys/evcnt.h> 134 135 struct cpu_info { 136 struct cpu_data ci_data; /* MI per-cpu data */ 137 device_t ci_dev; /* Device corresponding to this CPU */ 138 cpuid_t ci_cpuid; 139 uint32_t ci_arm_cpuid; /* aggregate CPU id */ 140 uint32_t ci_arm_cputype; /* CPU type */ 141 uint32_t ci_arm_cpurev; /* CPU revision */ 142 uint32_t ci_ctrl; /* The CPU control register */ 143 int ci_cpl; /* current processor level (spl) */ 144 int ci_astpending; /* */ 145 int ci_want_resched; /* resched() was called */ 146 int ci_intr_depth; /* */ 147 struct cpu_softc *ci_softc; /* platform softc */ 148 lwp_t *ci_softlwps[SOFTINT_COUNT]; 149 volatile uint32_t ci_softints; 150 lwp_t *ci_curlwp; /* current lwp */ 151 struct evcnt ci_arm700bugcount; 152 int32_t ci_mtx_count; 153 int ci_mtx_oldspl; 154 register_t ci_undefsave[3]; 155 uint32_t ci_vfp_id; 156 uint64_t ci_lastintr; 157 struct evcnt ci_abt_evs[FAULT_TYPE_MASK+1]; 158 #if defined(MP_CPU_INFO_MEMBERS) 159 MP_CPU_INFO_MEMBERS 160 #endif 161 }; 162 163 extern struct cpu_info cpu_info_store; 164 165 #if defined(TPIDRPRW_IS_CURLWP) 166 static inline struct lwp * 167 _curlwp(void) 168 { 169 return (struct lwp *) armreg_tpidrprw_read(); 170 } 171 172 static inline void 173 _curlwp_set(struct lwp *l) 174 { 175 armreg_tpidrprw_write((uintptr_t)l); 176 } 177 178 #define curlwp (_curlwp()) 179 static inline struct cpu_info * 180 curcpu(void) 181 { 182 return curlwp->l_cpu; 183 } 184 #elif defined(TPIDRPRW_IS_CURCPU) 185 static inline struct cpu_info * 186 curcpu(void) 187 { 188 return (struct cpu_info *) armreg_tpidrprw_read(); 189 } 190 #elif !defined(MULTIPROCESSOR) 191 #define curcpu() (&cpu_info_store) 192 #else 193 #error MULTIPROCESSOR requires TPIDRPRW_IS_CURLWP or TPIDRPRW_IS_CURCPU 194 #endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */ 195 196 #ifndef curlwp 197 #define curlwp (curcpu()->ci_curlwp) 198 #endif 199 200 #define CPU_INFO_ITERATOR int 201 #if defined(MULTIPROCESSOR) 202 extern struct cpu_info *cpu_info[]; 203 #define cpu_number() (curcpu()->ci_cpuid) 204 void cpu_boot_secondary_processors(void); 205 #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 206 #define CPU_INFO_FOREACH(cii, ci) \ 207 cii = 0, ci = cpu_info[0]; cii < ncpu && (ci = cpu_info[cii]) != NULL; cii++ 208 #else 209 #define cpu_number() 0 210 211 #define CPU_IS_PRIMARY(ci) true 212 #define CPU_INFO_FOREACH(cii, ci) \ 213 cii = 0, ci = curcpu(); ci != NULL; ci = NULL 214 #endif 215 216 #define LWP0_CPU_INFO (&cpu_info_store) 217 218 static inline int 219 curcpl(void) 220 { 221 return curcpu()->ci_cpl; 222 } 223 224 static inline void 225 set_curcpl(int pri) 226 { 227 curcpu()->ci_cpl = pri; 228 } 229 230 static inline void 231 cpu_dosoftints(void) 232 { 233 #ifdef __HAVE_FAST_SOFTINTS 234 void dosoftints(void); 235 #ifndef __HAVE_PIC_FAST_SOFTINTS 236 struct cpu_info * const ci = curcpu(); 237 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) 238 dosoftints(); 239 #endif 240 #endif 241 } 242 243 #ifdef __PROG32 244 void cpu_proc_fork(struct proc *, struct proc *); 245 #else 246 #define cpu_proc_fork(p1, p2) 247 #endif 248 249 /* 250 * Scheduling glue 251 */ 252 253 #define setsoftast() (curcpu()->ci_astpending = 1) 254 255 /* 256 * Notify the current process (p) that it has a signal pending, 257 * process as soon as possible. 258 */ 259 260 #define cpu_signotify(l) setsoftast() 261 262 /* 263 * Give a profiling tick to the current process when the user profiling 264 * buffer pages are invalid. On the i386, request an ast to send us 265 * through trap(), marking the proc as needing a profiling tick. 266 */ 267 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast()) 268 269 /* 270 * We've already preallocated the stack for the idlelwps for additional CPUs. 271 * This hook allows to return them. 272 */ 273 vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *); 274 275 #ifndef acorn26 276 /* 277 * cpu device glue (belongs in cpuvar.h) 278 */ 279 void cpu_attach(device_t, cpuid_t); 280 #endif 281 282 #endif /* !_LOCORE */ 283 284 #endif /* _KERNEL */ 285 286 #endif /* !_ARM_CPU_H_ */ 287
Indexes created Tue Sep 23 21:09:50 GMT 2025