cpu.h revision 1.85
1 /* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM_CPU_H_ 49 #define _ARM_CPU_H_ 50 51 /* 52 * User-visible definitions 53 */ 54 55 /* CTL_MACHDEP definitions. */ 56 #define CPU_DEBUG 1 /* int: misc kernel debug control */ 57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */ 58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */ 59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 60 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */ 61 #define CPU_MAXID 6 /* number of valid machdep ids */ 62 63 #if defined(_KERNEL) || defined(_KMEMUSER) 64 65 /* 66 * Kernel-only definitions 67 */ 68 69 #if !defined(_MODULE) && defined(_KERNEL_OPT) 70 #include "opt_multiprocessor.h" 71 #include "opt_cpuoptions.h" 72 #include "opt_lockdebug.h" 73 #include "opt_cputypes.h" 74 #endif /* !_MODULE && _KERNEL_OPT */ 75 76 #ifndef _LOCORE 77 #if defined(TPIDRPRW_IS_CURLWP) || defined(TPIDRPRW_IS_CURCPU) 78 #include <arm/armreg.h> 79 #endif 80 81 /* 1 == use cpu_sleep(), 0 == don't */ 82 extern int cpu_do_powersave; 83 extern int cpu_fpu_present; 84 85 /* All the CLKF_* macros take a struct clockframe * as an argument. */ 86 87 /* 88 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the 89 * frame came from USR mode or not. 90 */ 91 #ifdef __PROG32 92 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE) 93 #else 94 #define CLKF_USERMODE(cf) (((cf)->cf_if.if_r15 & R15_MODE) == R15_MODE_USR) 95 #endif 96 97 /* 98 * CLKF_INTR: True if we took the interrupt from inside another 99 * interrupt handler. 100 */ 101 #if defined(__PROG32) && !defined(__ARM_EABI__) 102 /* Hack to treat FPE time as interrupt time so we can measure it */ 103 #define CLKF_INTR(cf) \ 104 ((curcpu()->ci_intr_depth > 1) || \ 105 ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE) 106 #else 107 #define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1) 108 #endif 109 110 /* 111 * CLKF_PC: Extract the program counter from a clockframe 112 */ 113 #ifdef __PROG32 114 #define CLKF_PC(frame) (frame->cf_tf.tf_pc) 115 #else 116 #define CLKF_PC(frame) (frame->cf_if.if_r15 & R15_PC) 117 #endif 118 119 /* 120 * LWP_PC: Find out the program counter for the given lwp. 121 */ 122 #ifdef __PROG32 123 #define LWP_PC(l) (lwp_trapframe(l)->tf_pc) 124 #else 125 #define LWP_PC(l) (lwp_trapframe(l)->tf_r15 & R15_PC) 126 #endif 127 128 /* 129 * Per-CPU information. For now we assume one CPU. 130 */ 131 #ifdef _KERNEL 132 static inline int curcpl(void); 133 static inline void set_curcpl(int); 134 static inline void cpu_dosoftints(void); 135 #endif 136 137 #ifdef _KMEMUSER 138 #include <sys/intr.h> 139 #endif 140 #include <sys/cpu_data.h> 141 #include <sys/device_if.h> 142 #include <sys/evcnt.h> 143 144 struct cpu_info { 145 struct cpu_data ci_data; /* MI per-cpu data */ 146 device_t ci_dev; /* Device corresponding to this CPU */ 147 cpuid_t ci_cpuid; 148 uint32_t ci_arm_cpuid; /* aggregate CPU id */ 149 uint32_t ci_arm_cputype; /* CPU type */ 150 uint32_t ci_arm_cpurev; /* CPU revision */ 151 uint32_t ci_ctrl; /* The CPU control register */ 152 int ci_cpl; /* current processor level (spl) */ 153 int ci_astpending; /* */ 154 int ci_want_resched; /* resched() was called */ 155 int ci_intr_depth; /* */ 156 struct cpu_softc *ci_softc; /* platform softc */ 157 lwp_t *ci_softlwps[SOFTINT_COUNT]; 158 volatile uint32_t ci_softints; 159 lwp_t *ci_curlwp; /* current lwp */ 160 lwp_t *ci_lastlwp; /* last lwp */ 161 struct evcnt ci_arm700bugcount; 162 int32_t ci_mtx_count; 163 int ci_mtx_oldspl; 164 register_t ci_undefsave[3]; 165 uint32_t ci_vfp_id; 166 uint64_t ci_lastintr; 167 struct pmap_tlb_info *ci_tlb_info; 168 struct pmap *ci_pmap_lastuser; 169 struct pmap *ci_pmap_cur; 170 tlb_asid_t ci_pmap_asid_cur; 171 struct trapframe *ci_ddb_regs; 172 struct evcnt ci_abt_evs[16]; 173 struct evcnt ci_und_ev; 174 struct evcnt ci_und_cp15_ev; 175 struct evcnt ci_vfp_evs[3]; 176 #if defined(MP_CPU_INFO_MEMBERS) 177 MP_CPU_INFO_MEMBERS 178 #endif 179 }; 180 181 extern struct cpu_info cpu_info_store; 182 183 #if defined(TPIDRPRW_IS_CURLWP) 184 static inline struct lwp * 185 _curlwp(void) 186 { 187 return (struct lwp *) armreg_tpidrprw_read(); 188 } 189 190 static inline void 191 _curlwp_set(struct lwp *l) 192 { 193 armreg_tpidrprw_write((uintptr_t)l); 194 } 195 196 // Also in <sys/lwp.h> but also here if this was included before <sys/lwp.h> 197 static inline struct cpu_info *lwp_getcpu(struct lwp *); 198 199 #define curlwp _curlwp() 200 // curcpu() expands into two instructions: a mrc and a ldr 201 #define curcpu() lwp_getcpu(_curlwp()) 202 #elif defined(TPIDRPRW_IS_CURCPU) 203 static inline struct cpu_info * 204 curcpu(void) 205 { 206 return (struct cpu_info *) armreg_tpidrprw_read(); 207 } 208 #elif !defined(MULTIPROCESSOR) 209 #define curcpu() (&cpu_info_store) 210 #else 211 #error MULTIPROCESSOR requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP 212 #endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */ 213 214 #ifndef curlwp 215 #define curlwp (curcpu()->ci_curlwp) 216 #endif 217 218 #define CPU_INFO_ITERATOR int 219 #if defined(MULTIPROCESSOR) 220 extern struct cpu_info *cpu_info[]; 221 #define cpu_number() (curcpu()->ci_index) 222 void cpu_boot_secondary_processors(void); 223 #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0) 224 #define CPU_INFO_FOREACH(cii, ci) \ 225 cii = 0, ci = cpu_info[0]; cii < ncpu && (ci = cpu_info[cii]) != NULL; cii++ 226 #else 227 #define cpu_number() 0 228 229 #define CPU_IS_PRIMARY(ci) true 230 #define CPU_INFO_FOREACH(cii, ci) \ 231 cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL 232 #endif 233 234 #define LWP0_CPU_INFO (&cpu_info_store) 235 236 static inline int 237 curcpl(void) 238 { 239 return curcpu()->ci_cpl; 240 } 241 242 static inline void 243 set_curcpl(int pri) 244 { 245 curcpu()->ci_cpl = pri; 246 } 247 248 static inline void 249 cpu_dosoftints(void) 250 { 251 #ifdef __HAVE_FAST_SOFTINTS 252 void dosoftints(void); 253 #ifndef __HAVE_PIC_FAST_SOFTINTS 254 struct cpu_info * const ci = curcpu(); 255 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) 256 dosoftints(); 257 #endif 258 #endif 259 } 260 261 #ifdef __PROG32 262 void cpu_proc_fork(struct proc *, struct proc *); 263 #else 264 #define cpu_proc_fork(p1, p2) 265 #endif 266 267 /* 268 * Scheduling glue 269 */ 270 271 #define setsoftast() (curcpu()->ci_astpending = 1) 272 273 /* 274 * Notify the current process (p) that it has a signal pending, 275 * process as soon as possible. 276 */ 277 278 #define cpu_signotify(l) setsoftast() 279 280 /* 281 * Give a profiling tick to the current process when the user profiling 282 * buffer pages are invalid. On the i386, request an ast to send us 283 * through trap(), marking the proc as needing a profiling tick. 284 */ 285 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast()) 286 287 /* 288 * We've already preallocated the stack for the idlelwps for additional CPUs. 289 * This hook allows to return them. 290 */ 291 vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *); 292 293 #ifndef acorn26 294 /* 295 * cpu device glue (belongs in cpuvar.h) 296 */ 297 void cpu_attach(device_t, cpuid_t); 298 #endif 299 300 #endif /* !_LOCORE */ 301 302 #endif /* _KERNEL */ 303 304 #endif /* !_ARM_CPU_H_ */ 305
Indexes created Wed Sep 24 05:09:52 GMT 2025