cpu.h revision 1.95
1 /* $NetBSD: cpu.h,v 1.95 2018/01/24 09:04:45 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM_CPU_H_ 49 #define _ARM_CPU_H_ 50 51 /* 52 * User-visible definitions 53 */ 54 55 /* CTL_MACHDEP definitions. */ 56 #define CPU_DEBUG 1 /* int: misc kernel debug control */ 57 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */ 58 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */ 59 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 60 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */ 61 #define CPU_MAXID 6 /* number of valid machdep ids */ 62 63 #if defined(_KERNEL) || defined(_KMEMUSER) 64 65 /* 66 * Kernel-only definitions 67 */ 68 69 #if !defined(_MODULE) && defined(_KERNEL_OPT) 70 #include "opt_multiprocessor.h" 71 #include "opt_cpuoptions.h" 72 #include "opt_lockdebug.h" 73 #include "opt_cputypes.h" 74 #endif /* !_MODULE && _KERNEL_OPT */ 75 76 #ifndef _LOCORE 77 #if defined(TPIDRPRW_IS_CURLWP) || defined(TPIDRPRW_IS_CURCPU) 78 #include <arm/armreg.h> 79 #endif 80 81 /* 1 == use cpu_sleep(), 0 == don't */ 82 extern int cpu_do_powersave; 83 extern int cpu_fpu_present; 84 85 /* All the CLKF_* macros take a struct clockframe * as an argument. */ 86 87 /* 88 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the 89 * frame came from USR mode or not. 90 */ 91 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE) 92 93 /* 94 * CLKF_INTR: True if we took the interrupt from inside another 95 * interrupt handler. 96 */ 97 #if !defined(__ARM_EABI__) 98 /* Hack to treat FPE time as interrupt time so we can measure it */ 99 #define CLKF_INTR(cf) \ 100 ((curcpu()->ci_intr_depth > 1) || \ 101 ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE) 102 #else 103 #define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1) 104 #endif 105 106 /* 107 * CLKF_PC: Extract the program counter from a clockframe 108 */ 109 #define CLKF_PC(frame) (frame->cf_tf.tf_pc) 110 111 /* 112 * LWP_PC: Find out the program counter for the given lwp. 113 */ 114 #define LWP_PC(l) (lwp_trapframe(l)->tf_pc) 115 116 /* 117 * Per-CPU information. For now we assume one CPU. 118 */ 119 #ifdef _KERNEL 120 static inline int curcpl(void); 121 static inline void set_curcpl(int); 122 static inline void cpu_dosoftints(void); 123 #endif 124 125 #ifdef _KMEMUSER 126 #include <sys/intr.h> 127 #endif 128 #include <sys/atomic.h> 129 #include <sys/cpu_data.h> 130 #include <sys/device_if.h> 131 #include <sys/evcnt.h> 132 133 struct cpu_info { 134 struct cpu_data ci_data; /* MI per-cpu data */ 135 device_t ci_dev; /* Device corresponding to this CPU */ 136 cpuid_t ci_cpuid; 137 uint32_t ci_arm_cpuid; /* aggregate CPU id */ 138 uint32_t ci_arm_cputype; /* CPU type */ 139 uint32_t ci_arm_cpurev; /* CPU revision */ 140 uint32_t ci_ctrl; /* The CPU control register */ 141 int ci_cpl; /* current processor level (spl) */ 142 volatile int ci_astpending; /* */ 143 int ci_want_resched; /* resched() was called */ 144 int ci_intr_depth; /* */ 145 struct cpu_softc *ci_softc; /* platform softc */ 146 lwp_t *ci_softlwps[SOFTINT_COUNT]; 147 volatile uint32_t ci_softints; 148 lwp_t *ci_curlwp; /* current lwp */ 149 lwp_t *ci_lastlwp; /* last lwp */ 150 struct evcnt ci_arm700bugcount; 151 int32_t ci_mtx_count; 152 int ci_mtx_oldspl; 153 register_t ci_undefsave[3]; 154 uint32_t ci_vfp_id; 155 uint64_t ci_lastintr; 156 struct pmap_tlb_info *ci_tlb_info; 157 struct pmap *ci_pmap_lastuser; 158 struct pmap *ci_pmap_cur; 159 tlb_asid_t ci_pmap_asid_cur; 160 struct trapframe *ci_ddb_regs; 161 struct evcnt ci_abt_evs[16]; 162 struct evcnt ci_und_ev; 163 struct evcnt ci_und_cp15_ev; 164 struct evcnt ci_vfp_evs[3]; 165 #if defined(MP_CPU_INFO_MEMBERS) 166 MP_CPU_INFO_MEMBERS 167 #endif 168 }; 169 170 extern struct cpu_info cpu_info_store; 171 172 struct lwp *arm_curlwp(void); 173 struct cpu_info *arm_curcpu(void); 174 175 #if defined(_MODULE) 176 177 #define curlwp arm_curlwp() 178 #define curcpu() arm_curcpu() 179 180 #elif defined(TPIDRPRW_IS_CURLWP) 181 static inline struct lwp * 182 _curlwp(void) 183 { 184 return (struct lwp *) armreg_tpidrprw_read(); 185 } 186 187 static inline void 188 _curlwp_set(struct lwp *l) 189 { 190 armreg_tpidrprw_write((uintptr_t)l); 191 } 192 193 // Also in <sys/lwp.h> but also here if this was included before <sys/lwp.h> 194 static inline struct cpu_info *lwp_getcpu(struct lwp *); 195 196 #define curlwp _curlwp() 197 // curcpu() expands into two instructions: a mrc and a ldr 198 #define curcpu() lwp_getcpu(_curlwp()) 199 #elif defined(TPIDRPRW_IS_CURCPU) 200 #ifdef __HAVE_PREEMPTION 201 #error __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP 202 #endif 203 static inline struct cpu_info * 204 curcpu(void) 205 { 206 return (struct cpu_info *) armreg_tpidrprw_read(); 207 } 208 #elif !defined(MULTIPROCESSOR) 209 #define curcpu() (&cpu_info_store) 210 #elif !defined(__HAVE_PREEMPTION) 211 #error MULTIPROCESSOR && !__HAVE_PREEMPTION requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP 212 #else 213 #error MULTIPROCESSOR && __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP 214 #endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */ 215 216 #ifndef curlwp 217 #define curlwp (curcpu()->ci_curlwp) 218 #endif 219 220 #define CPU_INFO_ITERATOR int 221 #if defined(_MODULE) || defined(MULTIPROCESSOR) 222 extern struct cpu_info *cpu_info[]; 223 #define cpu_number() (curcpu()->ci_index) 224 #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0) 225 #define CPU_INFO_FOREACH(cii, ci) \ 226 cii = 0, ci = cpu_info[0]; cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL; cii++ 227 #else 228 #define cpu_number() 0 229 230 #define CPU_IS_PRIMARY(ci) true 231 #define CPU_INFO_FOREACH(cii, ci) \ 232 cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL 233 #endif 234 235 #if defined(MULTIPROCESSOR) 236 void cpu_boot_secondary_processors(void); 237 #endif 238 239 #define LWP0_CPU_INFO (&cpu_info_store) 240 241 static inline int 242 curcpl(void) 243 { 244 return curcpu()->ci_cpl; 245 } 246 247 static inline void 248 set_curcpl(int pri) 249 { 250 curcpu()->ci_cpl = pri; 251 } 252 253 static inline void 254 cpu_dosoftints(void) 255 { 256 #ifdef __HAVE_FAST_SOFTINTS 257 void dosoftints(void); 258 #ifndef __HAVE_PIC_FAST_SOFTINTS 259 struct cpu_info * const ci = curcpu(); 260 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) 261 dosoftints(); 262 #endif 263 #endif 264 } 265 266 void cpu_proc_fork(struct proc *, struct proc *); 267 268 /* 269 * Scheduling glue 270 */ 271 272 #ifdef __HAVE_PREEMPTION 273 #define setsoftast(ci) atomic_or_uint(&(ci)->ci_astpending, __BIT(0)) 274 #else 275 #define setsoftast(ci) ((ci)->ci_astpending = __BIT(0)) 276 #endif 277 278 /* 279 * Notify the current process (p) that it has a signal pending, 280 * process as soon as possible. 281 */ 282 283 #define cpu_signotify(l) setsoftast((l)->l_cpu) 284 285 /* 286 * Give a profiling tick to the current process when the user profiling 287 * buffer pages are invalid. On the i386, request an ast to send us 288 * through trap(), marking the proc as needing a profiling tick. 289 */ 290 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, \ 291 setsoftast((l)->l_cpu)) 292 293 /* for preeemption. */ 294 void cpu_set_curpri(int); 295 296 /* 297 * We've already preallocated the stack for the idlelwps for additional CPUs. 298 * This hook allows to return them. 299 */ 300 vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *); 301 302 /* 303 * cpu device glue (belongs in cpuvar.h) 304 */ 305 void cpu_attach(device_t, cpuid_t); 306 307 #endif /* !_LOCORE */ 308 309 #endif /* _KERNEL */ 310 311 #endif /* !_ARM_CPU_H_ */ 312
Indexes created Fri Sep 26 08:10:20 GMT 2025