cpu.h revision 1.98 1 /* $NetBSD: cpu.h,v 1.98 2018/10/18 09:01:52 skrll Exp $ */
2
3 /*
4 * Copyright (c) 1994-1996 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * cpu.h
40 *
41 * CPU specific symbols
42 *
43 * Created : 18/09/94
44 *
45 * Based on kate/katelib/arm6.h
46 */
47
48 #ifndef _ARM_CPU_H_
49 #define _ARM_CPU_H_
50
51 #ifdef __arm__
52
53 /*
54 * User-visible definitions
55 */
56
57 /* CTL_MACHDEP definitions. */
58 #define CPU_DEBUG 1 /* int: misc kernel debug control */
59 #define CPU_BOOTED_DEVICE 2 /* string: device we booted from */
60 #define CPU_BOOTED_KERNEL 3 /* string: kernel we booted */
61 #define CPU_CONSDEV 4 /* struct: dev_t of our console */
62 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */
63
64 #if defined(_KERNEL) || defined(_KMEMUSER)
65
66 /*
67 * Kernel-only definitions
68 */
69
70 #if !defined(_MODULE) && defined(_KERNEL_OPT)
71 #include "opt_multiprocessor.h"
72 #include "opt_cpuoptions.h"
73 #include "opt_lockdebug.h"
74 #include "opt_cputypes.h"
75 #endif /* !_MODULE && _KERNEL_OPT */
76
77 #ifndef _LOCORE
78 #if defined(TPIDRPRW_IS_CURLWP) || defined(TPIDRPRW_IS_CURCPU)
79 #include <arm/armreg.h>
80 #endif
81
82 /* 1 == use cpu_sleep(), 0 == don't */
83 extern int cpu_do_powersave;
84 extern int cpu_fpu_present;
85
86 /* All the CLKF_* macros take a struct clockframe * as an argument. */
87
88 /*
89 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the
90 * frame came from USR mode or not.
91 */
92 #define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE)
93
94 /*
95 * CLKF_INTR: True if we took the interrupt from inside another
96 * interrupt handler.
97 */
98 #if !defined(__ARM_EABI__)
99 /* Hack to treat FPE time as interrupt time so we can measure it */
100 #define CLKF_INTR(cf) \
101 ((curcpu()->ci_intr_depth > 1) || \
102 ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
103 #else
104 #define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1)
105 #endif
106
107 /*
108 * CLKF_PC: Extract the program counter from a clockframe
109 */
110 #define CLKF_PC(frame) (frame->cf_tf.tf_pc)
111
112 /*
113 * LWP_PC: Find out the program counter for the given lwp.
114 */
115 #define LWP_PC(l) (lwp_trapframe(l)->tf_pc)
116
117 /*
118 * Per-CPU information. For now we assume one CPU.
119 */
120 #ifdef _KERNEL
121 static inline int curcpl(void);
122 static inline void set_curcpl(int);
123 static inline void cpu_dosoftints(void);
124 #endif
125
126 #ifdef _KMEMUSER
127 #include <sys/intr.h>
128 #endif
129 #include <sys/atomic.h>
130 #include <sys/cpu_data.h>
131 #include <sys/device_if.h>
132 #include <sys/evcnt.h>
133
134 struct cpu_info {
135 struct cpu_data ci_data; /* MI per-cpu data */
136 device_t ci_dev; /* Device corresponding to this CPU */
137 cpuid_t ci_cpuid;
138 uint32_t ci_arm_cpuid; /* aggregate CPU id */
139 uint32_t ci_arm_cputype; /* CPU type */
140 uint32_t ci_arm_cpurev; /* CPU revision */
141 uint32_t ci_ctrl; /* The CPU control register */
142 int ci_cpl; /* current processor level (spl) */
143 volatile int ci_astpending; /* */
144 int ci_want_resched; /* resched() was called */
145 int ci_intr_depth; /* */
146 struct cpu_softc *ci_softc; /* platform softc */
147 lwp_t *ci_softlwps[SOFTINT_COUNT];
148 volatile uint32_t ci_softints;
149 lwp_t *ci_curlwp; /* current lwp */
150 lwp_t *ci_lastlwp; /* last lwp */
151 struct evcnt ci_arm700bugcount;
152 int32_t ci_mtx_count;
153 int ci_mtx_oldspl;
154 register_t ci_undefsave[3];
155 uint32_t ci_vfp_id;
156 uint64_t ci_lastintr;
157 struct pmap_tlb_info *ci_tlb_info;
158 struct pmap *ci_pmap_lastuser;
159 struct pmap *ci_pmap_cur;
160 tlb_asid_t ci_pmap_asid_cur;
161 struct trapframe *ci_ddb_regs;
162 struct evcnt ci_abt_evs[16];
163 struct evcnt ci_und_ev;
164 struct evcnt ci_und_cp15_ev;
165 struct evcnt ci_vfp_evs[3];
166 #if defined(MP_CPU_INFO_MEMBERS)
167 MP_CPU_INFO_MEMBERS
168 #endif
169 };
170
171 extern struct cpu_info cpu_info_store;
172
173 struct lwp *arm_curlwp(void);
174 struct cpu_info *arm_curcpu(void);
175
176 #if defined(_MODULE)
177
178 #define curlwp arm_curlwp()
179 #define curcpu() arm_curcpu()
180
181 #elif defined(TPIDRPRW_IS_CURLWP)
182 static inline struct lwp *
183 _curlwp(void)
184 {
185 return (struct lwp *) armreg_tpidrprw_read();
186 }
187
188 static inline void
189 _curlwp_set(struct lwp *l)
190 {
191 armreg_tpidrprw_write((uintptr_t)l);
192 }
193
194 // Also in <sys/lwp.h> but also here if this was included before <sys/lwp.h>
195 static inline struct cpu_info *lwp_getcpu(struct lwp *);
196
197 #define curlwp _curlwp()
198 // curcpu() expands into two instructions: a mrc and a ldr
199 #define curcpu() lwp_getcpu(_curlwp())
200 #elif defined(TPIDRPRW_IS_CURCPU)
201 #ifdef __HAVE_PREEMPTION
202 #error __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
203 #endif
204 static inline struct cpu_info *
205 curcpu(void)
206 {
207 return (struct cpu_info *) armreg_tpidrprw_read();
208 }
209 #elif !defined(MULTIPROCESSOR)
210 #define curcpu() (&cpu_info_store)
211 #elif !defined(__HAVE_PREEMPTION)
212 #error MULTIPROCESSOR && !__HAVE_PREEMPTION requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP
213 #else
214 #error MULTIPROCESSOR && __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
215 #endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */
216
217 #ifndef curlwp
218 #define curlwp (curcpu()->ci_curlwp)
219 #endif
220
221 #define CPU_INFO_ITERATOR int
222 #if defined(_MODULE) || defined(MULTIPROCESSOR)
223 extern struct cpu_info *cpu_info[];
224 #define cpu_number() (curcpu()->ci_index)
225 #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0)
226 #define CPU_INFO_FOREACH(cii, ci) \
227 cii = 0, ci = cpu_info[0]; cii < (ncpu ? ncpu : 1) && (ci = cpu_info[cii]) != NULL; cii++
228 #else
229 #define cpu_number() 0
230
231 #define CPU_IS_PRIMARY(ci) true
232 #define CPU_INFO_FOREACH(cii, ci) \
233 cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL
234 #endif
235
236 #if defined(MULTIPROCESSOR)
237
238 extern volatile u_int arm_cpu_hatched;
239 extern uint64_t cpu_mpidr[];
240
241 void cpu_mpstart(void);
242 void cpu_init_secondary_processor(int);
243 void cpu_boot_secondary_processors(void);
244 #endif
245
246 #define LWP0_CPU_INFO (&cpu_info_store)
247
248 static inline int
249 curcpl(void)
250 {
251 return curcpu()->ci_cpl;
252 }
253
254 static inline void
255 set_curcpl(int pri)
256 {
257 curcpu()->ci_cpl = pri;
258 }
259
260 static inline void
261 cpu_dosoftints(void)
262 {
263 #ifdef __HAVE_FAST_SOFTINTS
264 void dosoftints(void);
265 #ifndef __HAVE_PIC_FAST_SOFTINTS
266 struct cpu_info * const ci = curcpu();
267 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
268 dosoftints();
269 #endif
270 #endif
271 }
272
273 void cpu_proc_fork(struct proc *, struct proc *);
274
275 /*
276 * Scheduling glue
277 */
278
279 #ifdef __HAVE_PREEMPTION
280 #define setsoftast(ci) atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
281 #else
282 #define setsoftast(ci) ((ci)->ci_astpending = __BIT(0))
283 #endif
284
285 /*
286 * Notify the current process (p) that it has a signal pending,
287 * process as soon as possible.
288 */
289
290 #define cpu_signotify(l) setsoftast((l)->l_cpu)
291
292 /*
293 * Give a profiling tick to the current process when the user profiling
294 * buffer pages are invalid. On the i386, request an ast to send us
295 * through trap(), marking the proc as needing a profiling tick.
296 */
297 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, \
298 setsoftast((l)->l_cpu))
299
300 /* for preeemption. */
301 void cpu_set_curpri(int);
302
303 /*
304 * We've already preallocated the stack for the idlelwps for additional CPUs.
305 * This hook allows to return them.
306 */
307 vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *);
308
309 /*
310 * cpu device glue (belongs in cpuvar.h)
311 */
312 void cpu_attach(device_t, cpuid_t);
313
314 #endif /* !_LOCORE */
315
316 #endif /* _KERNEL */
317
318 #elif defined(__aarch64__)
319
320 #include <aarch64/cpu.h>
321
322 #endif /* __arm__/__aarch64__ */
323
324 #endif /* !_ARM_CPU_H_ */
325