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ieee.h revision 1.5 
      1 /*	$NetBSD: ieee.h,v 1.5 2003/10/26 15:57:54 kleink Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. Neither the name of the University nor the names of its contributors
     25  *    may be used to endorse or promote products derived from this software
     26  *    without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     38  * SUCH DAMAGE.
     39  *
     40  *	@(#)ieee.h	8.1 (Berkeley) 6/11/93
     41  */
     42 
     43 /*
     44  * ieee.h defines the machine-dependent layout of the machine's IEEE
     45  * floating point.
     46  */
     47 
     48 /*
     49  * Define the number of bits in each fraction and exponent.
     50  *
     51  *		     k	         k+1
     52  * Note that  1.0 x 2  == 0.1 x 2      and that denorms are represented
     53  *
     54  *					  (-exp_bias+1)
     55  * as fractions that look like 0.fffff x 2             .  This means that
     56  *
     57  *			 -126
     58  * the number 0.10000 x 2    , for instance, is the same as the normalized
     59  *
     60  *		-127			   -128
     61  * float 1.0 x 2    .  Thus, to represent 2    , we need one leading zero
     62  *
     63  *				  -129
     64  * in the fraction; to represent 2    , we need two, and so on.  This
     65  *
     66  *						     (-exp_bias-fracbits+1)
     67  * implies that the smallest denormalized number is 2
     68  *
     69  * for whichever format we are talking about: for single precision, for
     70  *
     71  *						-126		-149
     72  * instance, we get .00000000000000000000001 x 2    , or 1.0 x 2    , and
     73  *
     74  * -149 == -127 - 23 + 1.
     75  */
     76 
     77 /*
     78  * The ARM has two sets of FP data formats.  The FPA supports 32-bit, 64-bit
     79  * and 96-bit IEEE formats, with the words in big-endian order.  VFP supports
     80  * 32-bin and 64-bit IEEE formats with the words in the CPU's native byte
     81  * order.
     82  *
     83  * The FPA also has two packed decimal formats, but we ignore them here.
     84  */
     85 
     86 #define	SNG_EXPBITS	8
     87 #define	SNG_FRACBITS	23
     88 
     89 #define	DBL_EXPBITS	11
     90 #define	DBL_FRACBITS	52
     91 
     92 struct ieee_single {
     93 	u_int	sng_frac:23;
     94 	u_int	sng_exponent:8;
     95 	u_int	sng_sign:1;
     96 };
     97 
     98 #ifdef __VFP_FP__
     99 struct ieee_double {
    100 #ifdef __ARMEB__
    101 	u_int	dbl_sign:1;
    102 	u_int	dbl_exp:11;
    103 	u_int	dbl_frach:20;
    104 	u_int	dbl_fracl;
    105 #else /* !__ARMEB__ */
    106 	u_int	dbl_fracl;
    107 	u_int	dbl_frach:20;
    108 	u_int	dbl_exp:11;
    109 	u_int	dbl_sign:1;
    110 #endif /* !__ARMEB__ */
    111 };
    112 #else /* !__VFP_FP__ */
    113 struct ieee_double {
    114 	u_int	dbl_frach:20;
    115 	u_int	dbl_exp:11;
    116 	u_int	dbl_sign:1;
    117 	u_int	dbl_fracl;
    118 };
    119 #endif /* !__VFP_FP__ */
    120 
    121 /*
    122  * Floats whose exponent is in [1..INFNAN) (of whatever type) are
    123  * `normal'.  Floats whose exponent is INFNAN are either Inf or NaN.
    124  * Floats whose exponent is zero are either zero (iff all fraction
    125  * bits are zero) or subnormal values.
    126  *
    127  * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
    128  * high fraction; if the bit is set, it is a `quiet NaN'.
    129  */
    130 #define	SNG_EXP_INFNAN	255
    131 #define	DBL_EXP_INFNAN	2047
    132 
    133 #if 0
    134 #define	SNG_QUIETNAN	(1 << 22)
    135 #define	DBL_QUIETNAN	(1 << 19)
    136 #endif
    137 
    138 /*
    139  * Exponent biases.
    140  */
    141 #define	SNG_EXP_BIAS	127
    142 #define	DBL_EXP_BIAS	1023
    143