Home | History | Annotate | Line # | Download | only in include
lock.h revision 1.18
      1 /*	$NetBSD: lock.h,v 1.18 2012/07/15 08:26:21 matt Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Machine-dependent spin lock operations.
     34  *
     35  * NOTE: The SWP insn used here is available only on ARM architecture
     36  * version 3 and later (as well as 2a).  What we are going to do is
     37  * expect that the kernel will trap and emulate the insn.  That will
     38  * be slow, but give us the atomicity that we need.
     39  */
     40 
     41 #ifndef _ARM_LOCK_H_
     42 #define	_ARM_LOCK_H_
     43 
     44 static __inline int
     45 __SIMPLELOCK_LOCKED_P(__cpu_simple_lock_t *__ptr)
     46 {
     47 	return *__ptr == __SIMPLELOCK_LOCKED;
     48 }
     49 
     50 static __inline int
     51 __SIMPLELOCK_UNLOCKED_P(__cpu_simple_lock_t *__ptr)
     52 {
     53 	return *__ptr == __SIMPLELOCK_UNLOCKED;
     54 }
     55 
     56 static __inline void
     57 __cpu_simple_lock_clear(__cpu_simple_lock_t *__ptr)
     58 {
     59 	*__ptr = __SIMPLELOCK_UNLOCKED;
     60 }
     61 
     62 static __inline void
     63 __cpu_simple_lock_set(__cpu_simple_lock_t *__ptr)
     64 {
     65 	*__ptr = __SIMPLELOCK_LOCKED;
     66 }
     67 
     68 #ifdef _KERNEL
     69 #include <arm/cpufunc.h>
     70 
     71 #define	mb_read		drain_writebuf		/* in cpufunc.h */
     72 #define	mb_write	drain_writebuf		/* in cpufunc.h */
     73 #define	mb_memory	drain_writebuf		/* in cpufunc.h */
     74 #endif
     75 
     76 #if defined(_KERNEL)
     77 static __inline int
     78 __swp(int __val, volatile unsigned char *__ptr)
     79 {
     80 #ifdef _ARM_ARCH_6
     81 	int __rv, __tmp;
     82 	__asm volatile(
     83 		"1:\t"
     84 		"ldrexb\t%[__rv], [%[__ptr]]"			"\n\t"
     85 		"strexb\t%[__tmp], %[__val], [%[__ptr]]"	"\n\t"
     86 		"cmpeq\t%[__tmp], #0"				"\n\t"
     87 		"bne 1b"
     88 	    : [__rv] "=&r" (__rv), [__tmp] "=&r"(__tmp)
     89 	    : [__val] "r" (__val), [__ptr] "r" (__ptr) : "memory");
     90 	return __rv;
     91 #else
     92 	__asm volatile("swpb %0, %1, [%2]"
     93 	    : "=&r" (__val) : "r" (__val), "r" (__ptr) : "memory");
     94 	return __val;
     95 #endif
     96 }
     97 #else
     98 static __inline int
     99 __swp(int __val, volatile int *__ptr)
    100 {
    101 
    102 	__asm volatile("swp %0, %1, [%2]"
    103 	    : "=&r" (__val) : "r" (__val), "r" (__ptr) : "memory");
    104 	return __val;
    105 }
    106 #endif /* _KERNEL */
    107 
    108 static __inline void __attribute__((__unused__))
    109 __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
    110 {
    111 
    112 	*alp = __SIMPLELOCK_UNLOCKED;
    113 }
    114 
    115 static __inline void __attribute__((__unused__))
    116 __cpu_simple_lock(__cpu_simple_lock_t *alp)
    117 {
    118 
    119 	while (__swp(__SIMPLELOCK_LOCKED, alp) != __SIMPLELOCK_UNLOCKED)
    120 		continue;
    121 }
    122 
    123 static __inline int __attribute__((__unused__))
    124 __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
    125 {
    126 
    127 	return (__swp(__SIMPLELOCK_LOCKED, alp) == __SIMPLELOCK_UNLOCKED);
    128 }
    129 
    130 static __inline void __attribute__((__unused__))
    131 __cpu_simple_unlock(__cpu_simple_lock_t *alp)
    132 {
    133 
    134 	*alp = __SIMPLELOCK_UNLOCKED;
    135 }
    136 
    137 #endif /* _ARM_LOCK_H_ */
    138