mutex.h revision 1.13
11.13Smatt/*	$NetBSD: mutex.h,v 1.13 2012/09/25 05:24:00 matt Exp $	*/
21.1Smatt
31.1Smatt/*-
41.1Smatt * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
51.1Smatt * All rights reserved.
61.1Smatt *
71.1Smatt * This code is derived from software contributed to The NetBSD Foundation
81.1Smatt * by Jason R. Thorpe and Andrew Doran.
91.1Smatt *
101.1Smatt * Redistribution and use in source and binary forms, with or without
111.1Smatt * modification, are permitted provided that the following conditions
121.1Smatt * are met:
131.1Smatt * 1. Redistributions of source code must retain the above copyright
141.1Smatt *    notice, this list of conditions and the following disclaimer.
151.1Smatt * 2. Redistributions in binary form must reproduce the above copyright
161.1Smatt *    notice, this list of conditions and the following disclaimer in the
171.1Smatt *    documentation and/or other materials provided with the distribution.
181.1Smatt *
191.1Smatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
201.1Smatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
211.1Smatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
221.1Smatt * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
231.1Smatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
241.1Smatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
251.1Smatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
261.1Smatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
271.1Smatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
281.1Smatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
291.1Smatt * POSSIBILITY OF SUCH DAMAGE.
301.1Smatt */
311.1Smatt
321.1Smatt#ifndef _ARM_MUTEX_H_
331.1Smatt#define	_ARM_MUTEX_H_
341.1Smatt
351.1Smatt/*
361.5Sthorpej * The ARM mutex implementation is troublesome, because pre-v6 ARM lacks a
371.7Sthorpej * compare-and-swap operation.  However, there aren't any MP pre-v6 ARM
381.5Sthorpej * systems to speak of.  We are mostly concerned with atomicity with respect
391.5Sthorpej * to interrupts.
401.4Sthorpej *
411.7Sthorpej * ARMv6, however, does have ldrex/strex, and can thus implement an MP-safe
421.7Sthorpej * compare-and-swap.
431.4Sthorpej *
441.7Sthorpej * So, what we have done is impement simple mutexes using a compare-and-swap.
451.9Sad * We support pre-ARMv6 by implementing CAS as a restartable atomic sequence
461.9Sad * that is checked by the IRQ vector.  MP-safe ARMv6 support will be added later.
471.1Smatt */
481.1Smatt
491.1Smatt#ifndef __MUTEX_PRIVATE
501.1Smatt
511.1Smattstruct kmutex {
521.1Smatt	uintptr_t	mtx_pad1;
531.1Smatt};
541.1Smatt
551.1Smatt#else	/* __MUTEX_PRIVATE */
561.1Smatt
571.1Smattstruct kmutex {
581.7Sthorpej	union {
591.7Sthorpej		/* Adaptive mutex */
601.7Sthorpej		volatile uintptr_t	mtxa_owner;	/* 0-3 */
611.7Sthorpej
621.7Sthorpej		/* Spin mutex */
631.7Sthorpej		struct {
641.13Smatt			/*
651.13Smatt			 * Since the low bit of mtax_owner is used to flag this
661.13Smatt			 * mutex as a spin mutex, we can't use the first byte
671.13Smatt			 * or the last byte to store the ipl or lock values.
681.13Smatt			 */
691.7Sthorpej			volatile uint8_t	mtxs_dummy;
701.7Sthorpej			ipl_cookie_t		mtxs_ipl;
711.13Smatt			__cpu_simple_lock_t	mtxs_lock;
721.12Smatt			volatile uint8_t	mtxs_unused;
731.7Sthorpej		} s;
741.7Sthorpej	} u;
751.1Smatt};
761.1Smatt
771.7Sthorpej#define	mtx_owner		u.mtxa_owner
781.7Sthorpej#define	mtx_ipl			u.s.mtxs_ipl
791.7Sthorpej#define	mtx_lock		u.s.mtxs_lock
801.7Sthorpej
811.1Smatt#if 0
821.7Sthorpej#define	__HAVE_MUTEX_STUBS		1
831.7Sthorpej#define	__HAVE_SPIN_MUTEX_STUBS		1
841.1Smatt#endif
851.7Sthorpej#define	__HAVE_SIMPLE_MUTEXES		1
861.7Sthorpej
871.7Sthorpej/*
881.7Sthorpej * MUTEX_RECEIVE: no memory barrier required; we're synchronizing against
891.7Sthorpej * interrupts, not multiple processors.
901.7Sthorpej */
911.7Sthorpej#define	MUTEX_RECEIVE(mtx)		/* nothing */
921.7Sthorpej
931.7Sthorpej/*
941.7Sthorpej * MUTEX_GIVE: no memory barrier required; same reason.
951.7Sthorpej */
961.7Sthorpej#define	MUTEX_GIVE(mtx)			/* nothing */
971.7Sthorpej
981.9Sad#define	MUTEX_CAS(p, o, n)		\
991.11Smatt    (atomic_cas_ulong((volatile unsigned long *)(p), (o), (n)) == (o))
1001.11Smatt#ifdef MULTIPROCESSOR
1011.11Smatt#define	MUTEX_SMT_PAUSE()		__asm __volatile("wfe")
1021.11Smatt#define	MUTEX_SMT_WAKE()		__asm __volatile("sev")
1031.11Smatt#endif
1041.1Smatt
1051.1Smatt#endif	/* __MUTEX_PRIVATE */
1061.1Smatt
1071.1Smatt#endif /* _ARM_MUTEX_H_ */
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