profile.h revision 1.3.6.3
1 1.3.6.3 nathanw /* $NetBSD: profile.h,v 1.3.6.3 2002/04/01 07:39:10 nathanw Exp $ */ 2 1.3.6.2 nathanw 3 1.3.6.2 nathanw /* 4 1.3.6.2 nathanw * Copyright (c) 2001 Ben Harris 5 1.3.6.2 nathanw * Copyright (c) 1995-1996 Mark Brinicombe 6 1.3.6.2 nathanw * 7 1.3.6.2 nathanw * Redistribution and use in source and binary forms, with or without 8 1.3.6.2 nathanw * modification, are permitted provided that the following conditions 9 1.3.6.2 nathanw * are met: 10 1.3.6.2 nathanw * 1. Redistributions of source code must retain the above copyright 11 1.3.6.2 nathanw * notice, this list of conditions and the following disclaimer. 12 1.3.6.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 13 1.3.6.2 nathanw * notice, this list of conditions and the following disclaimer in the 14 1.3.6.2 nathanw * documentation and/or other materials provided with the distribution. 15 1.3.6.2 nathanw * 3. All advertising materials mentioning features or use of this software 16 1.3.6.2 nathanw * must display the following acknowledgement: 17 1.3.6.2 nathanw * This product includes software developed by Mark Brinicombe. 18 1.3.6.2 nathanw * 4. The name of the author may not be used to endorse or promote products 19 1.3.6.2 nathanw * derived from this software without specific prior written permission. 20 1.3.6.2 nathanw * 21 1.3.6.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 1.3.6.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 1.3.6.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 1.3.6.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 1.3.6.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 1.3.6.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 1.3.6.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 1.3.6.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 1.3.6.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 1.3.6.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 1.3.6.2 nathanw */ 32 1.3.6.2 nathanw 33 1.3.6.2 nathanw #define _MCOUNT_DECL void _mcount 34 1.3.6.2 nathanw 35 1.3.6.2 nathanw /* 36 1.3.6.2 nathanw * Cannot implement mcount in C as GCC will trash the ip register when it 37 1.3.6.2 nathanw * pushes a trapframe. Pity we cannot insert assembly before the function 38 1.3.6.2 nathanw * prologue. 39 1.3.6.2 nathanw */ 40 1.3.6.2 nathanw 41 1.3.6.2 nathanw #ifdef __ELF__ 42 1.3.6.2 nathanw #define MCOUNT_ASM_NAME "__mcount" 43 1.3.6.2 nathanw #ifdef PIC 44 1.3.6.2 nathanw #define PLTSYM "(PLT)" 45 1.3.6.2 nathanw #endif 46 1.3.6.2 nathanw #else 47 1.3.6.2 nathanw #define MCOUNT_ASM_NAME "mcount" 48 1.3.6.2 nathanw #endif 49 1.3.6.2 nathanw 50 1.3.6.2 nathanw #ifndef PLTSYM 51 1.3.6.2 nathanw #define PLTSYM 52 1.3.6.2 nathanw #endif 53 1.3.6.2 nathanw 54 1.3.6.2 nathanw #define MCOUNT \ 55 1.3.6.2 nathanw __asm__(".text"); \ 56 1.3.6.2 nathanw __asm__(".align 0"); \ 57 1.3.6.2 nathanw __asm__(".type " MCOUNT_ASM_NAME ",%function"); \ 58 1.3.6.2 nathanw __asm__(".global " MCOUNT_ASM_NAME); \ 59 1.3.6.2 nathanw __asm__(MCOUNT_ASM_NAME ":"); \ 60 1.3.6.2 nathanw /* \ 61 1.3.6.2 nathanw * Preserve registers that are trashed during mcount \ 62 1.3.6.2 nathanw */ \ 63 1.3.6.2 nathanw __asm__("stmfd sp!, {r0-r3, ip, lr}"); \ 64 1.3.6.2 nathanw /* Check what mode we're in. EQ => 32, NE => 26 */ \ 65 1.3.6.2 nathanw __asm__("teq r0, r0"); \ 66 1.3.6.2 nathanw __asm__("teq pc, r15"); \ 67 1.3.6.2 nathanw /* \ 68 1.3.6.2 nathanw * find the return address for mcount, \ 69 1.3.6.2 nathanw * and the return address for mcount's caller. \ 70 1.3.6.2 nathanw * \ 71 1.3.6.2 nathanw * frompcindex = pc pushed by call into self. \ 72 1.3.6.2 nathanw */ \ 73 1.3.6.2 nathanw __asm__("moveq r0, ip"); \ 74 1.3.6.2 nathanw __asm__("bicne r0, ip, #0xfc000003"); \ 75 1.3.6.2 nathanw /* \ 76 1.3.6.2 nathanw * selfpc = pc pushed by mcount call \ 77 1.3.6.2 nathanw */ \ 78 1.3.6.2 nathanw __asm__("moveq r1, lr"); \ 79 1.3.6.2 nathanw __asm__("bicne r1, lr, #0xfc000003"); \ 80 1.3.6.2 nathanw /* \ 81 1.3.6.2 nathanw * Call the real mcount code \ 82 1.3.6.2 nathanw */ \ 83 1.3.6.2 nathanw __asm__("bl " ___STRING(_C_LABEL(_mcount)) PLTSYM); \ 84 1.3.6.2 nathanw /* \ 85 1.3.6.2 nathanw * Restore registers that were trashed during mcount \ 86 1.3.6.2 nathanw */ \ 87 1.3.6.2 nathanw __asm__("ldmfd sp!, {r0-r3, lr, pc}"); 88 1.3.6.2 nathanw 89 1.3.6.2 nathanw #ifdef _KERNEL 90 1.3.6.3 nathanw #ifdef acorn26 91 1.3.6.2 nathanw extern int int_off_save(void); 92 1.3.6.2 nathanw extern void int_restore(int); 93 1.3.6.2 nathanw #define MCOUNT_ENTER (s = int_off_save()) 94 1.3.6.2 nathanw #define MCOUNT_EXIT int_restore(s) 95 1.3.6.2 nathanw #else 96 1.3.6.2 nathanw #include <arm/cpufunc.h> 97 1.3.6.2 nathanw /* 98 1.3.6.2 nathanw * splhigh() and splx() are heavyweight, and call mcount(). Therefore 99 1.3.6.2 nathanw * we disabled interrupts (IRQ, but not FIQ) directly on the CPU. 100 1.3.6.2 nathanw * 101 1.3.6.2 nathanw * We're lucky that the CPSR and 's' both happen to be 'int's. 102 1.3.6.2 nathanw */ 103 1.3.6.2 nathanw #define MCOUNT_ENTER s = SetCPSR(0x0080, 0x0080); /* set IRQ disable bit */ 104 1.3.6.2 nathanw #define MCOUNT_EXIT SetCPSR(0xffffffff, s); /* restore old value */ 105 1.3.6.3 nathanw #endif /* !acorn26 */ 106 1.3.6.2 nathanw #endif /* _KERNEL */ 107
Indexes created Mon Oct 27 08:10:08 GMT 2025