iomdiic.c revision 1.2
1 /* $NetBSD: iomdiic.c,v 1.2 2003/11/01 23:37:54 reinoud Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/device.h> 40 #include <sys/kernel.h> 41 #include <sys/systm.h> 42 #include <sys/lock.h> 43 44 #include <machine/bus.h> 45 #include <machine/cpu.h> 46 47 #include <arm/iomd/iomdreg.h> 48 #include <arm/iomd/iomdvar.h> 49 50 #include <dev/i2c/i2cvar.h> 51 #include <dev/i2c/i2c_bitbang.h> 52 53 #include <arm/iomd/iomdiicvar.h> 54 55 struct iomdiic_softc { 56 struct device sc_dev; 57 bus_space_tag_t sc_st; 58 bus_space_handle_t sc_sh; 59 60 struct i2c_controller sc_i2c; 61 struct lock sc_buslock; 62 63 /* 64 * The SDA pin is open-drain, so we make it an input by 65 * writing a 1 to it. 66 */ 67 uint8_t sc_iomd_iocr; 68 }; 69 70 static int iomdiic_acquire_bus(void *, int); 71 static void iomdiic_release_bus(void *, int); 72 73 static int iomdiic_send_start(void *, int); 74 static int iomdiic_send_stop(void *, int); 75 static int iomdiic_initiate_xfer(void *, i2c_addr_t, int); 76 static int iomdiic_read_byte(void *, uint8_t *, int); 77 static int iomdiic_write_byte(void *, uint8_t, int); 78 79 #define IOMDIIC_READ *(__volatile uint8_t *)(IOMD_ADDRESS(IOMD_IOCR)) 80 #define IOMDIIC_WRITE(x) *(__volatile uint8_t *)(IOMD_ADDRESS(IOMD_IOCR)) = (x) 81 82 #define IOMD_IOCR_SDA 0x01 83 #define IOMD_IOCR_SCL 0x02 84 85 static void 86 iomdiic_bb_set_bits(void *cookie, uint32_t bits) 87 { 88 struct iomdiic_softc *sc = cookie; 89 90 IOMDIIC_WRITE((IOMDIIC_READ & ~(IOMD_IOCR_SDA|IOMD_IOCR_SCL)) | 91 sc->sc_iomd_iocr | bits); 92 } 93 94 static void 95 iomdiic_bb_set_dir(void *cookie, uint32_t bits) 96 { 97 struct iomdiic_softc *sc = cookie; 98 99 sc->sc_iomd_iocr = bits; 100 } 101 102 static uint32_t 103 iomdiic_bb_read_bits(void *cookie) 104 { 105 106 return (IOMDIIC_READ); 107 } 108 109 static const struct i2c_bitbang_ops iomdiic_bbops = { 110 iomdiic_bb_set_bits, 111 iomdiic_bb_set_dir, 112 iomdiic_bb_read_bits, 113 { 114 IOMD_IOCR_SDA, /* SDA */ 115 IOMD_IOCR_SCL, /* SCL */ 116 0, /* SDA is output */ 117 IOMD_IOCR_SDA, /* SDA is input */ 118 } 119 }; 120 121 static int 122 iomdiic_match(struct device *parent, struct cfdata *cf, void *aux) 123 { 124 struct iic_attach_args *ia = aux; 125 126 if (strcmp(ia->ia_name, "iic") == 0) return 1; 127 return 0; 128 } 129 130 static void 131 iomdiic_attach(struct device *parent, struct device *self, void *aux) 132 { 133 struct iomdiic_softc *sc = (void *) self; 134 struct i2cbus_attach_args iba; 135 136 printf("\n"); 137 138 lockinit(&sc->sc_buslock, PRIBIO|PCATCH, "iomdiiclk", 0, 0); 139 140 sc->sc_i2c.ic_cookie = sc; 141 sc->sc_i2c.ic_acquire_bus = iomdiic_acquire_bus; 142 sc->sc_i2c.ic_release_bus = iomdiic_release_bus; 143 sc->sc_i2c.ic_send_start = iomdiic_send_start; 144 sc->sc_i2c.ic_send_stop = iomdiic_send_stop; 145 sc->sc_i2c.ic_initiate_xfer = iomdiic_initiate_xfer; 146 sc->sc_i2c.ic_read_byte = iomdiic_read_byte; 147 sc->sc_i2c.ic_write_byte = iomdiic_write_byte; 148 149 iba.iba_name = "iic"; 150 iba.iba_tag = &sc->sc_i2c; 151 (void) config_found(&sc->sc_dev, &iba, iicbus_print); 152 } 153 154 CFATTACH_DECL(iomdiic, sizeof(struct iomdiic_softc), 155 iomdiic_match, iomdiic_attach, NULL, NULL); 156 157 i2c_tag_t 158 iomdiic_bootstrap_cookie(void) 159 { 160 static struct iomdiic_softc sc; 161 162 /* XXX Yuck. */ 163 strcpy(sc.sc_dev.dv_xname, "iomdiicboot"); 164 165 sc.sc_i2c.ic_cookie = ≻ 166 sc.sc_i2c.ic_acquire_bus = iomdiic_acquire_bus; 167 sc.sc_i2c.ic_release_bus = iomdiic_release_bus; 168 sc.sc_i2c.ic_send_start = iomdiic_send_start; 169 sc.sc_i2c.ic_send_stop = iomdiic_send_stop; 170 sc.sc_i2c.ic_initiate_xfer = iomdiic_initiate_xfer; 171 sc.sc_i2c.ic_read_byte = iomdiic_read_byte; 172 sc.sc_i2c.ic_write_byte = iomdiic_write_byte; 173 174 return ((void *) &sc.sc_i2c); 175 } 176 177 static int 178 iomdiic_acquire_bus(void *cookie, int flags) 179 { 180 struct iomdiic_softc *sc = cookie; 181 182 /* XXX What should we do for the polling case? */ 183 if (flags & I2C_F_POLL) 184 return (0); 185 186 return (lockmgr(&sc->sc_buslock, LK_EXCLUSIVE, NULL)); 187 } 188 189 static void 190 iomdiic_release_bus(void *cookie, int flags) 191 { 192 struct iomdiic_softc *sc = cookie; 193 194 /* XXX See above. */ 195 if (flags & I2C_F_POLL) 196 return; 197 198 (void) lockmgr(&sc->sc_buslock, LK_RELEASE, NULL); 199 } 200 201 static int 202 iomdiic_send_start(void *cookie, int flags) 203 { 204 205 return (i2c_bitbang_send_start(cookie, flags, &iomdiic_bbops)); 206 } 207 208 static int 209 iomdiic_send_stop(void *cookie, int flags) 210 { 211 212 return (i2c_bitbang_send_stop(cookie, flags, &iomdiic_bbops)); 213 } 214 215 static int 216 iomdiic_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 217 { 218 219 return (i2c_bitbang_initiate_xfer(cookie, addr, flags, &iomdiic_bbops)); 220 } 221 222 static int 223 iomdiic_read_byte(void *cookie, uint8_t *bytep, int flags) 224 { 225 226 return (i2c_bitbang_read_byte(cookie, bytep, flags, &iomdiic_bbops)); 227 } 228 229 static int 230 iomdiic_write_byte(void *cookie, uint8_t byte, int flags) 231 { 232 233 return (i2c_bitbang_write_byte(cookie, byte, flags, &iomdiic_bbops)); 234 } 235
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