vidc20config.c revision 1.20.8.1
1 /* $NetBSD: vidc20config.c,v 1.20.8.1 2006/08/11 15:41:11 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Reinoud Zandijk 5 * Copyright (c) 1996 Mark Brinicombe 6 * Copyright (c) 1996 Robert Black 7 * Copyright (c) 1994-1995 Melvyn Tang-Richardson 8 * Copyright (c) 1994-1995 RiscBSD kernel team 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the RiscBSD kernel team 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE RISCBSD TEAM ``AS IS'' AND ANY EXPRESS 27 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE 30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * NetBSD kernel project 39 * 40 * vidcvideo.c 41 * 42 * This file is the lower basis of the wscons driver for VIDC based ARM machines. 43 * It features the initialisation and all VIDC writing and keeps in internal state 44 * copy. 45 * Its currenly set up as a library file and not as a device; it could be named 46 * vidcvideo0 eventually. 47 */ 48 49 #include <sys/cdefs.h> 50 51 __KERNEL_RCSID(0, "$NetBSD: vidc20config.c,v 1.20.8.1 2006/08/11 15:41:11 yamt Exp $"); 52 53 #include <sys/types.h> 54 #include <sys/param.h> 55 #include <arm/iomd/vidc.h> 56 #include <arm/arm32/katelib.h> 57 #include <machine/bootconfig.h> 58 #include <machine/intr.h> 59 60 #include <sys/systm.h> 61 #include <sys/device.h> 62 #include <uvm/uvm_extern.h> 63 64 #include <arm/iomd/iomdreg.h> 65 #include <arm/iomd/iomdvar.h> 66 #include <arm/iomd/vidc20config.h> 67 68 69 /* 70 * A structure containing ALL the information required to restore 71 * the VIDC20 to any given state. ALL vidc transactions should 72 * go through these procedures, which record the vidc's state. 73 * it may be an idea to set the permissions of the vidc base address 74 * so we get a fault, so the fault routine can record the state but 75 * I guess that's not really necessary for the time being, since we 76 * can make the kernel more secure later on. Also, it is possible 77 * to write a routine to allow 'reading' of the vidc registers. 78 */ 79 80 static struct vidc_state vidc_lookup = { 81 { 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 82 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 83 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 84 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 85 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 86 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 87 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 88 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0 89 }, 90 91 VIDC_PALREG, 92 VIDC_BCOL, 93 VIDC_CP1 , 94 VIDC_CP2, 95 VIDC_CP3, 96 VIDC_HCR, 97 VIDC_HSWR, 98 VIDC_HBSR, 99 VIDC_HDSR, 100 VIDC_HDER, 101 VIDC_HBER, 102 VIDC_HCSR, 103 VIDC_HIR, 104 VIDC_VCR, 105 VIDC_VSWR, 106 VIDC_VBSR, 107 VIDC_VDSR, 108 VIDC_VDER, 109 VIDC_VBER, 110 VIDC_VCSR, 111 VIDC_VCER, 112 VIDC_EREG, 113 VIDC_FSYNREG, 114 VIDC_CONREG, 115 VIDC_DCTL 116 }; 117 118 struct vidc_state vidc_current[1]; 119 120 121 /* 122 * XXX global display variables XXX ... should be a structure 123 */ 124 static int cold_init = 0; /* flags initialisation */ 125 extern videomemory_t videomemory; 126 127 static struct vidc_mode vidc_initialmode; 128 static struct vidc_mode *vidc_currentmode; 129 130 unsigned int dispstart; 131 unsigned int dispsize; 132 unsigned int dispbase; 133 unsigned int dispend; 134 unsigned int ptov; 135 unsigned int vmem_base; 136 unsigned int phys_base; 137 unsigned int transfersize; 138 139 140 /* cursor stuff */ 141 char *cursor_normal; 142 char *cursor_transparent; 143 int p_cursor_normal; 144 int p_cursor_transparent; 145 int cursor_width; 146 int cursor_height; 147 148 149 /* 150 * VIDC mode definitions 151 * generated from RISC OS mode definition file by an `awk' script 152 */ 153 extern struct vidc_mode vidcmodes[]; 154 155 156 /* 157 * configuration printing 158 * 159 */ 160 161 void 162 vidcvideo_printdetails(void) 163 { 164 printf(": refclk=%dMHz %dKB %s ", (vidc_fref / 1000000), 165 videomemory.vidm_size / 1024, 166 (videomemory.vidm_type == VIDEOMEM_TYPE_VRAM) ? "VRAM" : "DRAM"); 167 } 168 169 170 /* 171 * Common functions to directly access VIDC registers 172 */ 173 int 174 vidcvideo_write(u_int reg, int value) 175 { 176 int counter; 177 178 int *current; 179 int *tab; 180 181 tab = (int *)&vidc_lookup; 182 current = (int *)vidc_current; 183 184 185 /* 186 * OK, the VIDC_PALETTE register is handled differently 187 * to the others on the VIDC, so take that into account here 188 */ 189 if (reg == VIDC_PALREG) { 190 vidc_current->palreg = 0; 191 WriteWord(vidc_base, reg | value); 192 return 0; 193 } 194 195 if (reg == VIDC_PALETTE) { 196 WriteWord(vidc_base, reg | value); 197 vidc_current->palette[vidc_current->palreg] = value; 198 vidc_current->palreg++; 199 vidc_current->palreg = vidc_current->palreg & 0xff; 200 return 0; 201 } 202 203 /* 204 * Undefine SAFER if you wish to speed things up (a little) 205 * although this means the function will assume things abou 206 * the structure of vidc_state. i.e. the first 256 words are 207 * the palette array 208 */ 209 210 #define SAFER 211 212 #ifdef SAFER 213 #define INITVALUE 0 214 #else 215 #define INITVALUE 256 216 #endif 217 218 for (counter = INITVALUE; 219 counter <= sizeof(struct vidc_state); 220 counter++) { 221 if (reg == tab[counter]) { 222 WriteWord ( vidc_base, reg | value ); 223 current[counter] = value; 224 return 0; 225 } 226 } 227 return -1; 228 } 229 230 231 void 232 vidcvideo_setpalette(struct vidc_state *vidc) 233 { 234 int counter = 0; 235 236 vidcvideo_write(VIDC_PALREG, 0x00000000); 237 for (counter = 0; counter <= 255; counter++) 238 vidcvideo_write(VIDC_PALETTE, vidc->palette[counter]); 239 } 240 241 242 void 243 vidcvideo_setstate(struct vidc_state *vidc) 244 { 245 vidcvideo_write ( VIDC_PALREG, vidc->palreg ); 246 vidcvideo_write ( VIDC_BCOL, vidc->bcol ); 247 vidcvideo_write ( VIDC_CP1, vidc->cp1 ); 248 vidcvideo_write ( VIDC_CP2, vidc->cp2 ); 249 vidcvideo_write ( VIDC_CP3, vidc->cp3 ); 250 vidcvideo_write ( VIDC_HCR, vidc->hcr ); 251 vidcvideo_write ( VIDC_HSWR, vidc->hswr ); 252 vidcvideo_write ( VIDC_HBSR, vidc->hbsr ); 253 vidcvideo_write ( VIDC_HDSR, vidc->hdsr ); 254 vidcvideo_write ( VIDC_HDER, vidc->hder ); 255 vidcvideo_write ( VIDC_HBER, vidc->hber ); 256 vidcvideo_write ( VIDC_HCSR, vidc->hcsr ); 257 vidcvideo_write ( VIDC_HIR, vidc->hir ); 258 vidcvideo_write ( VIDC_VCR, vidc->vcr ); 259 vidcvideo_write ( VIDC_VSWR, vidc->vswr ); 260 vidcvideo_write ( VIDC_VBSR, vidc->vbsr ); 261 vidcvideo_write ( VIDC_VDSR, vidc->vdsr ); 262 vidcvideo_write ( VIDC_VDER, vidc->vder ); 263 vidcvideo_write ( VIDC_VBER, vidc->vber ); 264 vidcvideo_write ( VIDC_VCSR, vidc->vcsr ); 265 vidcvideo_write ( VIDC_VCER, vidc->vcer ); 266 /* 267 * Right, dunno what to set these to yet, but let's keep RiscOS's 268 * ones for now, until the time is right to finish this code 269 */ 270 271 /* vidcvideo_write ( VIDC_EREG, vidc->ereg ); */ 272 /* vidcvideo_write ( VIDC_FSYNREG, vidc->fsynreg ); */ 273 /* vidcvideo_write ( VIDC_CONREG, vidc->conreg ); */ 274 /* vidcvideo_write ( VIDC_DCTL, vidc->dctl ); */ 275 276 vidcvideo_setpalette(vidc); 277 } 278 279 280 void 281 vidcvideo_getstate(struct vidc_state *vidc) 282 { 283 284 *vidc = *vidc_current; 285 } 286 287 288 void 289 vidcvideo_getmode(struct vidc_mode *mode) 290 { 291 292 *mode = *vidc_currentmode; 293 } 294 295 296 static int 297 vidcvideo_coldinit(void) 298 { 299 int found; 300 int loop; 301 302 /* Blank out the cursor */ 303 304 vidcvideo_write(VIDC_CP1, 0x0); 305 vidcvideo_write(VIDC_CP2, 0x0); 306 vidcvideo_write(VIDC_CP3, 0x0); 307 308 /* Try to determine the current mode */ 309 vidc_initialmode.hder = bootconfig.width+1; 310 vidc_initialmode.vder = bootconfig.height+1; 311 vidc_initialmode.log2_bpp = bootconfig.log2_bpp; 312 313 dispbase = vmem_base = dispstart = videomemory.vidm_vbase; 314 phys_base = videomemory.vidm_pbase; 315 316 /* Nut - should be using videomemory.vidm_size - mark */ 317 if (videomemory.vidm_type == VIDEOMEM_TYPE_DRAM) { 318 dispsize = videomemory.vidm_size; 319 transfersize = 16; 320 } else { 321 dispsize = bootconfig.vram[0].pages * PAGE_SIZE; 322 transfersize = dispsize >> 10; 323 } 324 325 ptov = dispbase - phys_base; 326 327 dispend = dispstart+dispsize; 328 329 /* try to find the current mode from the bootloader in my table */ 330 vidc_currentmode = &vidcmodes[0]; 331 loop = 0; 332 found = 0; 333 while (vidcmodes[loop].pixel_rate != 0) { 334 if (vidcmodes[loop].hder == (bootconfig.width + 1) 335 && vidcmodes[loop].vder == (bootconfig.height + 1) 336 && vidcmodes[loop].frame_rate == bootconfig.framerate) { 337 vidc_currentmode = &vidcmodes[loop]; 338 found = 1; 339 } 340 ++loop; 341 } 342 343 /* if not found choose first mode but dont be picky on the framerate */ 344 if (!found) { 345 vidc_currentmode = &vidcmodes[0]; 346 loop = 0; 347 found = 0; 348 349 while (vidcmodes[loop].pixel_rate != 0) { 350 if (vidcmodes[loop].hder == (bootconfig.width + 1) 351 && vidcmodes[loop].vder == (bootconfig.height + 1)) { 352 vidc_currentmode = &vidcmodes[loop]; 353 found = 1; 354 } 355 ++loop; 356 } 357 } 358 359 vidc_currentmode->log2_bpp = bootconfig.log2_bpp; 360 361 dispstart = dispbase; 362 dispend = dispstart+dispsize; 363 364 IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov); 365 IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov); 366 IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov); 367 return 0; 368 } 369 370 371 /* simple function to abstract vidc variables ; returns virt start address of screen */ 372 /* XXX asumption that video memory is mapped in twice */ 373 void *vidcvideo_hwscroll(int bytes) 374 { 375 376 dispstart += bytes; 377 if (dispstart >= dispbase + dispsize) dispstart -= dispsize; 378 if (dispstart < dispbase) dispstart += dispsize; 379 dispend = dispstart+dispsize; 380 381 /* return the start of the bit map of the screen (left top) */ 382 return (void *)dispstart; 383 } 384 385 386 /* reset the HW scroll to be at the start for the benefit of f.e. X */ 387 void *vidcvideo_hwscroll_reset(void) 388 { 389 void *cookie = (void *)dispstart; 390 391 dispstart = dispbase; 392 dispend = dispstart + dispsize; 393 return cookie; 394 } 395 396 397 /* put HW scroll back to where it was */ 398 void *vidcvideo_hwscroll_back(void *cookie) 399 { 400 401 dispstart = (int)cookie; 402 dispend = dispstart + dispsize; 403 return cookie; 404 } 405 406 407 /* this function is to be called perferably at vsync */ 408 void vidcvideo_progr_scroll(void) 409 { 410 411 IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov); 412 IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov); 413 IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov); 414 } 415 416 417 /* 418 * Select a new mode by reprogramming the VIDC chip 419 * XXX this part is known not to work for 32bpp 420 */ 421 422 struct vidc_mode newmode; 423 424 static const int bpp_mask_table[] = { 425 0, /* 1bpp */ 426 1, /* 2bpp */ 427 2, /* 4bpp */ 428 3, /* 8bpp */ 429 4, /* 16bpp */ 430 6 /* 32bpp */ 431 }; 432 433 434 void 435 vidcvideo_setmode(struct vidc_mode *mode) 436 { 437 register int acc; 438 int bpp_mask; 439 int ereg; 440 int best_r, best_v; 441 int least_error; 442 int r, v, f; 443 444 /* 445 * Find out what bit mask we need to or with the vidc20 446 * control register in order to generate the desired number of 447 * bits per pixel. log_bpp is log base 2 of the number of 448 * bits per pixel. 449 */ 450 451 bpp_mask = bpp_mask_table[mode->log2_bpp]; 452 453 newmode = *mode; 454 vidc_currentmode = &newmode; 455 456 least_error = INT_MAX; 457 best_r = 0; best_v = 0; 458 459 for (v = 63; v > 0; v--) { 460 for (r = 63; r > 0; r--) { 461 f = ((v * vidc_fref) /1000) / r; 462 if (least_error >= 463 abs(f - vidc_currentmode->pixel_rate)) { 464 least_error = 465 abs(f - vidc_currentmode->pixel_rate); 466 best_r = r; 467 best_v = v; 468 } 469 } 470 } 471 472 if (best_r > 63) best_r=63; 473 if (best_v > 63) best_v=63; 474 if (best_r < 1) best_r= 1; 475 if (best_v < 1) best_v= 1; 476 477 vidcvideo_write(VIDC_FSYNREG, (best_v-1)<<8 | (best_r-1)<<0); 478 479 acc=0; 480 acc+=vidc_currentmode->hswr; vidcvideo_write(VIDC_HSWR, (acc - 8 ) & (~1)); 481 acc+=vidc_currentmode->hbsr; vidcvideo_write(VIDC_HBSR, (acc - 12) & (~1)); 482 acc+=vidc_currentmode->hdsr; vidcvideo_write(VIDC_HDSR, (acc - 18) & (~1)); 483 acc+=vidc_currentmode->hder; vidcvideo_write(VIDC_HDER, (acc - 18) & (~1)); 484 acc+=vidc_currentmode->hber; vidcvideo_write(VIDC_HBER, (acc - 12) & (~1)); 485 acc+=vidc_currentmode->hcr; vidcvideo_write(VIDC_HCR, (acc - 8 ) & (~3)); 486 487 acc=0; 488 acc+=vidc_currentmode->vswr; vidcvideo_write(VIDC_VSWR, (acc - 1)); 489 acc+=vidc_currentmode->vbsr; vidcvideo_write(VIDC_VBSR, (acc - 1)); 490 acc+=vidc_currentmode->vdsr; vidcvideo_write(VIDC_VDSR, (acc - 1)); 491 acc+=vidc_currentmode->vder; vidcvideo_write(VIDC_VDER, (acc - 1)); 492 acc+=vidc_currentmode->vber; vidcvideo_write(VIDC_VBER, (acc - 1)); 493 acc+=vidc_currentmode->vcr; vidcvideo_write(VIDC_VCR, (acc - 1)); 494 495 IOMD_WRITE_WORD(IOMD_FSIZE, vidc_currentmode->vcr 496 + vidc_currentmode->vswr 497 + vidc_currentmode->vber 498 + vidc_currentmode->vbsr - 1); 499 500 if (dispsize <= 1024*1024) 501 vidcvideo_write(VIDC_DCTL, vidc_currentmode->hder>>2 | 1<<16 | 1<<12); 502 else 503 vidcvideo_write(VIDC_DCTL, vidc_currentmode->hder>>2 | 3<<16 | 1<<12); 504 505 ereg = 1<<12; 506 if (vidc_currentmode->sync_pol & 0x01) 507 ereg |= 1<<16; 508 if (vidc_currentmode->sync_pol & 0x02) 509 ereg |= 1<<18; 510 vidcvideo_write(VIDC_EREG, ereg); 511 if (dispsize > 1024*1024) { 512 if (vidc_currentmode->hder >= 800) 513 vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5); 514 else 515 vidcvideo_write(VIDC_CONREG, 6<<8 | bpp_mask<<5); 516 } else { 517 vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5); 518 } 519 } 520 521 522 #if 0 523 /* not used for now */ 524 void 525 vidcvideo_set_display_base(base) 526 u_int base; 527 { 528 dispstart = dispstart-dispbase + base; 529 dispbase = vmem_base = base; 530 dispend = base + dispsize; 531 ptov = dispbase - phys_base; 532 } 533 #endif 534 535 536 /* 537 * Main initialisation routine for now 538 */ 539 540 static int cursor_init = 0; 541 542 int 543 vidcvideo_init(void) 544 { 545 vidcvideo_coldinit(); 546 if (cold_init && (cursor_init == 0)) 547 /* vidcvideo_flash_go() */; 548 549 /* setting a mode goes wrong in 32 bpp ... 8 and 16 seem OK */ 550 vidcvideo_setmode(vidc_currentmode); 551 vidcvideo_blank(0); /* display on */ 552 553 vidcvideo_stdpalette(); 554 555 if (cold_init == 0) { 556 vidcvideo_write(VIDC_CP1, 0x0); 557 vidcvideo_write(VIDC_CP2, 0x0); 558 vidcvideo_write(VIDC_CP3, 0x0); 559 } else 560 vidcvideo_cursor_init(CURSOR_MAX_WIDTH, CURSOR_MAX_HEIGHT); 561 562 cold_init = 1; 563 return 0; 564 } 565 566 567 /* reinitialise the vidcvideo */ 568 void 569 vidcvideo_reinit() 570 { 571 572 vidcvideo_coldinit(); 573 vidcvideo_setmode(vidc_currentmode); 574 } 575 576 577 int 578 vidcvideo_cursor_init(int width, int height) 579 { 580 static char *cursor_data = NULL; 581 int counter; 582 int line; 583 paddr_t pa; 584 585 cursor_width = width; 586 cursor_height = height; 587 588 if (!cursor_data) { 589 /* Allocate cursor memory first time round */ 590 cursor_data = (char *)uvm_km_alloc(kernel_map, PAGE_SIZE, 0, 591 UVM_KMF_WIRED | UVM_KMF_ZERO); 592 if (!cursor_data) 593 panic("Cannot allocate memory for hardware cursor"); 594 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_data, &pa); 595 IOMD_WRITE_WORD(IOMD_CURSINIT, pa); 596 } 597 598 /* Blank the cursor while initialising it's sprite */ 599 600 vidcvideo_write ( VIDC_CP1, 0x0 ); 601 vidcvideo_write ( VIDC_CP2, 0x0 ); 602 vidcvideo_write ( VIDC_CP3, 0x0 ); 603 604 cursor_normal = cursor_data; 605 cursor_transparent = cursor_data + (height * width); 606 607 cursor_transparent += 32; /* ALIGN */ 608 cursor_transparent = (char *)((int)cursor_transparent & (~31) ); 609 610 for ( line = 0; line<height; ++line ) { 611 for ( counter=0; counter<width/4;counter++ ) 612 cursor_normal[line * width + counter]=0x55; /* why 0x55 ? */ 613 for ( ; counter<8; counter++ ) 614 cursor_normal[line * width + counter]=0; 615 } 616 617 for ( line = 0; line<height; ++line ) { 618 for ( counter=0; counter<width/4;counter++ ) 619 cursor_transparent[line * width + counter]=0x00; 620 for ( ; counter<8; counter++ ) 621 cursor_transparent[line * width + counter]=0; 622 } 623 624 625 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_normal, 626 (void *)&p_cursor_normal); 627 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_transparent, 628 (void *)&p_cursor_transparent); 629 630 memset(cursor_normal, 0x55, width*height); /* white? */ 631 memset(cursor_transparent, 0x00, width*height);/* to see the diffence */ 632 633 /* Ok, now program the cursor; should be blank */ 634 vidcvideo_enablecursor(0); 635 636 return 0; 637 } 638 639 640 void 641 vidcvideo_updatecursor(int xcur, int ycur) 642 { 643 int frontporch = vidc_currentmode->hswr + vidc_currentmode->hbsr + 644 vidc_currentmode->hdsr; 645 int topporch = vidc_currentmode->vswr + vidc_currentmode->vbsr + 646 vidc_currentmode->vdsr; 647 648 vidcvideo_write(VIDC_HCSR, frontporch -17 + xcur); 649 vidcvideo_write(VIDC_VCSR, topporch -2 + (ycur+1)-2 + 3 - 650 cursor_height); 651 vidcvideo_write(VIDC_VCER, topporch -2 + (ycur+3)+2 + 3 ); 652 } 653 654 655 void 656 vidcvideo_enablecursor(int on) 657 { 658 659 if (on) 660 IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_normal); 661 else 662 IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_transparent); 663 vidcvideo_write ( VIDC_CP1, 0xffffff ); /* enable */ 664 } 665 666 667 void 668 vidcvideo_stdpalette() 669 { 670 int i; 671 672 switch (vidc_currentmode->log2_bpp) { 673 case 0: /* 1 bpp */ 674 case 1: /* 2 bpp */ 675 case 2: /* 4 bpp */ 676 case 3: /* 8 bpp */ 677 vidcvideo_write(VIDC_PALREG, 0x00000000); 678 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 0)); 679 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 0)); 680 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 0)); 681 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 0)); 682 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 255)); 683 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 255)); 684 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 255)); 685 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255)); 686 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 128)); 687 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 128)); 688 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 255, 128)); 689 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 128)); 690 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 255)); 691 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 255)); 692 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255)); 693 break; 694 case 4: /* 16 bpp */ 695 /* 696 * The use of the palette in 16-bit modes is quite 697 * fun. Comments in linux/drivers/video/acornfb.c 698 * imply that it goes something like this: 699 * 700 * red = LUT[pixel[7:0]].red 701 * green = LUT[pixel[11:4]].green 702 * blue = LUT[pixel[15:8]].blue 703 * 704 * We use 6:5:5 R:G:B cos that's what Xarm32VIDC wants. 705 */ 706 #define RBITS 6 707 #define GBITS 5 708 #define BBITS 5 709 vidcvideo_write(VIDC_PALREG, 0x00000000); 710 for (i = 0; i < 256; i++) { 711 int r, g, b; 712 713 r = i & ((1 << RBITS) - 1); 714 g = (i >> (RBITS - 4)) & ((1 << GBITS) - 1); 715 b = (i >> (RBITS + GBITS - 8)) & ((1 << BBITS) - 1); 716 vidcvideo_write(VIDC_PALETTE, 717 VIDC_COL(r << (8 - RBITS) | r >> (2 * RBITS - 8), 718 g << (8 - GBITS) | g >> (2 * GBITS - 8), 719 b << (8 - BBITS) | b >> (2 * BBITS - 8))); 720 } 721 break; 722 case 5: /* 32 bpp */ 723 vidcvideo_write(VIDC_PALREG, 0x00000000); 724 for (i = 0; i < 256; i++) 725 vidcvideo_write(VIDC_PALETTE, VIDC_COL(i, i, i)); 726 break; 727 } 728 } 729 730 int 731 vidcvideo_blank(int video_off) 732 { 733 int ereg; 734 735 ereg = 1<<12; 736 if (vidc_currentmode->sync_pol & 0x01) 737 ereg |= 1<<16; 738 if (vidc_currentmode->sync_pol & 0x02) 739 ereg |= 1<<18; 740 741 if (!video_off) 742 vidcvideo_write(VIDC_EREG, ereg); 743 else 744 vidcvideo_write(VIDC_EREG, 0); 745 return 0; 746 } 747 748 /* end of vidc20config.c */ 749
Indexes created Wed Oct 22 00:09:40 GMT 2025