vidc20config.c revision 1.23
1 /* $NetBSD: vidc20config.c,v 1.23 2006/08/17 22:33:59 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Reinoud Zandijk 5 * Copyright (c) 1996 Mark Brinicombe 6 * Copyright (c) 1996 Robert Black 7 * Copyright (c) 1994-1995 Melvyn Tang-Richardson 8 * Copyright (c) 1994-1995 RiscBSD kernel team 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the RiscBSD kernel team 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE RISCBSD TEAM ``AS IS'' AND ANY EXPRESS 27 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE 30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * NetBSD kernel project 39 * 40 * vidcvideo.c 41 * 42 * This file is the lower basis of the wscons driver for VIDC based ARM machines. 43 * It features the initialisation and all VIDC writing and keeps in internal state 44 * copy. 45 * Its currenly set up as a library file and not as a device; it could be named 46 * vidcvideo0 eventually. 47 */ 48 49 #include <sys/cdefs.h> 50 51 __KERNEL_RCSID(0, "$NetBSD: vidc20config.c,v 1.23 2006/08/17 22:33:59 bjh21 Exp $"); 52 53 #include <sys/types.h> 54 #include <sys/param.h> 55 #include <arm/iomd/vidc.h> 56 #include <arm/arm32/katelib.h> 57 #include <machine/bootconfig.h> 58 #include <machine/intr.h> 59 60 #include <sys/systm.h> 61 #include <sys/device.h> 62 #include <uvm/uvm_extern.h> 63 64 #include <arm/iomd/iomdreg.h> 65 #include <arm/iomd/iomdvar.h> 66 #include <arm/iomd/vidc20config.h> 67 68 69 /* 70 * A structure containing ALL the information required to restore 71 * the VIDC20 to any given state. ALL vidc transactions should 72 * go through these procedures, which record the vidc's state. 73 * it may be an idea to set the permissions of the vidc base address 74 * so we get a fault, so the fault routine can record the state but 75 * I guess that's not really necessary for the time being, since we 76 * can make the kernel more secure later on. Also, it is possible 77 * to write a routine to allow 'reading' of the vidc registers. 78 */ 79 80 static struct vidc_state vidc_lookup = { 81 { 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 82 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 83 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 84 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 85 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 86 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 87 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 88 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0 89 }, 90 91 VIDC_PALREG, 92 VIDC_BCOL, 93 VIDC_CP1 , 94 VIDC_CP2, 95 VIDC_CP3, 96 VIDC_HCR, 97 VIDC_HSWR, 98 VIDC_HBSR, 99 VIDC_HDSR, 100 VIDC_HDER, 101 VIDC_HBER, 102 VIDC_HCSR, 103 VIDC_HIR, 104 VIDC_VCR, 105 VIDC_VSWR, 106 VIDC_VBSR, 107 VIDC_VDSR, 108 VIDC_VDER, 109 VIDC_VBER, 110 VIDC_VCSR, 111 VIDC_VCER, 112 VIDC_EREG, 113 VIDC_FSYNREG, 114 VIDC_CONREG, 115 VIDC_DCTL 116 }; 117 118 struct vidc_state vidc_current[1]; 119 120 121 /* 122 * XXX global display variables XXX ... should be a structure 123 */ 124 static int cold_init = 0; /* flags initialisation */ 125 extern videomemory_t videomemory; 126 127 static struct vidc_mode *vidc_currentmode; 128 129 unsigned int dispstart; 130 unsigned int dispsize; 131 unsigned int dispbase; 132 unsigned int dispend; 133 unsigned int ptov; 134 unsigned int vmem_base; 135 unsigned int phys_base; 136 unsigned int transfersize; 137 138 139 /* cursor stuff */ 140 char *cursor_normal; 141 char *cursor_transparent; 142 int p_cursor_normal; 143 int p_cursor_transparent; 144 int cursor_width; 145 int cursor_height; 146 147 148 /* 149 * VIDC mode definitions 150 * generated from RISC OS mode definition file by an `awk' script 151 */ 152 extern struct vidc_mode vidcmodes[]; 153 154 155 /* 156 * configuration printing 157 * 158 */ 159 160 void 161 vidcvideo_printdetails(void) 162 { 163 printf(": refclk=%dMHz %dKB %s ", (vidc_fref / 1000000), 164 videomemory.vidm_size / 1024, 165 (videomemory.vidm_type == VIDEOMEM_TYPE_VRAM) ? "VRAM" : "DRAM"); 166 } 167 168 169 /* 170 * Common functions to directly access VIDC registers 171 */ 172 int 173 vidcvideo_write(u_int reg, int value) 174 { 175 int counter; 176 177 int *current; 178 int *tab; 179 180 tab = (int *)&vidc_lookup; 181 current = (int *)vidc_current; 182 183 184 /* 185 * OK, the VIDC_PALETTE register is handled differently 186 * to the others on the VIDC, so take that into account here 187 */ 188 if (reg == VIDC_PALREG) { 189 vidc_current->palreg = 0; 190 WriteWord(vidc_base, reg | value); 191 return 0; 192 } 193 194 if (reg == VIDC_PALETTE) { 195 WriteWord(vidc_base, reg | value); 196 vidc_current->palette[vidc_current->palreg] = value; 197 vidc_current->palreg++; 198 vidc_current->palreg = vidc_current->palreg & 0xff; 199 return 0; 200 } 201 202 /* 203 * Undefine SAFER if you wish to speed things up (a little) 204 * although this means the function will assume things abou 205 * the structure of vidc_state. i.e. the first 256 words are 206 * the palette array 207 */ 208 209 #define SAFER 210 211 #ifdef SAFER 212 #define INITVALUE 0 213 #else 214 #define INITVALUE 256 215 #endif 216 217 for (counter = INITVALUE; 218 counter <= sizeof(struct vidc_state); 219 counter++) { 220 if (reg == tab[counter]) { 221 WriteWord ( vidc_base, reg | value ); 222 current[counter] = value; 223 return 0; 224 } 225 } 226 return -1; 227 } 228 229 230 void 231 vidcvideo_setpalette(struct vidc_state *vidc) 232 { 233 int counter = 0; 234 235 vidcvideo_write(VIDC_PALREG, 0x00000000); 236 for (counter = 0; counter <= 255; counter++) 237 vidcvideo_write(VIDC_PALETTE, vidc->palette[counter]); 238 } 239 240 241 void 242 vidcvideo_setstate(struct vidc_state *vidc) 243 { 244 vidcvideo_write ( VIDC_PALREG, vidc->palreg ); 245 vidcvideo_write ( VIDC_BCOL, vidc->bcol ); 246 vidcvideo_write ( VIDC_CP1, vidc->cp1 ); 247 vidcvideo_write ( VIDC_CP2, vidc->cp2 ); 248 vidcvideo_write ( VIDC_CP3, vidc->cp3 ); 249 vidcvideo_write ( VIDC_HCR, vidc->hcr ); 250 vidcvideo_write ( VIDC_HSWR, vidc->hswr ); 251 vidcvideo_write ( VIDC_HBSR, vidc->hbsr ); 252 vidcvideo_write ( VIDC_HDSR, vidc->hdsr ); 253 vidcvideo_write ( VIDC_HDER, vidc->hder ); 254 vidcvideo_write ( VIDC_HBER, vidc->hber ); 255 vidcvideo_write ( VIDC_HCSR, vidc->hcsr ); 256 vidcvideo_write ( VIDC_HIR, vidc->hir ); 257 vidcvideo_write ( VIDC_VCR, vidc->vcr ); 258 vidcvideo_write ( VIDC_VSWR, vidc->vswr ); 259 vidcvideo_write ( VIDC_VBSR, vidc->vbsr ); 260 vidcvideo_write ( VIDC_VDSR, vidc->vdsr ); 261 vidcvideo_write ( VIDC_VDER, vidc->vder ); 262 vidcvideo_write ( VIDC_VBER, vidc->vber ); 263 vidcvideo_write ( VIDC_VCSR, vidc->vcsr ); 264 vidcvideo_write ( VIDC_VCER, vidc->vcer ); 265 /* 266 * Right, dunno what to set these to yet, but let's keep RiscOS's 267 * ones for now, until the time is right to finish this code 268 */ 269 270 /* vidcvideo_write ( VIDC_EREG, vidc->ereg ); */ 271 /* vidcvideo_write ( VIDC_FSYNREG, vidc->fsynreg ); */ 272 /* vidcvideo_write ( VIDC_CONREG, vidc->conreg ); */ 273 /* vidcvideo_write ( VIDC_DCTL, vidc->dctl ); */ 274 275 vidcvideo_setpalette(vidc); 276 } 277 278 279 void 280 vidcvideo_getstate(struct vidc_state *vidc) 281 { 282 283 *vidc = *vidc_current; 284 } 285 286 287 void 288 vidcvideo_getmode(struct vidc_mode *mode) 289 { 290 291 *mode = *vidc_currentmode; 292 } 293 294 295 static int 296 vidcvideo_coldinit(void) 297 { 298 int found; 299 int i; 300 301 /* Blank out the cursor */ 302 303 vidcvideo_write(VIDC_CP1, 0x0); 304 vidcvideo_write(VIDC_CP2, 0x0); 305 vidcvideo_write(VIDC_CP3, 0x0); 306 307 dispbase = vmem_base = dispstart = videomemory.vidm_vbase; 308 phys_base = videomemory.vidm_pbase; 309 310 /* Nut - should be using videomemory.vidm_size - mark */ 311 if (videomemory.vidm_type == VIDEOMEM_TYPE_DRAM) { 312 dispsize = videomemory.vidm_size; 313 transfersize = 16; 314 } else { 315 dispsize = bootconfig.vram[0].pages * PAGE_SIZE; 316 transfersize = dispsize >> 10; 317 } 318 319 ptov = dispbase - phys_base; 320 321 dispend = dispstart+dispsize; 322 323 /* try to find the current mode from the bootloader in my table */ 324 vidc_currentmode = &vidcmodes[0]; 325 found = 0; 326 for (i = 0; vidcmodes[i].timings.dot_clock != 0; i++) { 327 if (vidcmodes[i].timings.hdisplay == bootconfig.width + 1 328 && vidcmodes[i].timings.vdisplay == bootconfig.height + 1 329 && vidcmodes[i].frame_rate == bootconfig.framerate) { 330 vidc_currentmode = &vidcmodes[i]; 331 found = 1; 332 } 333 } 334 335 /* if not found choose first mode but dont be picky on the framerate */ 336 if (!found) { 337 for (i = 0; vidcmodes[i].timings.dot_clock != 0; i++) { 338 if (vidcmodes[i].timings.hdisplay == 339 bootconfig.width + 1 340 && vidcmodes[i].timings.vdisplay == 341 bootconfig.height + 1) { 342 vidc_currentmode = &vidcmodes[i]; 343 found = 1; 344 } 345 } 346 } 347 348 vidc_currentmode->log2_bpp = bootconfig.log2_bpp; 349 350 dispstart = dispbase; 351 dispend = dispstart+dispsize; 352 353 IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov); 354 IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov); 355 IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov); 356 return 0; 357 } 358 359 360 /* simple function to abstract vidc variables ; returns virt start address of screen */ 361 /* XXX asumption that video memory is mapped in twice */ 362 void *vidcvideo_hwscroll(int bytes) 363 { 364 365 dispstart += bytes; 366 if (dispstart >= dispbase + dispsize) dispstart -= dispsize; 367 if (dispstart < dispbase) dispstart += dispsize; 368 dispend = dispstart+dispsize; 369 370 /* return the start of the bit map of the screen (left top) */ 371 return (void *)dispstart; 372 } 373 374 375 /* reset the HW scroll to be at the start for the benefit of f.e. X */ 376 void *vidcvideo_hwscroll_reset(void) 377 { 378 void *cookie = (void *)dispstart; 379 380 dispstart = dispbase; 381 dispend = dispstart + dispsize; 382 return cookie; 383 } 384 385 386 /* put HW scroll back to where it was */ 387 void *vidcvideo_hwscroll_back(void *cookie) 388 { 389 390 dispstart = (int)cookie; 391 dispend = dispstart + dispsize; 392 return cookie; 393 } 394 395 396 /* this function is to be called perferably at vsync */ 397 void vidcvideo_progr_scroll(void) 398 { 399 400 IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov); 401 IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov); 402 IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov); 403 } 404 405 406 /* 407 * Select a new mode by reprogramming the VIDC chip 408 * XXX this part is known not to work for 32bpp 409 */ 410 411 struct vidc_mode newmode; 412 413 static const int bpp_mask_table[] = { 414 0, /* 1bpp */ 415 1, /* 2bpp */ 416 2, /* 4bpp */ 417 3, /* 8bpp */ 418 4, /* 16bpp */ 419 6 /* 32bpp */ 420 }; 421 422 423 void 424 vidcvideo_setmode(struct vidc_mode *mode) 425 { 426 struct videomode *vm; 427 int bpp_mask; 428 int ereg; 429 int best_r, best_v; 430 int least_error; 431 int r, v, f; 432 433 /* 434 * Find out what bit mask we need to or with the vidc20 435 * control register in order to generate the desired number of 436 * bits per pixel. log_bpp is log base 2 of the number of 437 * bits per pixel. 438 */ 439 440 bpp_mask = bpp_mask_table[mode->log2_bpp]; 441 442 newmode = *mode; 443 vidc_currentmode = &newmode; 444 vm = &vidc_currentmode->timings; 445 446 least_error = INT_MAX; 447 best_r = 0; best_v = 0; 448 449 for (v = 63; v > 0; v--) { 450 for (r = 63; r > 0; r--) { 451 f = ((v * vidc_fref) /1000) / r; 452 if (least_error >= abs(f - vm->dot_clock)) { 453 least_error = abs(f - vm->dot_clock); 454 best_r = r; 455 best_v = v; 456 } 457 } 458 } 459 460 if (best_r > 63) best_r=63; 461 if (best_v > 63) best_v=63; 462 if (best_r < 1) best_r= 1; 463 if (best_v < 1) best_v= 1; 464 465 vidcvideo_write(VIDC_FSYNREG, (best_v-1)<<8 | (best_r-1)<<0); 466 467 /* 468 * The translation from struct videomode to VIDC timings is made 469 * fun by the fact that the VIDC counts from the start of the sync 470 * pulse while struct videomode counts from the start of the display. 471 */ 472 vidcvideo_write(VIDC_HSWR, (vm->hsync_end - vm->hsync_start - 8) & ~1); 473 vidcvideo_write(VIDC_HBSR, (vm->htotal - vm->hsync_start - 12) & ~1); 474 vidcvideo_write(VIDC_HDSR, (vm->htotal - vm->hsync_start - 18) & ~1); 475 vidcvideo_write(VIDC_HDER, 476 (vm->htotal - vm->hsync_start + vm->hdisplay - 18) & ~1); 477 vidcvideo_write(VIDC_HBER, 478 (vm->htotal - vm->hsync_start + vm->hdisplay - 12) & ~1); 479 vidcvideo_write(VIDC_HCR, (vm->htotal - 8) & ~3); 480 481 vidcvideo_write(VIDC_VSWR, vm->vsync_end - vm->vsync_start - 1); 482 vidcvideo_write(VIDC_VBSR, vm->vtotal - vm->vsync_start - 1); 483 vidcvideo_write(VIDC_VDSR, vm->vtotal - vm->vsync_start - 1); 484 vidcvideo_write(VIDC_VDER, 485 vm->vtotal - vm->vsync_start + vm->vdisplay - 1); 486 vidcvideo_write(VIDC_VBER, 487 vm->vtotal - vm->vsync_start + vm->vdisplay - 1); 488 /* XXX VIDC20 data sheet say to subtract 2 */ 489 vidcvideo_write(VIDC_VCR, vm->vtotal - 1); 490 491 IOMD_WRITE_WORD(IOMD_FSIZE, vm->vdisplay - 1); 492 493 if (dispsize <= 1024*1024) 494 vidcvideo_write(VIDC_DCTL, vm->hdisplay>>2 | 1<<16 | 1<<12); 495 else 496 vidcvideo_write(VIDC_DCTL, vm->hdisplay>>2 | 3<<16 | 1<<12); 497 498 ereg = 1<<12; 499 if (vm->flags & VID_NHSYNC) 500 ereg |= 1<<16; 501 if (vm->flags & VID_NVSYNC) 502 ereg |= 1<<18; 503 vidcvideo_write(VIDC_EREG, ereg); 504 if (dispsize > 1024*1024) { 505 if (vm->hdisplay >= 800) 506 vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5); 507 else 508 vidcvideo_write(VIDC_CONREG, 6<<8 | bpp_mask<<5); 509 } else { 510 vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5); 511 } 512 } 513 514 515 #if 0 516 /* not used for now */ 517 void 518 vidcvideo_set_display_base(base) 519 u_int base; 520 { 521 dispstart = dispstart-dispbase + base; 522 dispbase = vmem_base = base; 523 dispend = base + dispsize; 524 ptov = dispbase - phys_base; 525 } 526 #endif 527 528 529 /* 530 * Main initialisation routine for now 531 */ 532 533 static int cursor_init = 0; 534 535 int 536 vidcvideo_init(void) 537 { 538 vidcvideo_coldinit(); 539 if (cold_init && (cursor_init == 0)) 540 /* vidcvideo_flash_go() */; 541 542 /* setting a mode goes wrong in 32 bpp ... 8 and 16 seem OK */ 543 vidcvideo_setmode(vidc_currentmode); 544 vidcvideo_blank(0); /* display on */ 545 546 vidcvideo_stdpalette(); 547 548 if (cold_init == 0) { 549 vidcvideo_write(VIDC_CP1, 0x0); 550 vidcvideo_write(VIDC_CP2, 0x0); 551 vidcvideo_write(VIDC_CP3, 0x0); 552 } else 553 vidcvideo_cursor_init(CURSOR_MAX_WIDTH, CURSOR_MAX_HEIGHT); 554 555 cold_init = 1; 556 return 0; 557 } 558 559 560 /* reinitialise the vidcvideo */ 561 void 562 vidcvideo_reinit() 563 { 564 565 vidcvideo_coldinit(); 566 vidcvideo_setmode(vidc_currentmode); 567 } 568 569 570 int 571 vidcvideo_cursor_init(int width, int height) 572 { 573 static char *cursor_data = NULL; 574 int counter; 575 int line; 576 paddr_t pa; 577 578 cursor_width = width; 579 cursor_height = height; 580 581 if (!cursor_data) { 582 /* Allocate cursor memory first time round */ 583 cursor_data = (char *)uvm_km_alloc(kernel_map, PAGE_SIZE, 0, 584 UVM_KMF_WIRED | UVM_KMF_ZERO); 585 if (!cursor_data) 586 panic("Cannot allocate memory for hardware cursor"); 587 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_data, &pa); 588 IOMD_WRITE_WORD(IOMD_CURSINIT, pa); 589 } 590 591 /* Blank the cursor while initialising it's sprite */ 592 593 vidcvideo_write ( VIDC_CP1, 0x0 ); 594 vidcvideo_write ( VIDC_CP2, 0x0 ); 595 vidcvideo_write ( VIDC_CP3, 0x0 ); 596 597 cursor_normal = cursor_data; 598 cursor_transparent = cursor_data + (height * width); 599 600 cursor_transparent += 32; /* ALIGN */ 601 cursor_transparent = (char *)((int)cursor_transparent & (~31) ); 602 603 for ( line = 0; line<height; ++line ) { 604 for ( counter=0; counter<width/4;counter++ ) 605 cursor_normal[line * width + counter]=0x55; /* why 0x55 ? */ 606 for ( ; counter<8; counter++ ) 607 cursor_normal[line * width + counter]=0; 608 } 609 610 for ( line = 0; line<height; ++line ) { 611 for ( counter=0; counter<width/4;counter++ ) 612 cursor_transparent[line * width + counter]=0x00; 613 for ( ; counter<8; counter++ ) 614 cursor_transparent[line * width + counter]=0; 615 } 616 617 618 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_normal, 619 (void *)&p_cursor_normal); 620 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_transparent, 621 (void *)&p_cursor_transparent); 622 623 memset(cursor_normal, 0x55, width*height); /* white? */ 624 memset(cursor_transparent, 0x00, width*height);/* to see the diffence */ 625 626 /* Ok, now program the cursor; should be blank */ 627 vidcvideo_enablecursor(0); 628 629 return 0; 630 } 631 632 633 void 634 vidcvideo_updatecursor(int xcur, int ycur) 635 { 636 int frontporch = vidc_currentmode->timings.htotal - 637 vidc_currentmode->timings.hsync_start; 638 int topporch = vidc_currentmode->timings.vtotal - 639 vidc_currentmode->timings.vsync_start; 640 641 vidcvideo_write(VIDC_HCSR, frontporch -17 + xcur); 642 vidcvideo_write(VIDC_VCSR, topporch -2 + (ycur+1)-2 + 3 - 643 cursor_height); 644 vidcvideo_write(VIDC_VCER, topporch -2 + (ycur+3)+2 + 3 ); 645 } 646 647 648 void 649 vidcvideo_enablecursor(int on) 650 { 651 652 if (on) 653 IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_normal); 654 else 655 IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_transparent); 656 vidcvideo_write ( VIDC_CP1, 0xffffff ); /* enable */ 657 } 658 659 660 void 661 vidcvideo_stdpalette() 662 { 663 int i; 664 665 switch (vidc_currentmode->log2_bpp) { 666 case 0: /* 1 bpp */ 667 case 1: /* 2 bpp */ 668 case 2: /* 4 bpp */ 669 case 3: /* 8 bpp */ 670 vidcvideo_write(VIDC_PALREG, 0x00000000); 671 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 0)); 672 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 0)); 673 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 0)); 674 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 0)); 675 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 255)); 676 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 255)); 677 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 255)); 678 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255)); 679 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 128)); 680 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 128)); 681 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 255, 128)); 682 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 128)); 683 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 255)); 684 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 255)); 685 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255)); 686 break; 687 case 4: /* 16 bpp */ 688 /* 689 * The use of the palette in 16-bit modes is quite 690 * fun. Comments in linux/drivers/video/acornfb.c 691 * imply that it goes something like this: 692 * 693 * red = LUT[pixel[7:0]].red 694 * green = LUT[pixel[11:4]].green 695 * blue = LUT[pixel[15:8]].blue 696 * 697 * We use 6:5:5 R:G:B cos that's what Xarm32VIDC wants. 698 */ 699 #define RBITS 6 700 #define GBITS 5 701 #define BBITS 5 702 vidcvideo_write(VIDC_PALREG, 0x00000000); 703 for (i = 0; i < 256; i++) { 704 int r, g, b; 705 706 r = i & ((1 << RBITS) - 1); 707 g = (i >> (RBITS - 4)) & ((1 << GBITS) - 1); 708 b = (i >> (RBITS + GBITS - 8)) & ((1 << BBITS) - 1); 709 vidcvideo_write(VIDC_PALETTE, 710 VIDC_COL(r << (8 - RBITS) | r >> (2 * RBITS - 8), 711 g << (8 - GBITS) | g >> (2 * GBITS - 8), 712 b << (8 - BBITS) | b >> (2 * BBITS - 8))); 713 } 714 break; 715 case 5: /* 32 bpp */ 716 vidcvideo_write(VIDC_PALREG, 0x00000000); 717 for (i = 0; i < 256; i++) 718 vidcvideo_write(VIDC_PALETTE, VIDC_COL(i, i, i)); 719 break; 720 } 721 } 722 723 int 724 vidcvideo_blank(int video_off) 725 { 726 int ereg; 727 728 ereg = 1<<12; 729 if (vidc_currentmode->timings.flags & VID_NHSYNC) 730 ereg |= 1<<16; 731 if (vidc_currentmode->timings.flags & VID_NVSYNC) 732 ereg |= 1<<18; 733 734 if (!video_off) 735 vidcvideo_write(VIDC_EREG, ereg); 736 else 737 vidcvideo_write(VIDC_EREG, 0); 738 return 0; 739 } 740 741 /* end of vidc20config.c */ 742
Indexes created Thu Sep 25 16:09:42 GMT 2025