vidc20config.c revision 1.26
1 /* $NetBSD: vidc20config.c,v 1.26 2006/08/19 13:34:15 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Reinoud Zandijk 5 * Copyright (c) 1996 Mark Brinicombe 6 * Copyright (c) 1996 Robert Black 7 * Copyright (c) 1994-1995 Melvyn Tang-Richardson 8 * Copyright (c) 1994-1995 RiscBSD kernel team 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the RiscBSD kernel team 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE RISCBSD TEAM ``AS IS'' AND ANY EXPRESS 27 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE 30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * NetBSD kernel project 39 * 40 * vidcvideo.c 41 * 42 * This file is the lower basis of the wscons driver for VIDC based ARM machines. 43 * It features the initialisation and all VIDC writing and keeps in internal state 44 * copy. 45 * Its currenly set up as a library file and not as a device; it could be named 46 * vidcvideo0 eventually. 47 */ 48 49 #include <sys/cdefs.h> 50 51 __KERNEL_RCSID(0, "$NetBSD: vidc20config.c,v 1.26 2006/08/19 13:34:15 bjh21 Exp $"); 52 53 #include <sys/types.h> 54 #include <sys/param.h> 55 #include <arm/iomd/vidc.h> 56 #include <arm/arm32/katelib.h> 57 #include <machine/bootconfig.h> 58 #include <machine/intr.h> 59 60 #include <sys/systm.h> 61 #include <sys/device.h> 62 #include <uvm/uvm_extern.h> 63 64 #include <arm/iomd/iomdreg.h> 65 #include <arm/iomd/iomdvar.h> 66 #include <arm/iomd/vidc20config.h> 67 68 69 /* 70 * A structure containing ALL the information required to restore 71 * the VIDC20 to any given state. ALL vidc transactions should 72 * go through these procedures, which record the vidc's state. 73 * it may be an idea to set the permissions of the vidc base address 74 * so we get a fault, so the fault routine can record the state but 75 * I guess that's not really necessary for the time being, since we 76 * can make the kernel more secure later on. Also, it is possible 77 * to write a routine to allow 'reading' of the vidc registers. 78 */ 79 80 static struct vidc_state vidc_lookup = { 81 { 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 82 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 83 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 84 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 85 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 86 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 87 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 88 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0 89 }, 90 91 VIDC_PALREG, 92 VIDC_BCOL, 93 VIDC_CP1 , 94 VIDC_CP2, 95 VIDC_CP3, 96 VIDC_HCR, 97 VIDC_HSWR, 98 VIDC_HBSR, 99 VIDC_HDSR, 100 VIDC_HDER, 101 VIDC_HBER, 102 VIDC_HCSR, 103 VIDC_HIR, 104 VIDC_VCR, 105 VIDC_VSWR, 106 VIDC_VBSR, 107 VIDC_VDSR, 108 VIDC_VDER, 109 VIDC_VBER, 110 VIDC_VCSR, 111 VIDC_VCER, 112 VIDC_EREG, 113 VIDC_FSYNREG, 114 VIDC_CONREG, 115 VIDC_DCTL 116 }; 117 118 struct vidc_state vidc_current[1]; 119 120 121 /* 122 * XXX global display variables XXX ... should be a structure 123 */ 124 static int cold_init = 0; /* flags initialisation */ 125 extern videomemory_t videomemory; 126 127 static struct vidc_mode vidc_currentmode; 128 129 unsigned int dispstart; 130 unsigned int dispsize; 131 unsigned int dispbase; 132 unsigned int dispend; 133 unsigned int ptov; 134 unsigned int vmem_base; 135 unsigned int phys_base; 136 unsigned int transfersize; 137 138 139 /* cursor stuff */ 140 char *cursor_normal; 141 char *cursor_transparent; 142 int p_cursor_normal; 143 int p_cursor_transparent; 144 int cursor_width; 145 int cursor_height; 146 147 148 /* 149 * VIDC mode definitions 150 * generated from RISC OS mode definition file by an `awk' script 151 */ 152 extern const struct videomode vidc_videomode_list[]; 153 extern const int vidc_videomode_count; 154 155 156 /* 157 * configuration printing 158 * 159 */ 160 161 void 162 vidcvideo_printdetails(void) 163 { 164 printf(": refclk=%dMHz %dKB %s ", (vidc_fref / 1000000), 165 videomemory.vidm_size / 1024, 166 (videomemory.vidm_type == VIDEOMEM_TYPE_VRAM) ? "VRAM" : "DRAM"); 167 } 168 169 170 /* 171 * Common functions to directly access VIDC registers 172 */ 173 int 174 vidcvideo_write(u_int reg, int value) 175 { 176 int counter; 177 178 int *current; 179 int *tab; 180 181 tab = (int *)&vidc_lookup; 182 current = (int *)vidc_current; 183 184 185 /* 186 * OK, the VIDC_PALETTE register is handled differently 187 * to the others on the VIDC, so take that into account here 188 */ 189 if (reg == VIDC_PALREG) { 190 vidc_current->palreg = 0; 191 WriteWord(vidc_base, reg | value); 192 return 0; 193 } 194 195 if (reg == VIDC_PALETTE) { 196 WriteWord(vidc_base, reg | value); 197 vidc_current->palette[vidc_current->palreg] = value; 198 vidc_current->palreg++; 199 vidc_current->palreg = vidc_current->palreg & 0xff; 200 return 0; 201 } 202 203 /* 204 * Undefine SAFER if you wish to speed things up (a little) 205 * although this means the function will assume things abou 206 * the structure of vidc_state. i.e. the first 256 words are 207 * the palette array 208 */ 209 210 #define SAFER 211 212 #ifdef SAFER 213 #define INITVALUE 0 214 #else 215 #define INITVALUE 256 216 #endif 217 218 for (counter = INITVALUE; 219 counter <= sizeof(struct vidc_state); 220 counter++) { 221 if (reg == tab[counter]) { 222 WriteWord ( vidc_base, reg | value ); 223 current[counter] = value; 224 return 0; 225 } 226 } 227 return -1; 228 } 229 230 231 void 232 vidcvideo_setpalette(struct vidc_state *vidc) 233 { 234 int counter = 0; 235 236 vidcvideo_write(VIDC_PALREG, 0x00000000); 237 for (counter = 0; counter <= 255; counter++) 238 vidcvideo_write(VIDC_PALETTE, vidc->palette[counter]); 239 } 240 241 242 void 243 vidcvideo_setstate(struct vidc_state *vidc) 244 { 245 vidcvideo_write ( VIDC_PALREG, vidc->palreg ); 246 vidcvideo_write ( VIDC_BCOL, vidc->bcol ); 247 vidcvideo_write ( VIDC_CP1, vidc->cp1 ); 248 vidcvideo_write ( VIDC_CP2, vidc->cp2 ); 249 vidcvideo_write ( VIDC_CP3, vidc->cp3 ); 250 vidcvideo_write ( VIDC_HCR, vidc->hcr ); 251 vidcvideo_write ( VIDC_HSWR, vidc->hswr ); 252 vidcvideo_write ( VIDC_HBSR, vidc->hbsr ); 253 vidcvideo_write ( VIDC_HDSR, vidc->hdsr ); 254 vidcvideo_write ( VIDC_HDER, vidc->hder ); 255 vidcvideo_write ( VIDC_HBER, vidc->hber ); 256 vidcvideo_write ( VIDC_HCSR, vidc->hcsr ); 257 vidcvideo_write ( VIDC_HIR, vidc->hir ); 258 vidcvideo_write ( VIDC_VCR, vidc->vcr ); 259 vidcvideo_write ( VIDC_VSWR, vidc->vswr ); 260 vidcvideo_write ( VIDC_VBSR, vidc->vbsr ); 261 vidcvideo_write ( VIDC_VDSR, vidc->vdsr ); 262 vidcvideo_write ( VIDC_VDER, vidc->vder ); 263 vidcvideo_write ( VIDC_VBER, vidc->vber ); 264 vidcvideo_write ( VIDC_VCSR, vidc->vcsr ); 265 vidcvideo_write ( VIDC_VCER, vidc->vcer ); 266 /* 267 * Right, dunno what to set these to yet, but let's keep RiscOS's 268 * ones for now, until the time is right to finish this code 269 */ 270 271 /* vidcvideo_write ( VIDC_EREG, vidc->ereg ); */ 272 /* vidcvideo_write ( VIDC_FSYNREG, vidc->fsynreg ); */ 273 /* vidcvideo_write ( VIDC_CONREG, vidc->conreg ); */ 274 /* vidcvideo_write ( VIDC_DCTL, vidc->dctl ); */ 275 276 vidcvideo_setpalette(vidc); 277 } 278 279 280 void 281 vidcvideo_getstate(struct vidc_state *vidc) 282 { 283 284 *vidc = *vidc_current; 285 } 286 287 288 void 289 vidcvideo_getmode(struct vidc_mode *mode) 290 { 291 292 *mode = vidc_currentmode; 293 } 294 295 296 static int 297 vidcvideo_coldinit(void) 298 { 299 struct videomode const *modes; 300 int count; 301 int found; 302 int i; 303 unsigned framerate; 304 305 /* Blank out the cursor */ 306 307 vidcvideo_write(VIDC_CP1, 0x0); 308 vidcvideo_write(VIDC_CP2, 0x0); 309 vidcvideo_write(VIDC_CP3, 0x0); 310 311 dispbase = vmem_base = dispstart = videomemory.vidm_vbase; 312 phys_base = videomemory.vidm_pbase; 313 314 /* Nut - should be using videomemory.vidm_size - mark */ 315 if (videomemory.vidm_type == VIDEOMEM_TYPE_DRAM) { 316 dispsize = videomemory.vidm_size; 317 transfersize = 16; 318 } else { 319 dispsize = bootconfig.vram[0].pages * PAGE_SIZE; 320 transfersize = dispsize >> 10; 321 } 322 323 ptov = dispbase - phys_base; 324 325 dispend = dispstart+dispsize; 326 327 if (vidc_videomode_count > 0) { 328 modes = vidc_videomode_list; 329 count = vidc_videomode_count; 330 } else { 331 modes = videomode_list; 332 count = videomode_count; 333 } 334 335 /* try to find the current mode from the bootloader in my table */ 336 vidc_currentmode.timings = modes[0]; 337 found = 0; 338 for (i = 0; i < count; i++) { 339 /* 340 * We jump through a few hoops here to ensure that we 341 * round roughly to the nearest integer without too 342 * much danger of overflow. 343 */ 344 framerate = (modes[i].dot_clock * 1000 / 345 modes[i].htotal * 2 / modes[i].vtotal + 1) / 2; 346 if (modes[i].hdisplay == bootconfig.width + 1 347 && modes[i].vdisplay == bootconfig.height + 1 348 && framerate == bootconfig.framerate) { 349 vidc_currentmode.timings = modes[i]; 350 found = 1; 351 } 352 } 353 354 /* if not found choose first mode but dont be picky on the framerate */ 355 if (!found) { 356 for (i = 0; i < count; i++) { 357 if (modes[i].hdisplay == bootconfig.width + 1 358 && modes[i].vdisplay == bootconfig.height + 1) { 359 vidc_currentmode.timings = modes[i]; 360 found = 1; 361 } 362 } 363 } 364 365 vidc_currentmode.log2_bpp = bootconfig.log2_bpp; 366 367 dispstart = dispbase; 368 dispend = dispstart+dispsize; 369 370 IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov); 371 IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov); 372 IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov); 373 return 0; 374 } 375 376 377 /* simple function to abstract vidc variables ; returns virt start address of screen */ 378 /* XXX asumption that video memory is mapped in twice */ 379 void *vidcvideo_hwscroll(int bytes) 380 { 381 382 dispstart += bytes; 383 if (dispstart >= dispbase + dispsize) dispstart -= dispsize; 384 if (dispstart < dispbase) dispstart += dispsize; 385 dispend = dispstart+dispsize; 386 387 /* return the start of the bit map of the screen (left top) */ 388 return (void *)dispstart; 389 } 390 391 392 /* reset the HW scroll to be at the start for the benefit of f.e. X */ 393 void *vidcvideo_hwscroll_reset(void) 394 { 395 void *cookie = (void *)dispstart; 396 397 dispstart = dispbase; 398 dispend = dispstart + dispsize; 399 return cookie; 400 } 401 402 403 /* put HW scroll back to where it was */ 404 void *vidcvideo_hwscroll_back(void *cookie) 405 { 406 407 dispstart = (int)cookie; 408 dispend = dispstart + dispsize; 409 return cookie; 410 } 411 412 413 /* this function is to be called perferably at vsync */ 414 void vidcvideo_progr_scroll(void) 415 { 416 417 IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov); 418 IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov); 419 IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov); 420 } 421 422 423 /* 424 * Select a new mode by reprogramming the VIDC chip 425 * XXX this part is known not to work for 32bpp 426 */ 427 428 struct vidc_mode newmode; 429 430 static const int bpp_mask_table[] = { 431 0, /* 1bpp */ 432 1, /* 2bpp */ 433 2, /* 4bpp */ 434 3, /* 8bpp */ 435 4, /* 16bpp */ 436 6 /* 32bpp */ 437 }; 438 439 440 void 441 vidcvideo_setmode(struct vidc_mode *mode) 442 { 443 struct videomode *vm; 444 int bpp_mask; 445 int ereg; 446 int best_r, best_v; 447 int least_error; 448 int r, v, f; 449 450 /* 451 * Find out what bit mask we need to or with the vidc20 452 * control register in order to generate the desired number of 453 * bits per pixel. log_bpp is log base 2 of the number of 454 * bits per pixel. 455 */ 456 457 bpp_mask = bpp_mask_table[mode->log2_bpp]; 458 459 vidc_currentmode = *mode; 460 vm = &vidc_currentmode.timings; 461 462 least_error = INT_MAX; 463 best_r = 0; best_v = 0; 464 465 for (v = 63; v > 0; v--) { 466 for (r = 63; r > 0; r--) { 467 f = ((v * vidc_fref) /1000) / r; 468 if (least_error >= abs(f - vm->dot_clock)) { 469 least_error = abs(f - vm->dot_clock); 470 best_r = r; 471 best_v = v; 472 } 473 } 474 } 475 476 if (best_r > 63) best_r=63; 477 if (best_v > 63) best_v=63; 478 if (best_r < 1) best_r= 1; 479 if (best_v < 1) best_v= 1; 480 481 vidcvideo_write(VIDC_FSYNREG, (best_v-1)<<8 | (best_r-1)<<0); 482 483 /* 484 * The translation from struct videomode to VIDC timings is made 485 * fun by the fact that the VIDC counts from the start of the sync 486 * pulse while struct videomode counts from the start of the display. 487 */ 488 vidcvideo_write(VIDC_HSWR, (vm->hsync_end - vm->hsync_start - 8) & ~1); 489 vidcvideo_write(VIDC_HBSR, (vm->htotal - vm->hsync_start - 12) & ~1); 490 vidcvideo_write(VIDC_HDSR, (vm->htotal - vm->hsync_start - 18) & ~1); 491 vidcvideo_write(VIDC_HDER, 492 (vm->htotal - vm->hsync_start + vm->hdisplay - 18) & ~1); 493 vidcvideo_write(VIDC_HBER, 494 (vm->htotal - vm->hsync_start + vm->hdisplay - 12) & ~1); 495 vidcvideo_write(VIDC_HCR, (vm->htotal - 8) & ~3); 496 497 vidcvideo_write(VIDC_VSWR, vm->vsync_end - vm->vsync_start - 1); 498 vidcvideo_write(VIDC_VBSR, vm->vtotal - vm->vsync_start - 1); 499 vidcvideo_write(VIDC_VDSR, vm->vtotal - vm->vsync_start - 1); 500 vidcvideo_write(VIDC_VDER, 501 vm->vtotal - vm->vsync_start + vm->vdisplay - 1); 502 vidcvideo_write(VIDC_VBER, 503 vm->vtotal - vm->vsync_start + vm->vdisplay - 1); 504 /* XXX VIDC20 data sheet say to subtract 2 */ 505 vidcvideo_write(VIDC_VCR, vm->vtotal - 1); 506 507 IOMD_WRITE_WORD(IOMD_FSIZE, vm->vdisplay - 1); 508 509 if (dispsize <= 1024*1024) 510 vidcvideo_write(VIDC_DCTL, vm->hdisplay>>2 | 1<<16 | 1<<12); 511 else 512 vidcvideo_write(VIDC_DCTL, vm->hdisplay>>2 | 3<<16 | 1<<12); 513 514 ereg = 1<<12; 515 if (vm->flags & VID_NHSYNC) 516 ereg |= 1<<16; 517 if (vm->flags & VID_NVSYNC) 518 ereg |= 1<<18; 519 vidcvideo_write(VIDC_EREG, ereg); 520 if (dispsize > 1024*1024) { 521 if (vm->hdisplay >= 800) 522 vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5); 523 else 524 vidcvideo_write(VIDC_CONREG, 6<<8 | bpp_mask<<5); 525 } else { 526 vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5); 527 } 528 } 529 530 531 #if 0 532 /* not used for now */ 533 void 534 vidcvideo_set_display_base(base) 535 u_int base; 536 { 537 dispstart = dispstart-dispbase + base; 538 dispbase = vmem_base = base; 539 dispend = base + dispsize; 540 ptov = dispbase - phys_base; 541 } 542 #endif 543 544 545 /* 546 * Main initialisation routine for now 547 */ 548 549 static int cursor_init = 0; 550 551 int 552 vidcvideo_init(void) 553 { 554 vidcvideo_coldinit(); 555 if (cold_init && (cursor_init == 0)) 556 /* vidcvideo_flash_go() */; 557 558 /* setting a mode goes wrong in 32 bpp ... 8 and 16 seem OK */ 559 vidcvideo_setmode(&vidc_currentmode); 560 vidcvideo_blank(0); /* display on */ 561 562 vidcvideo_stdpalette(); 563 564 if (cold_init == 0) { 565 vidcvideo_write(VIDC_CP1, 0x0); 566 vidcvideo_write(VIDC_CP2, 0x0); 567 vidcvideo_write(VIDC_CP3, 0x0); 568 } else 569 vidcvideo_cursor_init(CURSOR_MAX_WIDTH, CURSOR_MAX_HEIGHT); 570 571 cold_init = 1; 572 return 0; 573 } 574 575 576 /* reinitialise the vidcvideo */ 577 void 578 vidcvideo_reinit() 579 { 580 581 vidcvideo_coldinit(); 582 vidcvideo_setmode(&vidc_currentmode); 583 } 584 585 586 int 587 vidcvideo_cursor_init(int width, int height) 588 { 589 static char *cursor_data = NULL; 590 int counter; 591 int line; 592 paddr_t pa; 593 594 cursor_width = width; 595 cursor_height = height; 596 597 if (!cursor_data) { 598 /* Allocate cursor memory first time round */ 599 cursor_data = (char *)uvm_km_alloc(kernel_map, PAGE_SIZE, 0, 600 UVM_KMF_WIRED | UVM_KMF_ZERO); 601 if (!cursor_data) 602 panic("Cannot allocate memory for hardware cursor"); 603 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_data, &pa); 604 IOMD_WRITE_WORD(IOMD_CURSINIT, pa); 605 } 606 607 /* Blank the cursor while initialising it's sprite */ 608 609 vidcvideo_write ( VIDC_CP1, 0x0 ); 610 vidcvideo_write ( VIDC_CP2, 0x0 ); 611 vidcvideo_write ( VIDC_CP3, 0x0 ); 612 613 cursor_normal = cursor_data; 614 cursor_transparent = cursor_data + (height * width); 615 616 cursor_transparent += 32; /* ALIGN */ 617 cursor_transparent = (char *)((int)cursor_transparent & (~31) ); 618 619 for ( line = 0; line<height; ++line ) { 620 for ( counter=0; counter<width/4;counter++ ) 621 cursor_normal[line * width + counter]=0x55; /* why 0x55 ? */ 622 for ( ; counter<8; counter++ ) 623 cursor_normal[line * width + counter]=0; 624 } 625 626 for ( line = 0; line<height; ++line ) { 627 for ( counter=0; counter<width/4;counter++ ) 628 cursor_transparent[line * width + counter]=0x00; 629 for ( ; counter<8; counter++ ) 630 cursor_transparent[line * width + counter]=0; 631 } 632 633 634 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_normal, 635 (void *)&p_cursor_normal); 636 (void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_transparent, 637 (void *)&p_cursor_transparent); 638 639 memset(cursor_normal, 0x55, width*height); /* white? */ 640 memset(cursor_transparent, 0x00, width*height);/* to see the diffence */ 641 642 /* Ok, now program the cursor; should be blank */ 643 vidcvideo_enablecursor(0); 644 645 return 0; 646 } 647 648 649 void 650 vidcvideo_updatecursor(int xcur, int ycur) 651 { 652 int frontporch = vidc_currentmode.timings.htotal - 653 vidc_currentmode.timings.hsync_start; 654 int topporch = vidc_currentmode.timings.vtotal - 655 vidc_currentmode.timings.vsync_start; 656 657 vidcvideo_write(VIDC_HCSR, frontporch -17 + xcur); 658 vidcvideo_write(VIDC_VCSR, topporch -2 + (ycur+1)-2 + 3 - 659 cursor_height); 660 vidcvideo_write(VIDC_VCER, topporch -2 + (ycur+3)+2 + 3 ); 661 } 662 663 664 void 665 vidcvideo_enablecursor(int on) 666 { 667 668 if (on) 669 IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_normal); 670 else 671 IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_transparent); 672 vidcvideo_write ( VIDC_CP1, 0xffffff ); /* enable */ 673 } 674 675 676 void 677 vidcvideo_stdpalette() 678 { 679 int i; 680 681 switch (vidc_currentmode.log2_bpp) { 682 case 0: /* 1 bpp */ 683 case 1: /* 2 bpp */ 684 case 2: /* 4 bpp */ 685 case 3: /* 8 bpp */ 686 vidcvideo_write(VIDC_PALREG, 0x00000000); 687 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 0)); 688 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 0)); 689 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 0)); 690 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 0)); 691 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 255)); 692 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 255)); 693 vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 255)); 694 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255)); 695 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 128)); 696 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 128)); 697 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 255, 128)); 698 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 128)); 699 vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 255)); 700 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 255)); 701 vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255)); 702 break; 703 case 4: /* 16 bpp */ 704 /* 705 * The use of the palette in 16-bit modes is quite 706 * fun. Comments in linux/drivers/video/acornfb.c 707 * imply that it goes something like this: 708 * 709 * red = LUT[pixel[7:0]].red 710 * green = LUT[pixel[11:4]].green 711 * blue = LUT[pixel[15:8]].blue 712 * 713 * We use 6:5:5 R:G:B cos that's what Xarm32VIDC wants. 714 */ 715 #define RBITS 6 716 #define GBITS 5 717 #define BBITS 5 718 vidcvideo_write(VIDC_PALREG, 0x00000000); 719 for (i = 0; i < 256; i++) { 720 int r, g, b; 721 722 r = i & ((1 << RBITS) - 1); 723 g = (i >> (RBITS - 4)) & ((1 << GBITS) - 1); 724 b = (i >> (RBITS + GBITS - 8)) & ((1 << BBITS) - 1); 725 vidcvideo_write(VIDC_PALETTE, 726 VIDC_COL(r << (8 - RBITS) | r >> (2 * RBITS - 8), 727 g << (8 - GBITS) | g >> (2 * GBITS - 8), 728 b << (8 - BBITS) | b >> (2 * BBITS - 8))); 729 } 730 break; 731 case 5: /* 32 bpp */ 732 vidcvideo_write(VIDC_PALREG, 0x00000000); 733 for (i = 0; i < 256; i++) 734 vidcvideo_write(VIDC_PALETTE, VIDC_COL(i, i, i)); 735 break; 736 } 737 } 738 739 int 740 vidcvideo_blank(int video_off) 741 { 742 int ereg; 743 744 ereg = 1<<12; 745 if (vidc_currentmode.timings.flags & VID_NHSYNC) 746 ereg |= 1<<16; 747 if (vidc_currentmode.timings.flags & VID_NVSYNC) 748 ereg |= 1<<18; 749 750 if (!video_off) 751 vidcvideo_write(VIDC_EREG, ereg); 752 else 753 vidcvideo_write(VIDC_EREG, 0); 754 return 0; 755 } 756 757 /* end of vidc20config.c */ 758
Indexes created Fri Sep 26 20:09:58 GMT 2025