ixp12x0_com.c revision 1.1 1 1.1 ichiro /* $NetBSD: ixp12x0_com.c,v 1.1 2002/07/15 16:27:17 ichiro Exp $ */
2 1.1 ichiro #define POLLING_COM
3 1.1 ichiro /*
4 1.1 ichiro * Copyright (c) 1998, 1999, 2001, 2002 The NetBSD Foundation, Inc.
5 1.1 ichiro * All rights reserved.
6 1.1 ichiro *
7 1.1 ichiro * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ichiro * by Ichiro FUKUHARA and Naoto Shimazaki.
9 1.1 ichiro *
10 1.1 ichiro * This code is derived from software contributed to The NetBSD Foundation
11 1.1 ichiro * by IWAMOTO Toshihiro.
12 1.1 ichiro *
13 1.1 ichiro * This code is derived from software contributed to The NetBSD Foundation
14 1.1 ichiro * by Charles M. Hannum.
15 1.1 ichiro *
16 1.1 ichiro * Redistribution and use in source and binary forms, with or without
17 1.1 ichiro * modification, are permitted provided that the following conditions
18 1.1 ichiro * are met:
19 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
20 1.1 ichiro * notice, this list of conditions and the following disclaimer.
21 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
23 1.1 ichiro * documentation and/or other materials provided with the distribution.
24 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
25 1.1 ichiro * must display the following acknowledgement:
26 1.1 ichiro * This product includes software developed by the NetBSD
27 1.1 ichiro * Foundation, Inc. and its contributors.
28 1.1 ichiro * 4. Neither the name of The NetBSD Foundation nor the names of its
29 1.1 ichiro * contributors may be used to endorse or promote products derived
30 1.1 ichiro * from this software without specific prior written permission.
31 1.1 ichiro *
32 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
33 1.1 ichiro * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
34 1.1 ichiro * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
35 1.1 ichiro * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
36 1.1 ichiro * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
37 1.1 ichiro * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
38 1.1 ichiro * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
39 1.1 ichiro * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
40 1.1 ichiro * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
41 1.1 ichiro * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 1.1 ichiro * POSSIBILITY OF SUCH DAMAGE.
43 1.1 ichiro */
44 1.1 ichiro
45 1.1 ichiro /*
46 1.1 ichiro * Copyright (c) 1991 The Regents of the University of California.
47 1.1 ichiro * All rights reserved.
48 1.1 ichiro *
49 1.1 ichiro * Redistribution and use in source and binary forms, with or without
50 1.1 ichiro * modification, are permitted provided that the following conditions
51 1.1 ichiro * are met:
52 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
53 1.1 ichiro * notice, this list of conditions and the following disclaimer.
54 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
55 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
56 1.1 ichiro * documentation and/or other materials provided with the distribution.
57 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
58 1.1 ichiro * must display the following acknowledgement:
59 1.1 ichiro * This product includes software developed by the University of
60 1.1 ichiro * California, Berkeley and its contributors.
61 1.1 ichiro * 4. Neither the name of the University nor the names of its contributors
62 1.1 ichiro * may be used to endorse or promote products derived from this software
63 1.1 ichiro * without specific prior written permission.
64 1.1 ichiro *
65 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
66 1.1 ichiro * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67 1.1 ichiro * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
68 1.1 ichiro * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
69 1.1 ichiro * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
70 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
71 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
72 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
73 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
74 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
75 1.1 ichiro * SUCH DAMAGE.
76 1.1 ichiro *
77 1.1 ichiro * @(#)com.c 7.5 (Berkeley) 5/16/91
78 1.1 ichiro */
79 1.1 ichiro
80 1.1 ichiro
81 1.1 ichiro #include "opt_com.h"
82 1.1 ichiro #include "opt_ddb.h"
83 1.1 ichiro #include "opt_kgdb.h"
84 1.1 ichiro
85 1.1 ichiro #include "rnd.h"
86 1.1 ichiro #if NRND > 0 && defined(RND_COM)
87 1.1 ichiro #include <sys/rnd.h>
88 1.1 ichiro #endif
89 1.1 ichiro
90 1.1 ichiro #include <sys/param.h>
91 1.1 ichiro #include <sys/systm.h>
92 1.1 ichiro #include <sys/types.h>
93 1.1 ichiro #include <sys/conf.h>
94 1.1 ichiro #include <sys/file.h>
95 1.1 ichiro #include <sys/device.h>
96 1.1 ichiro #include <sys/kernel.h>
97 1.1 ichiro #include <sys/malloc.h>
98 1.1 ichiro #include <sys/tty.h>
99 1.1 ichiro #include <sys/uio.h>
100 1.1 ichiro #include <sys/vnode.h>
101 1.1 ichiro
102 1.1 ichiro #include <dev/cons.h>
103 1.1 ichiro
104 1.1 ichiro #include <machine/bus.h>
105 1.1 ichiro
106 1.1 ichiro #include <arm/ixp12x0/ixp12x0_comreg.h>
107 1.1 ichiro #include <arm/ixp12x0/ixp12x0_comvar.h>
108 1.1 ichiro #include <arm/ixp12x0/ixp12x0reg.h>
109 1.1 ichiro #include <arm/ixp12x0/ixp12x0var.h>
110 1.1 ichiro
111 1.1 ichiro #include <arm/ixp12x0/ixpsipvar.h>
112 1.1 ichiro
113 1.1 ichiro #include "ixpcom.h"
114 1.1 ichiro
115 1.1 ichiro #ifdef POLLING_COM
116 1.1 ichiro #undef CR_RIE
117 1.1 ichiro #define CR_RIE 0
118 1.1 ichiro #undef CR_XIE
119 1.1 ichiro #define CR_XIE 0
120 1.1 ichiro #endif
121 1.1 ichiro
122 1.1 ichiro #ifdef NOXIE
123 1.1 ichiro #undef CR_XIE
124 1.1 ichiro #define CR_XIE 0
125 1.1 ichiro #endif
126 1.1 ichiro
127 1.1 ichiro
128 1.1 ichiro cdev_decl(ixpcom);
129 1.1 ichiro
130 1.1 ichiro static int ixpcom_match(struct device *, struct cfdata *, void *);
131 1.1 ichiro static void ixpcom_attach(struct device *, struct device *, void *);
132 1.1 ichiro static int ixpcom_detach(struct device *, int);
133 1.1 ichiro static int ixpcom_activate(struct device *, enum devact);
134 1.1 ichiro
135 1.1 ichiro static int ixpcomparam(struct tty *, struct termios *);
136 1.1 ichiro static void ixpcomstart(struct tty *);
137 1.1 ichiro static int ixpcomhwiflow(struct tty *, int);
138 1.1 ichiro
139 1.1 ichiro static void ixpcom_attach_subr(struct ixpcom_softc *);
140 1.1 ichiro
141 1.1 ichiro static u_int cflag2cr(tcflag_t);
142 1.1 ichiro
143 1.1 ichiro int ixpcomcngetc(dev_t);
144 1.1 ichiro void ixpcomcnputc(dev_t, int);
145 1.1 ichiro void ixpcomcnpollc(dev_t, int);
146 1.1 ichiro
147 1.1 ichiro static void ixpcomsoft(void* arg);
148 1.1 ichiro inline static void ixpcom_txsoft(struct ixpcom_softc *, struct tty *);
149 1.1 ichiro inline static void ixpcom_rxsoft(struct ixpcom_softc *, struct tty *);
150 1.1 ichiro
151 1.1 ichiro void ixpcomcnprobe(struct consdev *);
152 1.1 ichiro void ixpcomcninit(struct consdev *);
153 1.1 ichiro
154 1.1 ichiro static int ixpcomintr(void* arg);
155 1.1 ichiro
156 1.1 ichiro u_int32_t ixpcom_cr = 0; /* tell cr to *_intr.c */
157 1.1 ichiro u_int32_t ixpcom_imask = 0; /* intrrupt mask from *_intr.c */
158 1.1 ichiro
159 1.1 ichiro static bus_space_tag_t ixpcomconstag;
160 1.1 ichiro static bus_space_handle_t ixpcomconsioh;
161 1.1 ichiro static bus_addr_t ixpcomconsaddr = IXPCOM_UART_BASE; /* XXX initial value */
162 1.1 ichiro
163 1.1 ichiro static int ixpcomconsattached;
164 1.1 ichiro static int ixpcomconsrate;
165 1.1 ichiro static tcflag_t ixpcomconscflag;
166 1.1 ichiro
167 1.1 ichiro struct cfattach ixpcom_ca = {
168 1.1 ichiro sizeof(struct ixpcom_softc), ixpcom_match, ixpcom_attach,
169 1.1 ichiro ixpcom_detach, ixpcom_activate
170 1.1 ichiro };
171 1.1 ichiro extern struct cfdriver ixpcom_cd;
172 1.1 ichiro
173 1.1 ichiro struct consdev ixpcomcons = {
174 1.1 ichiro NULL, NULL, ixpcomcngetc, ixpcomcnputc, ixpcomcnpollc, NULL,
175 1.1 ichiro NODEV, CN_NORMAL
176 1.1 ichiro };
177 1.1 ichiro
178 1.1 ichiro #ifndef DEFAULT_COMSPEED
179 1.1 ichiro #define DEFAULT_COMSPEED 38400
180 1.1 ichiro #endif
181 1.1 ichiro
182 1.1 ichiro #define COMUNIT_MASK 0x7ffff
183 1.1 ichiro #define COMDIALOUT_MASK 0x80000
184 1.1 ichiro
185 1.1 ichiro #define COMUNIT(x) (minor(x) & COMUNIT_MASK)
186 1.1 ichiro #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK)
187 1.1 ichiro
188 1.1 ichiro #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
189 1.1 ichiro ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE))
190 1.1 ichiro
191 1.1 ichiro #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f))
192 1.1 ichiro
193 1.1 ichiro #define COM_LOCK(sc);
194 1.1 ichiro #define COM_UNLOCK(sc);
195 1.1 ichiro
196 1.1 ichiro #define SET(t, f) (t) |= (f)
197 1.1 ichiro #define CLR(t, f) (t) &= ~(f)
198 1.1 ichiro #define ISSET(t, f) ((t) & (f))
199 1.1 ichiro
200 1.1 ichiro static int
201 1.1 ichiro ixpcom_match(parent, match, aux)
202 1.1 ichiro struct device *parent;
203 1.1 ichiro struct cfdata *match;
204 1.1 ichiro void *aux;
205 1.1 ichiro {
206 1.1 ichiro return (1);
207 1.1 ichiro }
208 1.1 ichiro
209 1.1 ichiro void
210 1.1 ichiro ixpcom_attach(parent, self, aux)
211 1.1 ichiro struct device *parent;
212 1.1 ichiro struct device *self;
213 1.1 ichiro void *aux;
214 1.1 ichiro {
215 1.1 ichiro struct ixpcom_softc *sc = (struct ixpcom_softc *)self;
216 1.1 ichiro struct ixpsip_attach_args *sa = aux;
217 1.1 ichiro
218 1.1 ichiro printf("\n");
219 1.1 ichiro
220 1.1 ichiro sc->sc_iot = sa->sa_iot;
221 1.1 ichiro sc->sc_baseaddr = sa->sa_addr;
222 1.1 ichiro
223 1.1 ichiro if(bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0,
224 1.1 ichiro &sc->sc_ioh)) {
225 1.1 ichiro printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
226 1.1 ichiro return;
227 1.1 ichiro }
228 1.1 ichiro
229 1.1 ichiro printf("%s: IXP12x0 UART\n", sc->sc_dev.dv_xname);
230 1.1 ichiro
231 1.1 ichiro ixpcom_attach_subr(sc);
232 1.1 ichiro
233 1.1 ichiro #ifdef POLLING_COM
234 1.1 ichiro { void* d; d = d = ixpcomintr; }
235 1.1 ichiro #else
236 1.1 ichiro ixp12x0_intr_establish(IXP12X0_INTR_UART, IPL_SERIAL, ixpcomintr, sc);
237 1.1 ichiro #endif
238 1.1 ichiro }
239 1.1 ichiro
240 1.1 ichiro void
241 1.1 ichiro ixpcom_attach_subr(sc)
242 1.1 ichiro struct ixpcom_softc *sc;
243 1.1 ichiro {
244 1.1 ichiro bus_addr_t iobase = sc->sc_baseaddr;
245 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
246 1.1 ichiro struct tty *tp;
247 1.1 ichiro
248 1.1 ichiro if (iot == ixpcomconstag && iobase == ixpcomconsaddr) {
249 1.1 ichiro ixpcomconsattached = 1;
250 1.1 ichiro sc->sc_speed = IXPCOMSPEED(ixpcomconsrate);
251 1.1 ichiro
252 1.1 ichiro /* Make sure the console is always "hardwired". */
253 1.1 ichiro delay(10000); /* wait for output to finish */
254 1.1 ichiro SET(sc->sc_hwflags, COM_HW_CONSOLE);
255 1.1 ichiro SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
256 1.1 ichiro }
257 1.1 ichiro
258 1.1 ichiro tp = ttymalloc();
259 1.1 ichiro tp->t_oproc = ixpcomstart;
260 1.1 ichiro tp->t_param = ixpcomparam;
261 1.1 ichiro tp->t_hwiflow = ixpcomhwiflow;
262 1.1 ichiro
263 1.1 ichiro sc->sc_tty = tp;
264 1.1 ichiro sc->sc_rbuf = malloc(IXPCOM_RING_SIZE << 1, M_DEVBUF, M_NOWAIT);
265 1.1 ichiro sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
266 1.1 ichiro sc->sc_rbavail = IXPCOM_RING_SIZE;
267 1.1 ichiro if (sc->sc_rbuf == NULL) {
268 1.1 ichiro printf("%s: unable to allocate ring buffer\n",
269 1.1 ichiro sc->sc_dev.dv_xname);
270 1.1 ichiro return;
271 1.1 ichiro }
272 1.1 ichiro sc->sc_ebuf = sc->sc_rbuf + (IXPCOM_RING_SIZE << 1);
273 1.1 ichiro sc->sc_tbc = 0;
274 1.1 ichiro
275 1.1 ichiro sc->sc_rie = sc->sc_xie = 0;
276 1.1 ichiro ixpcom_cr = IXPCOMSPEED2BRD(DEFAULT_COMSPEED)
277 1.1 ichiro | CR_UE | sc->sc_rie | sc->sc_xie | DSS_8BIT;
278 1.1 ichiro
279 1.1 ichiro tty_attach(tp);
280 1.1 ichiro
281 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
282 1.1 ichiro int maj;
283 1.1 ichiro
284 1.1 ichiro /* locate the major number */
285 1.1 ichiro for (maj = 0; maj < nchrdev; maj++)
286 1.1 ichiro if (cdevsw[maj].d_open == ixpcomopen)
287 1.1 ichiro break;
288 1.1 ichiro
289 1.1 ichiro cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
290 1.1 ichiro
291 1.1 ichiro delay(10000); /* XXX */
292 1.1 ichiro printf("%s: console\n", sc->sc_dev.dv_xname);
293 1.1 ichiro delay(10000); /* XXX */
294 1.1 ichiro }
295 1.1 ichiro
296 1.1 ichiro sc->sc_si = softintr_establish(IPL_SOFTSERIAL, ixpcomsoft, sc);
297 1.1 ichiro
298 1.1 ichiro #if NRND > 0 && defined(RND_COM)
299 1.1 ichiro rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
300 1.1 ichiro RND_TYPE_TTY, 0);
301 1.1 ichiro #endif
302 1.1 ichiro
303 1.1 ichiro /* if there are no enable/disable functions, assume the device
304 1.1 ichiro is always enabled */
305 1.1 ichiro if (!sc->enable)
306 1.1 ichiro sc->enabled = 1;
307 1.1 ichiro
308 1.1 ichiro /* XXX configure register */
309 1.1 ichiro /* xxx_config(sc) */
310 1.1 ichiro
311 1.1 ichiro SET(sc->sc_hwflags, COM_HW_DEV_OK);
312 1.1 ichiro }
313 1.1 ichiro
314 1.1 ichiro int
315 1.1 ichiro ixpcom_detach(self, flags)
316 1.1 ichiro struct device *self;
317 1.1 ichiro int flags;
318 1.1 ichiro {
319 1.1 ichiro struct ixpcom_softc *sc = (struct ixpcom_softc *)self;
320 1.1 ichiro int maj, mn;
321 1.1 ichiro
322 1.1 ichiro /* locate the major number */
323 1.1 ichiro for (maj = 0; maj < nchrdev; maj++)
324 1.1 ichiro if (cdevsw[maj].d_open == ixpcomopen)
325 1.1 ichiro break;
326 1.1 ichiro
327 1.1 ichiro /* Nuke the vnodes for any open instances. */
328 1.1 ichiro mn = self->dv_unit;
329 1.1 ichiro vdevgone(maj, mn, mn, VCHR);
330 1.1 ichiro
331 1.1 ichiro mn |= COMDIALOUT_MASK;
332 1.1 ichiro vdevgone(maj, mn, mn, VCHR);
333 1.1 ichiro
334 1.1 ichiro /* Free the receive buffer. */
335 1.1 ichiro free(sc->sc_rbuf, M_DEVBUF);
336 1.1 ichiro
337 1.1 ichiro /* Detach and free the tty. */
338 1.1 ichiro tty_detach(sc->sc_tty);
339 1.1 ichiro ttyfree(sc->sc_tty);
340 1.1 ichiro
341 1.1 ichiro #if NRND > 0 && defined(RND_COM)
342 1.1 ichiro /* Unhook the entropy source. */
343 1.1 ichiro rnd_detach_source(&sc->rnd_source);
344 1.1 ichiro #endif
345 1.1 ichiro
346 1.1 ichiro return (0);
347 1.1 ichiro }
348 1.1 ichiro
349 1.1 ichiro int
350 1.1 ichiro ixpcom_activate(self, act)
351 1.1 ichiro struct device *self;
352 1.1 ichiro enum devact act;
353 1.1 ichiro {
354 1.1 ichiro struct ixpcom_softc *sc = (struct ixpcom_softc *)self;
355 1.1 ichiro int s, rv = 0;
356 1.1 ichiro
357 1.1 ichiro s = splserial();
358 1.1 ichiro COM_LOCK(sc);
359 1.1 ichiro switch (act) {
360 1.1 ichiro case DVACT_ACTIVATE:
361 1.1 ichiro rv = EOPNOTSUPP;
362 1.1 ichiro break;
363 1.1 ichiro case DVACT_DEACTIVATE:
364 1.1 ichiro if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB))
365 1.1 ichiro rv = EBUSY;
366 1.1 ichiro break;
367 1.1 ichiro }
368 1.1 ichiro
369 1.1 ichiro COM_UNLOCK(sc);
370 1.1 ichiro splx(s);
371 1.1 ichiro return (rv);
372 1.1 ichiro }
373 1.1 ichiro
374 1.1 ichiro int
375 1.1 ichiro ixpcomparam(tp, t)
376 1.1 ichiro struct tty *tp;
377 1.1 ichiro struct termios *t;
378 1.1 ichiro {
379 1.1 ichiro return (0);
380 1.1 ichiro }
381 1.1 ichiro
382 1.1 ichiro int
383 1.1 ichiro ixpcomhwiflow(tp, block)
384 1.1 ichiro struct tty *tp;
385 1.1 ichiro int block;
386 1.1 ichiro {
387 1.1 ichiro return (0);
388 1.1 ichiro }
389 1.1 ichiro
390 1.1 ichiro void
391 1.1 ichiro ixpcomstart(tp)
392 1.1 ichiro struct tty *tp;
393 1.1 ichiro {
394 1.1 ichiro return;
395 1.1 ichiro }
396 1.1 ichiro
397 1.1 ichiro int
398 1.1 ichiro ixpcomopen(dev, flag, mode, p)
399 1.1 ichiro dev_t dev;
400 1.1 ichiro int flag, mode;
401 1.1 ichiro struct proc *p;
402 1.1 ichiro {
403 1.1 ichiro return (0);
404 1.1 ichiro }
405 1.1 ichiro static u_int
406 1.1 ichiro cflag2cr(cflag)
407 1.1 ichiro tcflag_t cflag;
408 1.1 ichiro {
409 1.1 ichiro u_int cr;
410 1.1 ichiro
411 1.1 ichiro cr = (cflag & PARENB) ? CR_PE : 0;
412 1.1 ichiro cr |= (cflag & PARODD) ? CR_OES : 0;
413 1.1 ichiro cr |= (cflag & CSTOPB) ? CR_SBS : 0;
414 1.1 ichiro cr |= ((cflag & CSIZE) == CS8) ? DSS_8BIT : 0;
415 1.1 ichiro
416 1.1 ichiro return (cr);
417 1.1 ichiro }
418 1.1 ichiro
419 1.1 ichiro static void
420 1.1 ichiro ixpcom_loadchannelregs(sc)
421 1.1 ichiro struct ixpcom_softc *sc;
422 1.1 ichiro {
423 1.1 ichiro /* XXX */
424 1.1 ichiro ixpcom_cr &= ~(CR_RIE | CR_XIE);
425 1.1 ichiro ixpcom_cr |= sc->sc_rie | sc->sc_xie;
426 1.1 ichiro ixpcom_cr &= ixpcom_imask;
427 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXPCOM_CR, ixpcom_cr);
428 1.1 ichiro }
429 1.1 ichiro
430 1.1 ichiro /* Initialization for serial console */
431 1.1 ichiro int
432 1.1 ichiro ixpcominit(iot, iobase, baud, cflag, iohp)
433 1.1 ichiro bus_space_tag_t iot;
434 1.1 ichiro bus_addr_t iobase;
435 1.1 ichiro int baud;
436 1.1 ichiro tcflag_t cflag;
437 1.1 ichiro bus_space_handle_t *iohp;
438 1.1 ichiro {
439 1.1 ichiro int cr;
440 1.1 ichiro
441 1.1 ichiro if (bus_space_map(iot, iobase, IXPCOM_UART_SIZE, 0, iohp))
442 1.1 ichiro printf("register map failed\n");
443 1.1 ichiro
444 1.1 ichiro cr = cflag2cr(cflag);
445 1.1 ichiro cr |= (IXPCOMSPEED(baud) << 16);
446 1.1 ichiro #if 0
447 1.1 ichiro cr |= (CR_UE | CR_RIE | CR_XIE);
448 1.1 ichiro #endif
449 1.1 ichiro cr |= CR_UE;
450 1.1 ichiro ixpcom_cr = cr;
451 1.1 ichiro
452 1.1 ichiro /* enable the UART */
453 1.1 ichiro bus_space_write_4(iot, *iohp, IXPCOM_CR, cr);
454 1.1 ichiro
455 1.1 ichiro return (0);
456 1.1 ichiro }
457 1.1 ichiro
458 1.1 ichiro int
459 1.1 ichiro ixpcomcnattach(iot, iobase, rate, cflag)
460 1.1 ichiro bus_space_tag_t iot;
461 1.1 ichiro bus_addr_t iobase;
462 1.1 ichiro int rate;
463 1.1 ichiro tcflag_t cflag;
464 1.1 ichiro {
465 1.1 ichiro int res;
466 1.1 ichiro
467 1.1 ichiro if ((res = ixpcominit(iot, iobase, rate, cflag, &ixpcomconsioh)))
468 1.1 ichiro return (res);
469 1.1 ichiro cn_tab = &ixpcomcons;
470 1.1 ichiro
471 1.1 ichiro ixpcomconstag = iot;
472 1.1 ichiro ixpcomconsaddr = iobase;
473 1.1 ichiro ixpcomconsrate = rate;
474 1.1 ichiro ixpcomconscflag = cflag;
475 1.1 ichiro
476 1.1 ichiro return (0);
477 1.1 ichiro }
478 1.1 ichiro
479 1.1 ichiro #if 0
480 1.1 ichiro void
481 1.1 ichiro ixpcomcninit(cp)
482 1.1 ichiro struct consdev *cp;
483 1.1 ichiro {
484 1.1 ichiro if (cp == NULL) {
485 1.1 ichiro /* XXX cp == NULL means that MMU is disabled. */
486 1.1 ichiro ixpcomconsioh = IXPCOM_UART_BASE;
487 1.1 ichiro ixpcomconstag = &ixpcom_bs_tag;
488 1.1 ichiro cn_tab = &ixpcomcons;
489 1.1 ichiro
490 1.1 ichiro IXPREG(IXPCOM_UART_BASE + IXPCOM_CR)
491 1.1 ichiro = (IXPCOMSPEED(38400) << 16)
492 1.1 ichiro | DSS_8BIT
493 1.1 ichiro | (CR_UE | CR_RIE | CR_XIE);
494 1.1 ichiro return;
495 1.1 ichiro }
496 1.1 ichiro
497 1.1 ichiro if (ixpcominit(&ixpcom_bs_tag, CONADDR, CONSPEED,
498 1.1 ichiro CONMODE, &ixpcomconsioh))
499 1.1 ichiro panic("can't init serial console @%x", CONADDR);
500 1.1 ichiro cn_tab = &ixpcomcons;
501 1.1 ichiro ixpcomconstag = &ixpcom_bs_tag;
502 1.1 ichiro }
503 1.1 ichiro #endif
504 1.1 ichiro
505 1.1 ichiro void
506 1.1 ichiro ixpcomcnprobe(cp)
507 1.1 ichiro struct consdev *cp;
508 1.1 ichiro {
509 1.1 ichiro cp->cn_pri = CN_REMOTE;
510 1.1 ichiro }
511 1.1 ichiro
512 1.1 ichiro void
513 1.1 ichiro ixpcomcnpollc(dev, on)
514 1.1 ichiro dev_t dev;
515 1.1 ichiro int on;
516 1.1 ichiro {
517 1.1 ichiro }
518 1.1 ichiro
519 1.1 ichiro void
520 1.1 ichiro ixpcomcnputc(dev, c)
521 1.1 ichiro dev_t dev;
522 1.1 ichiro int c;
523 1.1 ichiro {
524 1.1 ichiro int s;
525 1.1 ichiro
526 1.1 ichiro s = spltty(); /* XXX do we need this? */
527 1.1 ichiro
528 1.1 ichiro while(!(bus_space_read_4(ixpcomconstag, ixpcomconsioh, IXPCOM_SR)
529 1.1 ichiro & SR_TXR))
530 1.1 ichiro ;
531 1.1 ichiro
532 1.1 ichiro bus_space_write_4(ixpcomconstag, ixpcomconsioh, IXPCOM_DR, c);
533 1.1 ichiro splx(s);
534 1.1 ichiro }
535 1.1 ichiro
536 1.1 ichiro int
537 1.1 ichiro ixpcomcngetc(dev)
538 1.1 ichiro dev_t dev;
539 1.1 ichiro {
540 1.1 ichiro int c, s;
541 1.1 ichiro
542 1.1 ichiro s = spltty(); /* XXX do we need this? */
543 1.1 ichiro
544 1.1 ichiro while(!(bus_space_read_4(ixpcomconstag, ixpcomconsioh, IXPCOM_SR)
545 1.1 ichiro & SR_RXR))
546 1.1 ichiro ;
547 1.1 ichiro
548 1.1 ichiro c = bus_space_read_4(ixpcomconstag, ixpcomconsioh, IXPCOM_DR);
549 1.1 ichiro c &= 0xff;
550 1.1 ichiro splx(s);
551 1.1 ichiro
552 1.1 ichiro return (c);
553 1.1 ichiro }
554 1.1 ichiro
555 1.1 ichiro inline static void
556 1.1 ichiro ixpcom_txsoft(sc, tp)
557 1.1 ichiro struct ixpcom_softc *sc;
558 1.1 ichiro struct tty *tp;
559 1.1 ichiro {
560 1.1 ichiro }
561 1.1 ichiro
562 1.1 ichiro inline static void
563 1.1 ichiro ixpcom_rxsoft(sc, tp)
564 1.1 ichiro struct ixpcom_softc *sc;
565 1.1 ichiro struct tty *tp;
566 1.1 ichiro {
567 1.1 ichiro int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint;
568 1.1 ichiro u_char *get, *end;
569 1.1 ichiro u_int cc, scc;
570 1.1 ichiro u_char lsr;
571 1.1 ichiro int code;
572 1.1 ichiro int s;
573 1.1 ichiro
574 1.1 ichiro end = sc->sc_ebuf;
575 1.1 ichiro get = sc->sc_rbget;
576 1.1 ichiro scc = cc = IXPCOM_RING_SIZE - sc->sc_rbavail;
577 1.1 ichiro #if 0
578 1.1 ichiro if (cc == IXPCOM_RING_SIZE) {
579 1.1 ichiro sc->sc_floods++;
580 1.1 ichiro if (sc->sc_errors++ == 0)
581 1.1 ichiro callout_reset(&sc->sc_diag_callout, 60 * hz,
582 1.1 ichiro comdiag, sc);
583 1.1 ichiro }
584 1.1 ichiro #endif
585 1.1 ichiro while (cc) {
586 1.1 ichiro code = get[0];
587 1.1 ichiro lsr = get[1];
588 1.1 ichiro if (ISSET(lsr, DR_ROR | DR_FRE | DR_PRE)) {
589 1.1 ichiro #if 0
590 1.1 ichiro if (ISSET(lsr, DR_ROR)) {
591 1.1 ichiro sc->sc_overflows++;
592 1.1 ichiro if (sc->sc_errors++ == 0)
593 1.1 ichiro callout_reset(&sc->sc_diag_callout,
594 1.1 ichiro 60 * hz, comdiag, sc);
595 1.1 ichiro }
596 1.1 ichiro #endif
597 1.1 ichiro if (ISSET(lsr, DR_FRE))
598 1.1 ichiro SET(code, TTY_FE);
599 1.1 ichiro if (ISSET(lsr, DR_PRE))
600 1.1 ichiro SET(code, TTY_PE);
601 1.1 ichiro }
602 1.1 ichiro if ((*rint)(code, tp) == -1) {
603 1.1 ichiro /*
604 1.1 ichiro * The line discipline's buffer is out of space.
605 1.1 ichiro */
606 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
607 1.1 ichiro /*
608 1.1 ichiro * We're either not using flow control, or the
609 1.1 ichiro * line discipline didn't tell us to block for
610 1.1 ichiro * some reason. Either way, we have no way to
611 1.1 ichiro * know when there's more space available, so
612 1.1 ichiro * just drop the rest of the data.
613 1.1 ichiro */
614 1.1 ichiro get += cc << 1;
615 1.1 ichiro if (get >= end)
616 1.1 ichiro get -= IXPCOM_RING_SIZE << 1;
617 1.1 ichiro cc = 0;
618 1.1 ichiro } else {
619 1.1 ichiro /*
620 1.1 ichiro * Don't schedule any more receive processing
621 1.1 ichiro * until the line discipline tells us there's
622 1.1 ichiro * space available (through comhwiflow()).
623 1.1 ichiro * Leave the rest of the data in the input
624 1.1 ichiro * buffer.
625 1.1 ichiro */
626 1.1 ichiro SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
627 1.1 ichiro }
628 1.1 ichiro break;
629 1.1 ichiro }
630 1.1 ichiro get += 2;
631 1.1 ichiro if (get >= end)
632 1.1 ichiro get = sc->sc_rbuf;
633 1.1 ichiro cc--;
634 1.1 ichiro }
635 1.1 ichiro
636 1.1 ichiro if (cc != scc) {
637 1.1 ichiro sc->sc_rbget = get;
638 1.1 ichiro s = splserial();
639 1.1 ichiro COM_LOCK(sc);
640 1.1 ichiro
641 1.1 ichiro cc = sc->sc_rbavail += scc - cc;
642 1.1 ichiro /* Buffers should be ok again, release possible block. */
643 1.1 ichiro if (cc >= 1) {
644 1.1 ichiro if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
645 1.1 ichiro CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
646 1.1 ichiro SET(sc->sc_rie, CR_RIE);
647 1.1 ichiro ixpcom_loadchannelregs(sc);
648 1.1 ichiro }
649 1.1 ichiro if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
650 1.1 ichiro CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
651 1.1 ichiro #if 0
652 1.1 ichiro com_hwiflow(sc);
653 1.1 ichiro #endif
654 1.1 ichiro }
655 1.1 ichiro }
656 1.1 ichiro COM_UNLOCK(sc);
657 1.1 ichiro splx(s);
658 1.1 ichiro }
659 1.1 ichiro }
660 1.1 ichiro
661 1.1 ichiro static void
662 1.1 ichiro ixpcomsoft(void* arg)
663 1.1 ichiro {
664 1.1 ichiro struct ixpcom_softc *sc = arg;
665 1.1 ichiro
666 1.1 ichiro if (COM_ISALIVE(sc) == 0)
667 1.1 ichiro return;
668 1.1 ichiro
669 1.1 ichiro if (sc->sc_rx_ready) {
670 1.1 ichiro sc->sc_rx_ready = 0;
671 1.1 ichiro ixpcom_rxsoft(sc, sc->sc_tty);
672 1.1 ichiro }
673 1.1 ichiro if (sc->sc_tx_done) {
674 1.1 ichiro sc->sc_tx_done = 0;
675 1.1 ichiro ixpcom_txsoft(sc, sc->sc_tty);
676 1.1 ichiro }
677 1.1 ichiro }
678 1.1 ichiro
679 1.1 ichiro static int
680 1.1 ichiro ixpcomintr(void* arg)
681 1.1 ichiro {
682 1.1 ichiro struct ixpcom_softc *sc = arg;
683 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
684 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
685 1.1 ichiro u_char *put, *end;
686 1.1 ichiro u_int cc;
687 1.1 ichiro u_int cr;
688 1.1 ichiro u_int sr;
689 1.1 ichiro u_int32_t c;
690 1.1 ichiro
691 1.1 ichiro if (COM_ISALIVE(sc) == 0)
692 1.1 ichiro return (0);
693 1.1 ichiro
694 1.1 ichiro COM_LOCK(sc);
695 1.1 ichiro cr = bus_space_read_4(iot, ioh, IXPCOM_CR) & CR_UE;
696 1.1 ichiro
697 1.1 ichiro if (!cr) {
698 1.1 ichiro COM_UNLOCK(sc);
699 1.1 ichiro return (0);
700 1.1 ichiro }
701 1.1 ichiro
702 1.1 ichiro sr = bus_space_read_4(iot, ioh, IXPCOM_SR);
703 1.1 ichiro if (!ISSET(sr, SR_TXR | SR_RXR))
704 1.1 ichiro return (0);
705 1.1 ichiro
706 1.1 ichiro #if 0
707 1.1 ichiro /*
708 1.1 ichiro * IPX12x0 doesn't have a "Receiver End of Break Status" bit
709 1.1 ichiro * in status registar. Currentry I have no idea to determine
710 1.1 ichiro * whether break signal is received.
711 1.1 ichiro */
712 1.1 ichiro if (XXX) {
713 1.1 ichiro bus_space_write_4(iot, ioh, SACOM_SR0, SR0_REB);
714 1.1 ichiro #if defined(DDB) || defined(KGDB)
715 1.1 ichiro #ifndef DDB_BREAK_CHAR
716 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
717 1.1 ichiro console_debugger();
718 1.1 ichiro }
719 1.1 ichiro #endif
720 1.1 ichiro #endif /* DDB || KGDB */
721 1.1 ichiro }
722 1.1 ichiro #endif
723 1.1 ichiro
724 1.1 ichiro end = sc->sc_ebuf;
725 1.1 ichiro put = sc->sc_rbput;
726 1.1 ichiro cc = sc->sc_rbavail;
727 1.1 ichiro
728 1.1 ichiro if (ISSET(sr, SR_RXR)) {
729 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
730 1.1 ichiro while (cc > 0) {
731 1.1 ichiro if (!ISSET(sr, SR_RXR))
732 1.1 ichiro break;
733 1.1 ichiro c = bus_space_read_4(iot, ioh, IXPCOM_DR);
734 1.1 ichiro put[0] = c & 0xff;
735 1.1 ichiro put[1] = (c >> 8) & 0xff;
736 1.1 ichiro #if defined(DDB) && defined(DDB_BREAK_CHAR)
737 1.1 ichiro if (put[0] == DDB_BREAK_CHAR &&
738 1.1 ichiro ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
739 1.1 ichiro console_debugger();
740 1.1 ichiro
741 1.1 ichiro sr = bus_space_read_4(iot, ioh,
742 1.1 ichiro IXPCOM_SR);
743 1.1 ichiro continue;
744 1.1 ichiro }
745 1.1 ichiro #endif
746 1.1 ichiro put += 2;
747 1.1 ichiro if (put >= end)
748 1.1 ichiro put = sc->sc_rbuf;
749 1.1 ichiro cc--;
750 1.1 ichiro
751 1.1 ichiro sr = bus_space_read_4(iot, ioh, IXPCOM_SR);
752 1.1 ichiro }
753 1.1 ichiro
754 1.1 ichiro /*
755 1.1 ichiro * Current string of incoming characters ended because
756 1.1 ichiro * no more data was available or we ran out of space.
757 1.1 ichiro * Schedule a receive event if any data was received.
758 1.1 ichiro * If we're out of space, turn off receive interrupts.
759 1.1 ichiro */
760 1.1 ichiro sc->sc_rbput = put;
761 1.1 ichiro sc->sc_rbavail = cc;
762 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
763 1.1 ichiro sc->sc_rx_ready = 1;
764 1.1 ichiro
765 1.1 ichiro /* XXX do RX hardware flow control */
766 1.1 ichiro
767 1.1 ichiro /*
768 1.1 ichiro * If we're out of space, disable receive interrupts
769 1.1 ichiro * until the queue has drained a bit.
770 1.1 ichiro */
771 1.1 ichiro if (!cc) {
772 1.1 ichiro SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
773 1.1 ichiro CLR(sc->sc_rie, CR_RIE);
774 1.1 ichiro ixpcom_loadchannelregs(sc);
775 1.1 ichiro }
776 1.1 ichiro } else {
777 1.1 ichiro #ifdef DIAGNOSTIC
778 1.1 ichiro panic("ixpcomintr: we shouldn't reach here\n");
779 1.1 ichiro #endif
780 1.1 ichiro CLR(sc->sc_rie, CR_RIE);
781 1.1 ichiro ixpcom_loadchannelregs(sc);
782 1.1 ichiro }
783 1.1 ichiro }
784 1.1 ichiro
785 1.1 ichiro /*
786 1.1 ichiro * Done handling any receive interrupts. See if data can be
787 1.1 ichiro * transmitted as well. Schedule tx done event if no data left
788 1.1 ichiro * and tty was marked busy.
789 1.1 ichiro */
790 1.1 ichiro #if 0
791 1.1 ichiro sr = bus_space_read_4(iot, ioh, IXPCOM_SR);
792 1.1 ichiro if (ISSET(sr, SR_TXR)) {
793 1.1 ichiro /*
794 1.1 ichiro * If we've delayed a parameter change, do it now, and restart
795 1.1 ichiro * output.
796 1.1 ichiro * XXX sacom_loadchanelregs() waits TX completion,
797 1.1 ichiro * XXX resulting in ~0.1s hang (300bps, 4 bytes) in worst case
798 1.1 ichiro */
799 1.1 ichiro if (sc->sc_heldchange) {
800 1.1 ichiro ixpcom_loadparams(sc);
801 1.1 ichiro sc->sc_heldchange = 0;
802 1.1 ichiro sc->sc_tbc = sc->sc_heldtbc;
803 1.1 ichiro sc->sc_heldtbc = 0;
804 1.1 ichiro }
805 1.1 ichiro
806 1.1 ichiro /* Output the next chunk of the contiguous buffer, if any. */
807 1.1 ichiro if (sc->sc_tbc > 0) {
808 1.1 ichiro sacom_filltx(sc);
809 1.1 ichiro } else {
810 1.1 ichiro /* Disable transmit completion interrupts if necessary. */
811 1.1 ichiro if (ISSET(sc->sc_cr3, CR3_XIE)) {
812 1.1 ichiro CLR(sc->sc_cr3, CR3_XIE);
813 1.1 ichiro bus_space_write_4(iot, ioh, SACOM_CR3,
814 1.1 ichiro sc->sc_cr3);
815 1.1 ichiro }
816 1.1 ichiro if (sc->sc_tx_busy) {
817 1.1 ichiro sc->sc_tx_busy = 0;
818 1.1 ichiro sc->sc_tx_done = 1;
819 1.1 ichiro }
820 1.1 ichiro }
821 1.1 ichiro }
822 1.1 ichiro #endif
823 1.1 ichiro COM_UNLOCK(sc);
824 1.1 ichiro
825 1.1 ichiro /* Wake up the poller. */
826 1.1 ichiro #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
827 1.1 ichiro softintr_schedule(sc->sc_si);
828 1.1 ichiro #else
829 1.1 ichiro setsoftserial();
830 1.1 ichiro #endif
831 1.1 ichiro
832 1.1 ichiro #if NRND > 0 && defined(RND_COM)
833 1.1 ichiro rnd_add_uint32(&sc->rnd_source, iir | lsr);
834 1.1 ichiro #endif
835 1.1 ichiro return (1);
836 1.1 ichiro }
837