ixp12x0_io.c revision 1.15 1 1.15 dyoung /* $NetBSD: ixp12x0_io.c,v 1.15 2011/07/01 20:27:50 dyoung Exp $ */
2 1.1 ichiro
3 1.1 ichiro /*
4 1.6 ichiro * Copyright (c) 2002, 2003
5 1.1 ichiro * Ichiro FUKUHARA <ichiro (at) ichiro.org>.
6 1.1 ichiro * All rights reserved.
7 1.1 ichiro *
8 1.1 ichiro * Redistribution and use in source and binary forms, with or without
9 1.1 ichiro * modification, are permitted provided that the following conditions
10 1.1 ichiro * are met:
11 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
12 1.1 ichiro * notice, this list of conditions and the following disclaimer.
13 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
15 1.1 ichiro * documentation and/or other materials provided with the distribution.
16 1.1 ichiro *
17 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
18 1.1 ichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 ichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 ichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
21 1.1 ichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 1.1 ichiro * SUCH DAMAGE.
28 1.1 ichiro */
29 1.7 igy
30 1.7 igy #include <sys/cdefs.h>
31 1.15 dyoung __KERNEL_RCSID(0, "$NetBSD: ixp12x0_io.c,v 1.15 2011/07/01 20:27:50 dyoung Exp $");
32 1.1 ichiro
33 1.1 ichiro /*
34 1.1 ichiro * bus_space I/O functions for ixp12x0
35 1.1 ichiro */
36 1.1 ichiro
37 1.1 ichiro #include <sys/param.h>
38 1.1 ichiro #include <sys/systm.h>
39 1.1 ichiro #include <sys/queue.h>
40 1.1 ichiro
41 1.1 ichiro #include <uvm/uvm.h>
42 1.1 ichiro
43 1.15 dyoung #include <sys/bus.h>
44 1.1 ichiro
45 1.1 ichiro #include <arm/ixp12x0/ixp12x0reg.h>
46 1.1 ichiro #include <arm/ixp12x0/ixp12x0var.h>
47 1.1 ichiro
48 1.1 ichiro /* Proto types for all the bus_space structure functions */
49 1.1 ichiro bs_protos(ixp12x0);
50 1.1 ichiro bs_protos(generic);
51 1.1 ichiro bs_protos(generic_armv4);
52 1.1 ichiro bs_protos(bs_notimpl);
53 1.1 ichiro
54 1.1 ichiro struct bus_space ixp12x0_bs_tag = {
55 1.1 ichiro /* cookie */
56 1.1 ichiro (void *) 0,
57 1.1 ichiro
58 1.1 ichiro /* mapping/unmapping */
59 1.8 igy ixp12x0_bs_map,
60 1.8 igy ixp12x0_bs_unmap,
61 1.1 ichiro ixp12x0_bs_subregion,
62 1.1 ichiro
63 1.1 ichiro /* allocation/deallocation */
64 1.8 igy ixp12x0_bs_alloc,
65 1.8 igy ixp12x0_bs_free,
66 1.1 ichiro
67 1.1 ichiro /* get kernel virtual address */
68 1.1 ichiro ixp12x0_bs_vaddr,
69 1.1 ichiro
70 1.1 ichiro /* mmap bus space for userland */
71 1.8 igy bs_notimpl_bs_mmap,
72 1.1 ichiro
73 1.1 ichiro /* barrier */
74 1.1 ichiro ixp12x0_bs_barrier,
75 1.1 ichiro
76 1.1 ichiro /* read (single) */
77 1.1 ichiro generic_bs_r_1,
78 1.1 ichiro generic_armv4_bs_r_2,
79 1.1 ichiro generic_bs_r_4,
80 1.1 ichiro bs_notimpl_bs_r_8,
81 1.1 ichiro
82 1.1 ichiro /* read multiple */
83 1.1 ichiro generic_bs_rm_1,
84 1.1 ichiro generic_armv4_bs_rm_2,
85 1.1 ichiro generic_bs_rm_4,
86 1.1 ichiro bs_notimpl_bs_rm_8,
87 1.1 ichiro
88 1.1 ichiro /* read region */
89 1.8 igy generic_bs_rr_1,
90 1.1 ichiro generic_armv4_bs_rr_2,
91 1.1 ichiro generic_bs_rr_4,
92 1.1 ichiro bs_notimpl_bs_rr_8,
93 1.1 ichiro
94 1.1 ichiro /* write (single) */
95 1.1 ichiro generic_bs_w_1,
96 1.1 ichiro generic_armv4_bs_w_2,
97 1.1 ichiro generic_bs_w_4,
98 1.1 ichiro bs_notimpl_bs_w_8,
99 1.1 ichiro
100 1.1 ichiro /* write multiple */
101 1.1 ichiro generic_bs_wm_1,
102 1.1 ichiro generic_armv4_bs_wm_2,
103 1.1 ichiro generic_bs_wm_4,
104 1.1 ichiro bs_notimpl_bs_wm_8,
105 1.1 ichiro
106 1.1 ichiro /* write region */
107 1.8 igy generic_bs_wr_1,
108 1.1 ichiro generic_armv4_bs_wr_2,
109 1.5 ichiro generic_bs_wr_4,
110 1.1 ichiro bs_notimpl_bs_wr_8,
111 1.1 ichiro
112 1.1 ichiro /* set multiple */
113 1.1 ichiro bs_notimpl_bs_sm_1,
114 1.1 ichiro bs_notimpl_bs_sm_2,
115 1.1 ichiro bs_notimpl_bs_sm_4,
116 1.1 ichiro bs_notimpl_bs_sm_8,
117 1.1 ichiro
118 1.1 ichiro /* set region */
119 1.1 ichiro bs_notimpl_bs_sr_1,
120 1.1 ichiro generic_armv4_bs_sr_2,
121 1.4 ichiro generic_bs_sr_4,
122 1.1 ichiro bs_notimpl_bs_sr_8,
123 1.1 ichiro
124 1.1 ichiro /* copy */
125 1.1 ichiro bs_notimpl_bs_c_1,
126 1.1 ichiro generic_armv4_bs_c_2,
127 1.1 ichiro bs_notimpl_bs_c_4,
128 1.1 ichiro bs_notimpl_bs_c_8,
129 1.1 ichiro };
130 1.1 ichiro
131 1.8 igy /* Common routines */
132 1.1 ichiro
133 1.8 igy int
134 1.8 igy ixp12x0_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
135 1.8 igy int flags, bus_space_handle_t *bshp)
136 1.1 ichiro {
137 1.8 igy const struct pmap_devmap *pd;
138 1.1 ichiro
139 1.8 igy paddr_t startpa;
140 1.8 igy paddr_t endpa;
141 1.8 igy paddr_t pa;
142 1.8 igy paddr_t offset;
143 1.8 igy vaddr_t va;
144 1.8 igy pt_entry_t *pte;
145 1.8 igy
146 1.8 igy if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
147 1.8 igy /* Device was statically mapped. */
148 1.8 igy *bshp = pd->pd_va + (bpa - pd->pd_pa);
149 1.8 igy return 0;
150 1.8 igy }
151 1.1 ichiro
152 1.3 ichiro endpa = round_page(bpa + size);
153 1.8 igy offset = bpa & PAGE_MASK;
154 1.8 igy startpa = trunc_page(bpa);
155 1.8 igy
156 1.11 yamt va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
157 1.11 yamt UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
158 1.10 yamt if (va == 0)
159 1.8 igy return ENOMEM;
160 1.8 igy
161 1.8 igy *bshp = va + offset;
162 1.8 igy
163 1.8 igy for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
164 1.14 cegger pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, 0);
165 1.8 igy pte = vtopte(va);
166 1.8 igy *pte &= ~L2_S_CACHE_MASK;
167 1.8 igy PTE_SYNC(pte);
168 1.1 ichiro }
169 1.1 ichiro pmap_update(pmap_kernel());
170 1.1 ichiro
171 1.8 igy return 0;
172 1.1 ichiro }
173 1.1 ichiro
174 1.1 ichiro void
175 1.8 igy ixp12x0_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
176 1.1 ichiro {
177 1.8 igy vaddr_t va;
178 1.8 igy vaddr_t endva;
179 1.8 igy
180 1.8 igy if (pmap_devmap_find_va(bsh, size) != NULL) {
181 1.8 igy /* Device was statically mapped; nothing to do. */
182 1.8 igy return;
183 1.8 igy }
184 1.1 ichiro
185 1.1 ichiro endva = round_page(bsh + size);
186 1.8 igy va = trunc_page(bsh);
187 1.1 ichiro
188 1.8 igy pmap_kremove(va, endva - va);
189 1.10 yamt uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
190 1.1 ichiro }
191 1.1 ichiro
192 1.1 ichiro int
193 1.12 dsl ixp12x0_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
194 1.1 ichiro {
195 1.1 ichiro
196 1.1 ichiro *nbshp = bsh + offset;
197 1.1 ichiro return (0);
198 1.1 ichiro }
199 1.1 ichiro
200 1.1 ichiro void *
201 1.12 dsl ixp12x0_bs_vaddr(void *t, bus_space_handle_t bsh)
202 1.1 ichiro {
203 1.1 ichiro return ((void *)bsh);
204 1.1 ichiro }
205 1.1 ichiro
206 1.8 igy int
207 1.8 igy ixp12x0_bs_alloc(void *t,
208 1.8 igy bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
209 1.8 igy bus_size_t alignment, bus_size_t boundary,
210 1.8 igy int flags, bus_addr_t *bpap,
211 1.8 igy bus_space_handle_t *bshp)
212 1.8 igy {
213 1.8 igy panic("ixp12x0_bs_alloc(): not implemented\n");
214 1.8 igy }
215 1.8 igy
216 1.8 igy void
217 1.8 igy ixp12x0_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
218 1.1 ichiro {
219 1.8 igy panic("ixp12x0_bs_free(): not implemented\n");
220 1.1 ichiro }
221 1.1 ichiro
222 1.1 ichiro void
223 1.12 dsl ixp12x0_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags)
224 1.1 ichiro {
225 1.1 ichiro /* NULL */
226 1.1 ichiro }
227 1.1 ichiro
228 1.1 ichiro /* End of ixp12x0_io.c */
229