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ixp12x0_pci.c revision 1.1
      1  1.1  ichiro /* $NetBSD: ixp12x0_pci.c,v 1.1 2002/07/15 16:27:17 ichiro Exp $ */
      2  1.1  ichiro /*
      3  1.1  ichiro  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      4  1.1  ichiro  * All rights reserved.
      5  1.1  ichiro  *
      6  1.1  ichiro  * This code is derived from software contributed to The NetBSD Foundation
      7  1.1  ichiro  * by Ichiro FUKUHARA and Naoto Shimazaki.
      8  1.1  ichiro  *
      9  1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     10  1.1  ichiro  * modification, are permitted provided that the following conditions
     11  1.1  ichiro  * are met:
     12  1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     13  1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     14  1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     16  1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     17  1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     18  1.1  ichiro  *    must display the following acknowledgement:
     19  1.1  ichiro  *        This product includes software developed by the NetBSD
     20  1.1  ichiro  *        Foundation, Inc. and its contributors.
     21  1.1  ichiro  * 4. Neither the name of The NetBSD Foundation nor the names of its
     22  1.1  ichiro  *    contributors may be used to endorse or promote products derived
     23  1.1  ichiro  *    from this software without specific prior written permission.
     24  1.1  ichiro  *
     25  1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     26  1.1  ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  1.1  ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  1.1  ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     29  1.1  ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  1.1  ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  1.1  ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  1.1  ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  1.1  ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  1.1  ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  1.1  ichiro  * POSSIBILITY OF SUCH DAMAGE.
     36  1.1  ichiro  */
     37  1.1  ichiro 
     38  1.1  ichiro /*
     39  1.1  ichiro  * PCI configuration support for IXP12x0 Network Processor chip.
     40  1.1  ichiro  */
     41  1.1  ichiro 
     42  1.1  ichiro #include <sys/param.h>
     43  1.1  ichiro #include <sys/systm.h>
     44  1.1  ichiro #include <sys/device.h>
     45  1.1  ichiro #include <sys/extent.h>
     46  1.1  ichiro #include <sys/malloc.h>
     47  1.1  ichiro 
     48  1.1  ichiro #include <uvm/uvm_extern.h>
     49  1.1  ichiro 
     50  1.1  ichiro #include <arm/ixp12x0/ixp12x0reg.h>
     51  1.1  ichiro #include <arm/ixp12x0/ixp12x0var.h>
     52  1.1  ichiro 
     53  1.1  ichiro #include <dev/pci/pcireg.h>
     54  1.1  ichiro #include <dev/pci/pcivar.h>
     55  1.1  ichiro 
     56  1.1  ichiro #include "opt_pci.h"
     57  1.1  ichiro #include "pci.h"
     58  1.1  ichiro 
     59  1.1  ichiro void ixp12x0_pci_attach_hook(struct device *, struct device *,
     60  1.1  ichiro 	struct pcibus_attach_args *);
     61  1.1  ichiro int ixp12x0_pci_bus_maxdevs(void *, int);
     62  1.1  ichiro pcitag_t ixp12x0_pci_make_tag(void *, int, int, int);
     63  1.1  ichiro void ixp12x0_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
     64  1.1  ichiro pcireg_t ixp12x0_pci_conf_read(void *, pcitag_t, int);
     65  1.1  ichiro void ixp12x0_pci_conf_write(void *, pcitag_t, int, pcireg_t);
     66  1.1  ichiro 
     67  1.1  ichiro #define	MAX_PCI_DEVICES	21
     68  1.1  ichiro 
     69  1.1  ichiro void
     70  1.1  ichiro ixp12x0_pci_init(pc, cookie)
     71  1.1  ichiro 	pci_chipset_tag_t pc;
     72  1.1  ichiro 	void *cookie;
     73  1.1  ichiro {
     74  1.1  ichiro 	pc->pc_conf_v = cookie;
     75  1.1  ichiro 	pc->pc_attach_hook = ixp12x0_pci_attach_hook;
     76  1.1  ichiro 	pc->pc_bus_maxdevs = ixp12x0_pci_bus_maxdevs;
     77  1.1  ichiro 	pc->pc_make_tag = ixp12x0_pci_make_tag;
     78  1.1  ichiro 	pc->pc_decompose_tag = ixp12x0_pci_decompose_tag;
     79  1.1  ichiro 	pc->pc_conf_read = ixp12x0_pci_conf_read;
     80  1.1  ichiro 	pc->pc_conf_write = ixp12x0_pci_conf_write;
     81  1.1  ichiro }
     82  1.1  ichiro 
     83  1.1  ichiro void
     84  1.1  ichiro pci_conf_interrupt(pc, a, b, c, d, p)
     85  1.1  ichiro 	pci_chipset_tag_t pc;
     86  1.1  ichiro 	int a, b, c, d, *p;
     87  1.1  ichiro {
     88  1.1  ichiro 	/* Nothing */
     89  1.1  ichiro }
     90  1.1  ichiro 
     91  1.1  ichiro void
     92  1.1  ichiro ixp12x0_pci_attach_hook(parent, self, pba)
     93  1.1  ichiro 	struct device *parent;
     94  1.1  ichiro 	struct device *self;
     95  1.1  ichiro 	struct pcibus_attach_args *pba;
     96  1.1  ichiro {
     97  1.1  ichiro 	/* Nothing to do. */
     98  1.1  ichiro }
     99  1.1  ichiro 
    100  1.1  ichiro int
    101  1.1  ichiro ixp12x0_pci_bus_maxdevs(v, busno)
    102  1.1  ichiro 	void *v;
    103  1.1  ichiro 	int busno;
    104  1.1  ichiro {
    105  1.1  ichiro 	return(MAX_PCI_DEVICES);
    106  1.1  ichiro }
    107  1.1  ichiro 
    108  1.1  ichiro pcitag_t
    109  1.1  ichiro ixp12x0_pci_make_tag(v, bus, device, function)
    110  1.1  ichiro 	void *v;
    111  1.1  ichiro 	int bus, device, function;
    112  1.1  ichiro {
    113  1.1  ichiro #ifdef PCI_DEBUG
    114  1.1  ichiro 	printf("ixp12x0_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
    115  1.1  ichiro 		v, bus, device, function);
    116  1.1  ichiro #endif
    117  1.1  ichiro 	return ((bus << 16) | (device << 11) | (function << 8));
    118  1.1  ichiro }
    119  1.1  ichiro 
    120  1.1  ichiro void
    121  1.1  ichiro ixp12x0_pci_decompose_tag(v, tag, busp, devicep, functionp)
    122  1.1  ichiro 	void *v;
    123  1.1  ichiro 	pcitag_t tag;
    124  1.1  ichiro 	int *busp, *devicep, *functionp;
    125  1.1  ichiro {
    126  1.1  ichiro #ifdef PCI_DEBUG
    127  1.1  ichiro 	printf("ixp12x0_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
    128  1.1  ichiro 		v, tag, (int)busp, (int)devicep, (int)functionp);
    129  1.1  ichiro #endif
    130  1.1  ichiro 
    131  1.1  ichiro 	if (busp != NULL)
    132  1.1  ichiro 		*busp = (tag >> 16) & 0xff;
    133  1.1  ichiro 	if (devicep != NULL)
    134  1.1  ichiro 		*devicep = (tag >> 11) & 0x1f;
    135  1.1  ichiro 	if (functionp != NULL)
    136  1.1  ichiro 		*functionp = (tag >> 8) & 0x7;
    137  1.1  ichiro }
    138  1.1  ichiro 
    139  1.1  ichiro pcireg_t
    140  1.1  ichiro ixp12x0_pci_conf_read(v, tag, offset)
    141  1.1  ichiro 	void *v;
    142  1.1  ichiro 	pcitag_t tag;
    143  1.1  ichiro 	int offset;
    144  1.1  ichiro {
    145  1.1  ichiro 	int bus, device, function;
    146  1.1  ichiro 	u_int address;
    147  1.1  ichiro 	pcireg_t val;
    148  1.1  ichiro 
    149  1.1  ichiro 	ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
    150  1.1  ichiro 
    151  1.1  ichiro         if (bus != 0)
    152  1.1  ichiro 		address = IXP12X0_PCI_TYPE1_VBASE | ((bus & 0xff) << 16) |
    153  1.1  ichiro 			  ((device & 0x1F) << 8) | (offset & 0xff);
    154  1.1  ichiro 	else /* bus == 0 */
    155  1.1  ichiro 		address = IXP12X0_PCI_TYPE0_VBASE | 0xc00000 |
    156  1.1  ichiro 			  ((device &0x1f) << 3 | (function & 0x7)) << 8 |
    157  1.1  ichiro 			  (offset & 0xff);
    158  1.1  ichiro 
    159  1.1  ichiro 	val = *((unsigned int *)address);
    160  1.1  ichiro 
    161  1.1  ichiro #ifdef PCI_DEBUG
    162  1.1  ichiro 	printf("ixp12x0_pci_conf_read(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
    163  1.1  ichiro 		address, v, tag, offset, val);
    164  1.1  ichiro #endif
    165  1.1  ichiro 	return(val);
    166  1.1  ichiro }
    167  1.1  ichiro 
    168  1.1  ichiro void
    169  1.1  ichiro ixp12x0_pci_conf_write(v, tag, offset, val)
    170  1.1  ichiro 	void *v;
    171  1.1  ichiro 	pcitag_t tag;
    172  1.1  ichiro 	int offset;
    173  1.1  ichiro 	pcireg_t val;
    174  1.1  ichiro {
    175  1.1  ichiro 	int bus, device, function;
    176  1.1  ichiro 	u_int address;
    177  1.1  ichiro 
    178  1.1  ichiro 	ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
    179  1.1  ichiro 
    180  1.1  ichiro         if (bus != 0)
    181  1.1  ichiro 		address = IXP12X0_PCI_TYPE1_VBASE | ((bus & 0xff) << 16) |
    182  1.1  ichiro 			  ((device & 0x1F) << 8) | (offset & 0xff);
    183  1.1  ichiro 	else /* bus == 0 */
    184  1.1  ichiro 		address = IXP12X0_PCI_TYPE0_VBASE | 0xc00000 |
    185  1.1  ichiro 			  ((device &0x1f) << 3 | (function & 0x7)) << 8 |
    186  1.1  ichiro 			  (offset & 0xff);
    187  1.1  ichiro 
    188  1.1  ichiro #ifdef PCI_DEBUG
    189  1.1  ichiro 	printf("ixp12x0_pci_conf_write(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
    190  1.1  ichiro 		address, v, tag, offset, val);
    191  1.1  ichiro #endif
    192  1.1  ichiro 	*((unsigned int *)address) = val;
    193  1.1  ichiro }
    194