ixp12x0_pci.c revision 1.1 1 /* $NetBSD: ixp12x0_pci.c,v 1.1 2002/07/15 16:27:17 ichiro Exp $ */
2 /*
3 * Copyright (c) 2002 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA and Naoto Shimazaki.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * PCI configuration support for IXP12x0 Network Processor chip.
40 */
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 #include <sys/extent.h>
46 #include <sys/malloc.h>
47
48 #include <uvm/uvm_extern.h>
49
50 #include <arm/ixp12x0/ixp12x0reg.h>
51 #include <arm/ixp12x0/ixp12x0var.h>
52
53 #include <dev/pci/pcireg.h>
54 #include <dev/pci/pcivar.h>
55
56 #include "opt_pci.h"
57 #include "pci.h"
58
59 void ixp12x0_pci_attach_hook(struct device *, struct device *,
60 struct pcibus_attach_args *);
61 int ixp12x0_pci_bus_maxdevs(void *, int);
62 pcitag_t ixp12x0_pci_make_tag(void *, int, int, int);
63 void ixp12x0_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
64 pcireg_t ixp12x0_pci_conf_read(void *, pcitag_t, int);
65 void ixp12x0_pci_conf_write(void *, pcitag_t, int, pcireg_t);
66
67 #define MAX_PCI_DEVICES 21
68
69 void
70 ixp12x0_pci_init(pc, cookie)
71 pci_chipset_tag_t pc;
72 void *cookie;
73 {
74 pc->pc_conf_v = cookie;
75 pc->pc_attach_hook = ixp12x0_pci_attach_hook;
76 pc->pc_bus_maxdevs = ixp12x0_pci_bus_maxdevs;
77 pc->pc_make_tag = ixp12x0_pci_make_tag;
78 pc->pc_decompose_tag = ixp12x0_pci_decompose_tag;
79 pc->pc_conf_read = ixp12x0_pci_conf_read;
80 pc->pc_conf_write = ixp12x0_pci_conf_write;
81 }
82
83 void
84 pci_conf_interrupt(pc, a, b, c, d, p)
85 pci_chipset_tag_t pc;
86 int a, b, c, d, *p;
87 {
88 /* Nothing */
89 }
90
91 void
92 ixp12x0_pci_attach_hook(parent, self, pba)
93 struct device *parent;
94 struct device *self;
95 struct pcibus_attach_args *pba;
96 {
97 /* Nothing to do. */
98 }
99
100 int
101 ixp12x0_pci_bus_maxdevs(v, busno)
102 void *v;
103 int busno;
104 {
105 return(MAX_PCI_DEVICES);
106 }
107
108 pcitag_t
109 ixp12x0_pci_make_tag(v, bus, device, function)
110 void *v;
111 int bus, device, function;
112 {
113 #ifdef PCI_DEBUG
114 printf("ixp12x0_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
115 v, bus, device, function);
116 #endif
117 return ((bus << 16) | (device << 11) | (function << 8));
118 }
119
120 void
121 ixp12x0_pci_decompose_tag(v, tag, busp, devicep, functionp)
122 void *v;
123 pcitag_t tag;
124 int *busp, *devicep, *functionp;
125 {
126 #ifdef PCI_DEBUG
127 printf("ixp12x0_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
128 v, tag, (int)busp, (int)devicep, (int)functionp);
129 #endif
130
131 if (busp != NULL)
132 *busp = (tag >> 16) & 0xff;
133 if (devicep != NULL)
134 *devicep = (tag >> 11) & 0x1f;
135 if (functionp != NULL)
136 *functionp = (tag >> 8) & 0x7;
137 }
138
139 pcireg_t
140 ixp12x0_pci_conf_read(v, tag, offset)
141 void *v;
142 pcitag_t tag;
143 int offset;
144 {
145 int bus, device, function;
146 u_int address;
147 pcireg_t val;
148
149 ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
150
151 if (bus != 0)
152 address = IXP12X0_PCI_TYPE1_VBASE | ((bus & 0xff) << 16) |
153 ((device & 0x1F) << 8) | (offset & 0xff);
154 else /* bus == 0 */
155 address = IXP12X0_PCI_TYPE0_VBASE | 0xc00000 |
156 ((device &0x1f) << 3 | (function & 0x7)) << 8 |
157 (offset & 0xff);
158
159 val = *((unsigned int *)address);
160
161 #ifdef PCI_DEBUG
162 printf("ixp12x0_pci_conf_read(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
163 address, v, tag, offset, val);
164 #endif
165 return(val);
166 }
167
168 void
169 ixp12x0_pci_conf_write(v, tag, offset, val)
170 void *v;
171 pcitag_t tag;
172 int offset;
173 pcireg_t val;
174 {
175 int bus, device, function;
176 u_int address;
177
178 ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
179
180 if (bus != 0)
181 address = IXP12X0_PCI_TYPE1_VBASE | ((bus & 0xff) << 16) |
182 ((device & 0x1F) << 8) | (offset & 0xff);
183 else /* bus == 0 */
184 address = IXP12X0_PCI_TYPE0_VBASE | 0xc00000 |
185 ((device &0x1f) << 3 | (function & 0x7)) << 8 |
186 (offset & 0xff);
187
188 #ifdef PCI_DEBUG
189 printf("ixp12x0_pci_conf_write(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
190 address, v, tag, offset, val);
191 #endif
192 *((unsigned int *)address) = val;
193 }
194