ixp12x0_pci.c revision 1.2 1 /* $NetBSD: ixp12x0_pci.c,v 1.2 2002/10/09 00:11:15 thorpej Exp $ */
2 /*
3 * Copyright (c) 2002 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA and Naoto Shimazaki.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * PCI configuration support for IXP12x0 Network Processor chip.
40 */
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 #include <sys/extent.h>
46 #include <sys/malloc.h>
47
48 #include <uvm/uvm_extern.h>
49
50 #include <arm/ixp12x0/ixp12x0reg.h>
51 #include <arm/ixp12x0/ixp12x0var.h>
52
53 #include <dev/pci/pcireg.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pciconf.h>
56
57 #include "opt_pci.h"
58 #include "pci.h"
59
60 void ixp12x0_pci_attach_hook(struct device *, struct device *,
61 struct pcibus_attach_args *);
62 int ixp12x0_pci_bus_maxdevs(void *, int);
63 pcitag_t ixp12x0_pci_make_tag(void *, int, int, int);
64 void ixp12x0_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
65 pcireg_t ixp12x0_pci_conf_read(void *, pcitag_t, int);
66 void ixp12x0_pci_conf_write(void *, pcitag_t, int, pcireg_t);
67
68 #define MAX_PCI_DEVICES 21
69
70 void
71 ixp12x0_pci_init(pc, cookie)
72 pci_chipset_tag_t pc;
73 void *cookie;
74 {
75 pc->pc_conf_v = cookie;
76 pc->pc_attach_hook = ixp12x0_pci_attach_hook;
77 pc->pc_bus_maxdevs = ixp12x0_pci_bus_maxdevs;
78 pc->pc_make_tag = ixp12x0_pci_make_tag;
79 pc->pc_decompose_tag = ixp12x0_pci_decompose_tag;
80 pc->pc_conf_read = ixp12x0_pci_conf_read;
81 pc->pc_conf_write = ixp12x0_pci_conf_write;
82 }
83
84 void
85 pci_conf_interrupt(pc, a, b, c, d, p)
86 pci_chipset_tag_t pc;
87 int a, b, c, d, *p;
88 {
89 /* Nothing */
90 }
91
92 void
93 ixp12x0_pci_attach_hook(parent, self, pba)
94 struct device *parent;
95 struct device *self;
96 struct pcibus_attach_args *pba;
97 {
98 /* Nothing to do. */
99 }
100
101 int
102 ixp12x0_pci_bus_maxdevs(v, busno)
103 void *v;
104 int busno;
105 {
106 return(MAX_PCI_DEVICES);
107 }
108
109 pcitag_t
110 ixp12x0_pci_make_tag(v, bus, device, function)
111 void *v;
112 int bus, device, function;
113 {
114 #ifdef PCI_DEBUG
115 printf("ixp12x0_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
116 v, bus, device, function);
117 #endif
118 return ((bus << 16) | (device << 11) | (function << 8));
119 }
120
121 void
122 ixp12x0_pci_decompose_tag(v, tag, busp, devicep, functionp)
123 void *v;
124 pcitag_t tag;
125 int *busp, *devicep, *functionp;
126 {
127 #ifdef PCI_DEBUG
128 printf("ixp12x0_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
129 v, tag, (int)busp, (int)devicep, (int)functionp);
130 #endif
131
132 if (busp != NULL)
133 *busp = (tag >> 16) & 0xff;
134 if (devicep != NULL)
135 *devicep = (tag >> 11) & 0x1f;
136 if (functionp != NULL)
137 *functionp = (tag >> 8) & 0x7;
138 }
139
140 pcireg_t
141 ixp12x0_pci_conf_read(v, tag, offset)
142 void *v;
143 pcitag_t tag;
144 int offset;
145 {
146 int bus, device, function;
147 u_int address;
148 pcireg_t val;
149
150 ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
151
152 if (bus != 0)
153 address = IXP12X0_PCI_TYPE1_VBASE | ((bus & 0xff) << 16) |
154 ((device & 0x1F) << 8) | (offset & 0xff);
155 else /* bus == 0 */
156 address = IXP12X0_PCI_TYPE0_VBASE | 0xc00000 |
157 ((device &0x1f) << 3 | (function & 0x7)) << 8 |
158 (offset & 0xff);
159
160 val = *((unsigned int *)address);
161
162 #ifdef PCI_DEBUG
163 printf("ixp12x0_pci_conf_read(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
164 address, v, tag, offset, val);
165 #endif
166 return(val);
167 }
168
169 void
170 ixp12x0_pci_conf_write(v, tag, offset, val)
171 void *v;
172 pcitag_t tag;
173 int offset;
174 pcireg_t val;
175 {
176 int bus, device, function;
177 u_int address;
178
179 ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
180
181 if (bus != 0)
182 address = IXP12X0_PCI_TYPE1_VBASE | ((bus & 0xff) << 16) |
183 ((device & 0x1F) << 8) | (offset & 0xff);
184 else /* bus == 0 */
185 address = IXP12X0_PCI_TYPE0_VBASE | 0xc00000 |
186 ((device &0x1f) << 3 | (function & 0x7)) << 8 |
187 (offset & 0xff);
188
189 #ifdef PCI_DEBUG
190 printf("ixp12x0_pci_conf_write(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
191 address, v, tag, offset, val);
192 #endif
193 *((unsigned int *)address) = val;
194 }
195