ixp12x0_pci.c revision 1.6
1 /* $NetBSD: ixp12x0_pci.c,v 1.6 2003/09/15 05:07:29 ichiro Exp $ */ 2 /* 3 * Copyright (c) 2002, 2003 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA and Naoto Shimazaki. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci.c,v 1.6 2003/09/15 05:07:29 ichiro Exp $"); 40 41 /* 42 * PCI configuration support for IXP12x0 Network Processor chip. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 #include <sys/extent.h> 49 #include <sys/malloc.h> 50 51 #include <uvm/uvm_extern.h> 52 53 #include <arm/ixp12x0/ixp12x0reg.h> 54 #include <arm/ixp12x0/ixp12x0var.h> 55 56 #include <dev/pci/pcireg.h> 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pciconf.h> 59 60 #include "opt_pci.h" 61 #include "pci.h" 62 63 void ixp12x0_pci_attach_hook(struct device *, struct device *, 64 struct pcibus_attach_args *); 65 int ixp12x0_pci_bus_maxdevs(void *, int); 66 pcitag_t ixp12x0_pci_make_tag(void *, int, int, int); 67 void ixp12x0_pci_decompose_tag(void *, pcitag_t, int *, int *, int *); 68 pcireg_t ixp12x0_pci_conf_read(void *, pcitag_t, int); 69 void ixp12x0_pci_conf_write(void *, pcitag_t, int, pcireg_t); 70 71 static vaddr_t ixp12x0_pci_conf_setup(void *, struct ixp12x0_softc *, pcitag_t, int); 72 73 #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit) 74 #define PCI_CONF_UNLOCK(s) restore_interrupts((s)) 75 76 #define MAX_PCI_DEVICES 4 77 78 /* 79 * IXM1200 PCI configuration Cycles 80 * Device Address 81 * ------------------------------------- 82 * 0 IXP1200 0x0800 - 0x08FF 83 * 1 i21555 0x1000 - 0x10FF 84 * 2 i82559 0x2000 - 0x20FF 85 * 3 PMC expansion 0x4000 - 0x40FF 86 */ 87 88 void 89 ixp12x0_pci_init(pc, cookie) 90 pci_chipset_tag_t pc; 91 void *cookie; 92 { 93 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 94 struct ixp12x0_softc *sc = cookie; 95 struct extent *ioext, *memext; 96 #endif 97 pc->pc_conf_v = cookie; 98 pc->pc_attach_hook = ixp12x0_pci_attach_hook; 99 pc->pc_bus_maxdevs = ixp12x0_pci_bus_maxdevs; 100 pc->pc_make_tag = ixp12x0_pci_make_tag; 101 pc->pc_decompose_tag = ixp12x0_pci_decompose_tag; 102 pc->pc_conf_read = ixp12x0_pci_conf_read; 103 pc->pc_conf_write = ixp12x0_pci_conf_write; 104 105 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 106 ioext = extent_create("pciio", 0, IXP12X0_PCI_IO_SIZE - 1, 107 M_DEVBUF, NULL, 0, EX_NOWAIT); 108 /* PCI MEM space is mapped same address as real memory */ 109 memext = extent_create("pcimem", IXP12X0_PCI_MEM_HWBASE, 110 IXP12X0_PCI_MEM_HWBASE + 111 IXP12X0_PCI_MEM_SIZE - 1, 112 M_DEVBUF, NULL, 0, EX_NOWAIT); 113 printf("%s: configuring PCI bus\n", sc->sc_dev.dv_xname); 114 pci_configure_bus(pc, ioext, memext, NULL, 0 /* XXX bus = 0 */, 115 arm_dcache_align); 116 117 extent_destroy(ioext); 118 extent_destroy(memext); 119 #endif 120 } 121 122 void 123 pci_conf_interrupt(pc, a, b, c, d, p) 124 pci_chipset_tag_t pc; 125 int a, b, c, d, *p; 126 { 127 /* Nothing */ 128 } 129 130 void 131 ixp12x0_pci_attach_hook(parent, self, pba) 132 struct device *parent; 133 struct device *self; 134 struct pcibus_attach_args *pba; 135 { 136 /* Nothing to do. */ 137 } 138 139 int 140 ixp12x0_pci_bus_maxdevs(v, busno) 141 void *v; 142 int busno; 143 { 144 return(MAX_PCI_DEVICES); 145 } 146 147 pcitag_t 148 ixp12x0_pci_make_tag(v, bus, device, function) 149 void *v; 150 int bus, device, function; 151 { 152 #ifdef PCI_DEBUG 153 printf("ixp12x0_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n", 154 v, bus, device, function); 155 #endif 156 return ((bus << 16) | (device << 11) | (function << 8)); 157 } 158 159 void 160 ixp12x0_pci_decompose_tag(v, tag, busp, devicep, functionp) 161 void *v; 162 pcitag_t tag; 163 int *busp, *devicep, *functionp; 164 { 165 #ifdef PCI_DEBUG 166 printf("ixp12x0_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n", 167 v, tag, (int)busp, (int)devicep, (int)functionp); 168 #endif 169 170 if (busp != NULL) 171 *busp = (tag >> 16) & 0xff; 172 if (devicep != NULL) 173 *devicep = (tag >> 11) & 0x1f; 174 if (functionp != NULL) 175 *functionp = (tag >> 8) & 0x7; 176 } 177 178 static vaddr_t 179 ixp12x0_pci_conf_setup(v, sc, tag, offset) 180 void *v; 181 struct ixp12x0_softc *sc; 182 pcitag_t tag; 183 int offset; 184 { 185 int bus, device, function; 186 vaddr_t addr; 187 188 ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function); 189 190 if (bus == 0) { 191 /* configuration type 0 */ 192 addr = (vaddr_t) bus_space_vaddr(sc->sc_iot, sc->sc_conf0_ioh) + 193 ((1 << (device + 10)) | (offset & ~3)); 194 } else { 195 /* configuration type 1 */ 196 addr = (vaddr_t) bus_space_vaddr(sc->sc_iot, sc->sc_conf1_ioh) + 197 ((bus << 16) | (device << 11) | 198 (function << 8) | (offset & ~3) | 1); 199 } 200 return addr; 201 } 202 203 pcireg_t 204 ixp12x0_pci_conf_read(v, tag, offset) 205 void *v; 206 pcitag_t tag; 207 int offset; 208 { 209 struct ixp12x0_softc *sc = v; 210 vaddr_t va = ixp12x0_pci_conf_setup(v, sc, tag, offset); 211 pcireg_t rv; 212 int s; 213 214 #ifdef PCI_DEBUG 215 printf("ixp12x0_pci_conf_read: base=%lx,va=%lx,tag=%lx,offset=%x\n", 216 sc->sc_conf0_ioh, va, tag, offset); 217 #endif 218 if (va == 0) 219 return -1; 220 221 PCI_CONF_LOCK(s); 222 223 if (badaddr_read((void *) va, sizeof(rv), &rv)) { 224 #ifdef PCI_DEBUG 225 printf("conf_read: %lx bad address\n", va); 226 #endif 227 rv = (pcireg_t) - 1; 228 } 229 230 PCI_CONF_UNLOCK(s); 231 232 return rv; 233 } 234 235 void 236 ixp12x0_pci_conf_write(v, tag, offset, val) 237 void *v; 238 pcitag_t tag; 239 int offset; 240 pcireg_t val; 241 { 242 struct ixp12x0_softc *sc = v; 243 vaddr_t va = ixp12x0_pci_conf_setup(v, sc, tag, offset); 244 int s; 245 246 #ifdef PCI_DEBUG 247 printf("ixp12x0_pci_conf_write: tag=%lx offset=%x -> va=%lx (base=%lx)\n", 248 tag, offset, va, sc->sc_conf0_ioh); 249 #endif 250 251 PCI_CONF_LOCK(s); 252 253 *(pcireg_t *) va = val; 254 255 PCI_CONF_UNLOCK(s); 256 } 257
Indexes created Mon Sep 29 03:10:08 GMT 2025