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ixp12x0var.h revision 1.3 
      1 /*	$NetBSD: ixp12x0var.h,v 1.3 2003/02/17 20:51:52 ichiro Exp $ */
      2 /*
      3  * Copyright (c) 2002
      4  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Ichiro FUKUHARA.
     18  * 4. The name of the company nor the name of the author may be used to
     19  *    endorse or promote products derived from this software without specific
     20  *    prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     26  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  */
     34 
     35 #ifndef _IXP12X0VAR_H_
     36 #define _IXP12X0VAR_H_
     37 
     38 #include <sys/conf.h>
     39 #include <sys/device.h>
     40 #include <sys/queue.h>
     41 
     42 #include <machine/bus.h>
     43 
     44 #include <dev/pci/pcivar.h>
     45 
     46 #define IXPREG(reg)	*((volatile u_int32_t*) (reg))
     47 
     48 struct ixp12x0_softc {
     49 	struct device sc_dev;
     50 	bus_space_tag_t sc_iot;
     51 	bus_space_handle_t sc_ioh;		/* IRQ handle */
     52 
     53 	u_int32_t sc_intrmask;
     54 
     55 	/* Handles for the various subregions. */
     56 	/* PCI address */
     57 	bus_space_handle_t sc_pci_ioh;		/* PCI CSR */
     58 	bus_space_handle_t sc_conf0_ioh;	/* PCI Configuration 0 */
     59 	bus_space_handle_t sc_conf1_ioh;	/* PCI Configuration 1 */
     60 
     61 	/* I/O window vaddr */
     62 
     63 	/* Bus space, DMA, and PCI tags for the PCI bus */
     64 	struct bus_space ia_pci_iot;
     65         struct bus_space ia_pci_memt;
     66         struct arm32_bus_dma_tag ia_pci_dmat;
     67         struct arm32_pci_chipset ia_pci_chipset;
     68 
     69 	/* DMA window info for PCI DMA. */
     70 	struct arm32_dma_range ia_pci_dma_range;
     71 
     72 	/* GPIO */
     73 };
     74 
     75 struct intrhand {
     76 	TAILQ_ENTRY(intrhand) ih_list;	/* link on intrq list */
     77 	int (*ih_func)(void *);		/* interrupt handler */
     78 	void *ih_arg;			/* arg for handler */
     79 	int ih_ipl;			/* IPL_* */
     80 	int ih_irq;			/* IRQ number */
     81 };
     82 
     83 #define	IRQNAMESIZE	sizeof("ixpintr ipl xxx")
     84 
     85 struct intrq {
     86 	TAILQ_HEAD(, intrhand) iq_list;	/* handler list */
     87 	struct evcnt iq_ev;		/* event counter */
     88 	u_int32_t iq_mask;		/* IRQs to mask while handling */
     89 	u_int32_t iq_pci_mask;		/* PCI IRQs to mask while handling */
     90 	u_int32_t iq_levels;		/* IPL_*'s this IRQ has */
     91 	char iq_name[IRQNAMESIZE];	/* interrupt name */
     92 	int iq_ist;			/* share type */
     93 };
     94 
     95 struct pmap_ent {
     96 	const char*	msg;
     97 	vaddr_t		va;
     98 	paddr_t		pa;
     99 	vsize_t		sz;
    100 	int		prot;
    101 	int		cache;
    102 };
    103 
    104 void	ixp12x0_bs_init(bus_space_tag_t, void *);
    105 void	ixp12x0_io_bs_init(bus_space_tag_t, void *);
    106 void	ixp12x0_mem_bs_init(bus_space_tag_t, void *);
    107 void	ixp12x0_pci_init(pci_chipset_tag_t, void *);
    108 void	ixp12x0_pci_dma_init(struct ixp12x0_softc *);
    109 void	ixp12x0_attach(struct ixp12x0_softc *);
    110 void	ixp12x0_intr_init(void);
    111 void	*ixp12x0_intr_establish(int irq, int ipl, int (*)(void *), void *);
    112 void	ixp12x0_intr_disestablish(void *);
    113 void	ixp12x0_pmap_chunk_table(vaddr_t l1pt, struct pmap_ent* m);
    114 void	ixp12x0_pmap_io_reg(vaddr_t l1pt);
    115 void	ixp12x0_reset(void);
    116 
    117 #endif /* _IXP12X0VAR_H_ */
    118