ixp12x0var.h revision 1.6 1 /* $NetBSD: ixp12x0var.h,v 1.6 2003/07/13 08:56:16 igy Exp $ */
2 /*
3 * Copyright (c) 2002
4 * Ichiro FUKUHARA <ichiro (at) ichiro.org>.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Ichiro FUKUHARA.
18 * 4. The name of the company nor the name of the author may be used to
19 * endorse or promote products derived from this software without specific
20 * prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 #ifndef _IXP12X0VAR_H_
36 #define _IXP12X0VAR_H_
37
38 #include <sys/conf.h>
39 #include <sys/device.h>
40 #include <sys/queue.h>
41
42 #include <machine/bus.h>
43
44 #include <dev/pci/pcivar.h>
45
46 struct ixp12x0_softc {
47 struct device sc_dev;
48 bus_space_tag_t sc_iot;
49
50 /* Handles for the PCI */
51 bus_space_handle_t sc_pci_ioh; /* PCI CSR */
52 bus_space_handle_t sc_conf0_ioh; /* PCI Configuration 0 */
53 bus_space_handle_t sc_conf1_ioh; /* PCI Configuration 1 */
54
55 /* DMA, and PCI chipset */
56 struct arm32_bus_dma_tag ia_pci_dmat;
57 struct arm32_pci_chipset ia_pci_chipset;
58
59 /* DMA window info for PCI DMA. */
60 struct arm32_dma_range ia_pci_dma_range;
61
62 /* GPIO */
63 };
64
65 struct intrhand {
66 TAILQ_ENTRY(intrhand) ih_list; /* link on intrq list */
67 int (*ih_func)(void *); /* interrupt handler */
68 void *ih_arg; /* arg for handler */
69 int ih_ipl; /* IPL_* */
70 int ih_irq; /* IRQ number */
71 };
72
73 #define IRQNAMESIZE sizeof("ixpintr ipl xxx")
74
75 struct intrq {
76 TAILQ_HEAD(, intrhand) iq_list; /* handler list */
77 struct evcnt iq_ev; /* event counter */
78 u_int32_t iq_mask; /* IRQs to mask while handling */
79 u_int32_t iq_pci_mask; /* PCI IRQs to mask while handling */
80 u_int32_t iq_levels; /* IPL_*'s this IRQ has */
81 char iq_name[IRQNAMESIZE]; /* interrupt name */
82 int iq_ist; /* share type */
83 };
84
85 struct pmap_ent {
86 const char* msg;
87 vaddr_t va;
88 paddr_t pa;
89 vsize_t sz;
90 int prot;
91 int cache;
92 };
93
94 extern struct bus_space ixp12x0_bs_tag;
95
96 void ixp12x0_pci_init(pci_chipset_tag_t, void *);
97 void ixp12x0_pci_dma_init(struct ixp12x0_softc *);
98 void ixp12x0_attach(struct ixp12x0_softc *);
99 void ixp12x0_intr_init(void);
100 void *ixp12x0_intr_establish(int irq, int ipl, int (*)(void *), void *);
101 void ixp12x0_intr_disestablish(void *);
102 void ixp12x0_pmap_chunk_table(vaddr_t l1pt, struct pmap_ent* m);
103 void ixp12x0_pmap_io_reg(vaddr_t l1pt);
104 void ixp12x0_reset(void);
105
106 #endif /* _IXP12X0VAR_H_ */
107