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armadaxpvar.h revision 1.2.4.1 
      1  1.2.4.1  pgoyette /*	$NetBSD: armadaxpvar.h,v 1.2.4.1 2017/03/20 06:57:11 pgoyette Exp $	*/
      2      1.1  hsuenaga /*
      3      1.1  hsuenaga  * Copyright (c) 2015 SUENAGA Hiroki
      4      1.1  hsuenaga  * All rights reserved.
      5      1.1  hsuenaga  *
      6      1.1  hsuenaga  * Redistribution and use in source and binary forms, with or without
      7      1.1  hsuenaga  * modification, are permitted provided that the following conditions
      8      1.1  hsuenaga  * are met:
      9      1.1  hsuenaga  * 1. Redistributions of source code must retain the above copyright
     10      1.1  hsuenaga  *    notice, this list of conditions and the following disclaimer.
     11      1.1  hsuenaga  * 2. Redistributions in binary form must reproduce the above copyright
     12      1.1  hsuenaga  *    notice, this list of conditions and the following disclaimer in the
     13      1.1  hsuenaga  *    documentation and/or other materials provided with the distribution.
     14      1.1  hsuenaga  *
     15      1.1  hsuenaga  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16      1.1  hsuenaga  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     17      1.1  hsuenaga  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     18      1.1  hsuenaga  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     19      1.1  hsuenaga  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     20      1.1  hsuenaga  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     21      1.1  hsuenaga  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22      1.1  hsuenaga  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     23      1.1  hsuenaga  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     24      1.1  hsuenaga  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     25      1.1  hsuenaga  * POSSIBILITY OF SUCH DAMAGE.
     26      1.1  hsuenaga  */
     27      1.1  hsuenaga #ifndef _ARMDAXPVAR_H_
     28      1.1  hsuenaga #define _ARMDAXPVAR_H_
     29      1.2  hsuenaga #include <arm/marvell/mvsocvar.h>
     30      1.1  hsuenaga #include <machine/bus_defs.h>
     31      1.1  hsuenaga 
     32      1.1  hsuenaga /* l2cache maintanance */
     33      1.1  hsuenaga extern void armadaxp_sdcache_inv_all(void);
     34      1.1  hsuenaga extern void armadaxp_sdcache_wb_all(void);
     35      1.1  hsuenaga extern void armadaxp_sdcache_wbinv_all(void);
     36      1.1  hsuenaga extern void armadaxp_sdcache_inv_range(vaddr_t, paddr_t, psize_t);
     37      1.1  hsuenaga extern void armadaxp_sdcache_wb_range(vaddr_t, paddr_t, psize_t);
     38      1.1  hsuenaga extern void armadaxp_sdcache_wbinv_range(vaddr_t, paddr_t, psize_t);
     39      1.1  hsuenaga 
     40      1.2  hsuenaga /* mbus initialization */
     41      1.2  hsuenaga extern int armadaxp_init_mbus(void);
     42      1.2  hsuenaga extern int armadaxp_attr_dump(struct mvsoc_softc *, uint32_t, uint32_t);
     43      1.2  hsuenaga 
     44      1.1  hsuenaga #endif /* _ARMDAXPVAR_H_ */
     45