mvsoc_space.c revision 1.7 1 /* $NetBSD: mvsoc_space.c,v 1.7 2014/02/22 20:33:00 matt Exp $ */
2 /*
3 * Copyright (c) 2007 KIYOHARA Takashi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.7 2014/02/22 20:33:00 matt Exp $");
30
31 #include "opt_mvsoc.h"
32 #include "mvpex.h"
33 #include "gtpci.h"
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37
38 #include <uvm/uvm_extern.h>
39
40 #include <sys/bus.h>
41
42 #include <arm/marvell/mvsocreg.h>
43 #include <arm/marvell/mvsocvar.h>
44
45
46 /* Proto types for all the bus_space structure functions */
47 bs_protos(mvsoc);
48 bs_protos(generic);
49 bs_protos(generic_armv4);
50 bs_protos(bs_notimpl);
51
52 #define MVSOC_BUS_SPACE_NORMAL_FUNCS \
53 /* read (single) */ \
54 generic_bs_r_1, \
55 generic_armv4_bs_r_2, \
56 generic_bs_r_4, \
57 bs_notimpl_bs_r_8, \
58 \
59 /* read multiple */ \
60 generic_bs_rm_1, \
61 generic_armv4_bs_rm_2, \
62 generic_bs_rm_4, \
63 bs_notimpl_bs_rm_8, \
64 \
65 /* read region */ \
66 generic_bs_rr_1, \
67 generic_armv4_bs_rr_2, \
68 generic_bs_rr_4, \
69 bs_notimpl_bs_rr_8, \
70 \
71 /* write (single) */ \
72 generic_bs_w_1, \
73 generic_armv4_bs_w_2, \
74 generic_bs_w_4, \
75 bs_notimpl_bs_w_8, \
76 \
77 /* write multiple */ \
78 generic_bs_wm_1, \
79 generic_armv4_bs_wm_2, \
80 generic_bs_wm_4, \
81 bs_notimpl_bs_wm_8, \
82 \
83 /* write region */ \
84 generic_bs_wr_1, \
85 generic_armv4_bs_wr_2, \
86 generic_bs_wr_4, \
87 bs_notimpl_bs_wr_8
88
89 #define MVSOC_BUS_SPACE_DEFAULT_FUNCS \
90 /* mapping/unmapping */ \
91 mvsoc_bs_map, \
92 mvsoc_bs_unmap, \
93 mvsoc_bs_subregion, \
94 \
95 /* allocation/deallocation */ \
96 mvsoc_bs_alloc, \
97 mvsoc_bs_free, \
98 \
99 /* get kernel virtual address */ \
100 mvsoc_bs_vaddr, \
101 \
102 /* mmap bus space for userland */ \
103 bs_notimpl_bs_mmap, \
104 \
105 /* barrier */ \
106 mvsoc_bs_barrier, \
107 \
108 MVSOC_BUS_SPACE_NORMAL_FUNCS, \
109 \
110 /* set multiple */ \
111 bs_notimpl_bs_sm_1, \
112 bs_notimpl_bs_sm_2, \
113 bs_notimpl_bs_sm_4, \
114 bs_notimpl_bs_sm_8, \
115 \
116 /* set region */ \
117 bs_notimpl_bs_sr_1, \
118 generic_armv4_bs_sr_2, \
119 generic_bs_sr_4, \
120 bs_notimpl_bs_sr_8, \
121 \
122 /* copy */ \
123 bs_notimpl_bs_c_1, \
124 generic_armv4_bs_c_2, \
125 bs_notimpl_bs_c_4, \
126 bs_notimpl_bs_c_8
127
128
129 struct bus_space mvsoc_bs_tag = {
130 /* cookie */
131 (void *)0,
132
133 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
134 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
135 MVSOC_BUS_SPACE_NORMAL_FUNCS,
136 #endif
137 };
138
139 #if NMVPEX > 0
140 #if defined(ORION)
141 struct bus_space orion_pex0_mem_bs_tag = {
142 /* cookie */
143 (void *)ORION_TAG_PEX0_MEM,
144
145 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
146 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
147 MVSOC_BUS_SPACE_NORMAL_FUNCS,
148 #endif
149 };
150 struct bus_space orion_pex0_io_bs_tag = {
151 /* cookie */
152 (void *)ORION_TAG_PEX0_IO,
153
154 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
155 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
156 MVSOC_BUS_SPACE_NORMAL_FUNCS,
157 #endif
158 };
159 struct bus_space orion_pex1_mem_bs_tag = {
160 /* cookie */
161 (void *)ORION_TAG_PEX1_MEM,
162
163 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
164 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
165 MVSOC_BUS_SPACE_NORMAL_FUNCS,
166 #endif
167 };
168 struct bus_space orion_pex1_io_bs_tag = {
169 /* cookie */
170 (void *)ORION_TAG_PEX1_IO,
171
172 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
173 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
174 MVSOC_BUS_SPACE_NORMAL_FUNCS,
175 #endif
176 };
177 #endif
178
179 #if defined(KIRKWOOD)
180 struct bus_space kirkwood_pex_mem_bs_tag = {
181 /* cookie */
182 (void *)KIRKWOOD_TAG_PEX_MEM,
183
184 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
185 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
186 MVSOC_BUS_SPACE_NORMAL_FUNCS,
187 #endif
188 };
189 struct bus_space kirkwood_pex_io_bs_tag = {
190 /* cookie */
191 (void *)KIRKWOOD_TAG_PEX_IO,
192
193 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
194 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
195 MVSOC_BUS_SPACE_NORMAL_FUNCS,
196 #endif
197 };
198 struct bus_space kirkwood_pex1_mem_bs_tag = {
199 /* cookie */
200 (void *)KIRKWOOD_TAG_PEX1_MEM,
201
202 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
203 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
204 MVSOC_BUS_SPACE_NORMAL_FUNCS,
205 #endif
206 };
207 struct bus_space kirkwood_pex1_io_bs_tag = {
208 /* cookie */
209 (void *)KIRKWOOD_TAG_PEX1_IO,
210
211 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
212 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
213 MVSOC_BUS_SPACE_NORMAL_FUNCS,
214 #endif
215 };
216 #endif
217
218 #if defined(ARMADAXP)
219 struct bus_space armadaxp_pex00_mem_bs_tag = {
220 /* cookie */
221 (void *)ARMADAXP_TAG_PEX00_MEM,
222
223 MVSOC_BUS_SPACE_DEFAULT_FUNCS
224 };
225 struct bus_space armadaxp_pex00_io_bs_tag = {
226 /* cookie */
227 (void *)ARMADAXP_TAG_PEX00_IO,
228
229 MVSOC_BUS_SPACE_DEFAULT_FUNCS
230 };
231 struct bus_space armadaxp_pex01_mem_bs_tag = {
232 /* cookie */
233 (void *)ARMADAXP_TAG_PEX01_MEM,
234
235 MVSOC_BUS_SPACE_DEFAULT_FUNCS
236 };
237 struct bus_space armadaxp_pex01_io_bs_tag = {
238 /* cookie */
239 (void *)ARMADAXP_TAG_PEX01_IO,
240
241 MVSOC_BUS_SPACE_DEFAULT_FUNCS
242 };
243 struct bus_space armadaxp_pex02_mem_bs_tag = {
244 /* cookie */
245 (void *)ARMADAXP_TAG_PEX02_MEM,
246
247 MVSOC_BUS_SPACE_DEFAULT_FUNCS
248 };
249 struct bus_space armadaxp_pex02_io_bs_tag = {
250 /* cookie */
251 (void *)ARMADAXP_TAG_PEX02_IO,
252
253 MVSOC_BUS_SPACE_DEFAULT_FUNCS
254 };
255 struct bus_space armadaxp_pex03_mem_bs_tag = {
256 /* cookie */
257 (void *)ARMADAXP_TAG_PEX03_MEM,
258
259 MVSOC_BUS_SPACE_DEFAULT_FUNCS
260 };
261 struct bus_space armadaxp_pex03_io_bs_tag = {
262 /* cookie */
263 (void *)ARMADAXP_TAG_PEX03_IO,
264
265 MVSOC_BUS_SPACE_DEFAULT_FUNCS
266 };
267 struct bus_space armadaxp_pex2_mem_bs_tag = {
268 /* cookie */
269 (void *)ARMADAXP_TAG_PEX2_MEM,
270
271 MVSOC_BUS_SPACE_DEFAULT_FUNCS
272 };
273 struct bus_space armadaxp_pex2_io_bs_tag = {
274 /* cookie */
275 (void *)ARMADAXP_TAG_PEX2_IO,
276
277 MVSOC_BUS_SPACE_DEFAULT_FUNCS
278 };
279 struct bus_space armadaxp_pex3_mem_bs_tag = {
280 /* cookie */
281 (void *)ARMADAXP_TAG_PEX3_MEM,
282
283 MVSOC_BUS_SPACE_DEFAULT_FUNCS
284 };
285 struct bus_space armadaxp_pex3_io_bs_tag = {
286 /* cookie */
287 (void *)ARMADAXP_TAG_PEX3_IO,
288
289 MVSOC_BUS_SPACE_DEFAULT_FUNCS
290 };
291 #endif
292 #endif
293
294 #if NGTPCI > 0
295 #if defined(ORION)
296 struct bus_space orion_pci_mem_bs_tag = {
297 /* cookie */
298 (void *)ORION_TAG_PCI_MEM,
299
300 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
301 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
302 MVSOC_BUS_SPACE_NORMAL_FUNCS,
303 #endif
304 };
305 struct bus_space orion_pci_io_bs_tag = {
306 /* cookie */
307 (void *)ORION_TAG_PCI_IO,
308
309 MVSOC_BUS_SPACE_DEFAULT_FUNCS,
310 #ifdef __BUS_SPACE_HAS_STREAM_METHODS
311 MVSOC_BUS_SPACE_NORMAL_FUNCS,
312 #endif
313 };
314 #endif
315 #endif
316
317
318 int
319 mvsoc_bs_map(void *space, bus_addr_t address, bus_size_t size, int flags,
320 bus_space_handle_t *handlep)
321 {
322 const struct pmap_devmap *pd;
323 paddr_t startpa, endpa, offset, pa;
324 vaddr_t va;
325
326 /*
327 * XXX: We are not configuring any decode windows for Armada XP
328 * at the moment. We rely on those that have been set by u-boot.
329 * Hence we don't want to mess around with decode windows,
330 * till we get full controll over them.
331 */
332
333 int tag = (int)space;
334
335 if (tag != 0) {
336 bus_addr_t remap;
337 uint32_t base;
338 int window;
339
340 window = mvsoc_target(tag, NULL, NULL, &base, NULL);
341 if (window == -1)
342 return ENOMEM;
343 if (window < nremap) {
344 remap = read_mlmbreg(MVSOC_MLMB_WRLR(window)) &
345 MVSOC_MLMB_WRLR_REMAP_MASK;
346 remap |=
347 (read_mlmbreg(MVSOC_MLMB_WRHR(window)) << 16) << 16;
348 address = address - remap + base;
349 }
350 }
351
352 if ((pd = pmap_devmap_find_pa(address, size)) != NULL) {
353 /* Device was statically mapped. */
354 *handlep = pd->pd_va + (address - pd->pd_pa);
355 return 0;
356 }
357
358 startpa = trunc_page(address);
359 endpa = round_page(address + size);
360 offset = address & PAGE_MASK;
361
362 /* XXX use extent manager to check duplicate mapping */
363
364 va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
365 UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
366 if (va == 0x00000000)
367 return ENOMEM;
368
369 *handlep = va + offset;
370
371 const int pmapflags =
372 (flags & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
373 ? 0
374 : PMAP_NOCACHE;
375
376 /* Now map the pages */
377 for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
378 pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
379 }
380 pmap_update(pmap_kernel());
381
382 return 0;
383 }
384
385 void
386 mvsoc_bs_unmap(void *space, bus_space_handle_t handle, bus_size_t size)
387 {
388 vaddr_t va, sz;
389
390 if (pmap_devmap_find_va(handle, size) != NULL)
391 /* Device was statically mapped; nothing to do. */
392 return;
393
394 va = trunc_page(handle);
395 sz = round_page(handle + size) - va;
396
397 pmap_kremove(va, sz);
398 pmap_update(pmap_kernel());
399 uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
400 }
401
402 /* ARGSUSED */
403 int
404 mvsoc_bs_subregion(void *space, bus_space_handle_t handle,
405 bus_size_t offset, bus_size_t size,
406 bus_space_handle_t *nhandlep)
407 {
408
409 *nhandlep = handle + offset;
410 return 0;
411 }
412
413 /* ARGSUSED */
414 int
415 mvsoc_bs_alloc(void *space, bus_addr_t reg_start, bus_addr_t reg_end,
416 bus_size_t size, bus_size_t alignment, bus_size_t boundary,
417 int flags, bus_addr_t *addrp, bus_space_handle_t *handlep)
418 {
419
420 panic("%s(): not implemented\n", __func__);
421 }
422
423 /* ARGSUSED */
424 void
425 mvsoc_bs_free(void *space, bus_space_handle_t handle, bus_size_t size)
426 {
427
428 panic("%s(): not implemented\n", __func__);
429 }
430
431 /* ARGSUSED */
432 void
433 mvsoc_bs_barrier(void *space, bus_space_handle_t handle, bus_size_t offset,
434 bus_size_t length, int flags)
435 {
436
437 /* Nothing to do. */
438 }
439
440 /* ARGSUSED */
441 void *
442 mvsoc_bs_vaddr(void *space, bus_space_handle_t handle)
443 {
444
445 return (void *)handle;
446 }
447