tegra_drm.h revision 1.6.2.2
1 1.6.2.2 skrll /* $NetBSD: tegra_drm.h,v 1.6.2.2 2015/12/27 12:09:31 skrll Exp $ */ 2 1.6.2.2 skrll 3 1.6.2.2 skrll /*- 4 1.6.2.2 skrll * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 1.6.2.2 skrll * All rights reserved. 6 1.6.2.2 skrll * 7 1.6.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.6.2.2 skrll * modification, are permitted provided that the following conditions 9 1.6.2.2 skrll * are met: 10 1.6.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.6.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.6.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.6.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.6.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.6.2.2 skrll * 16 1.6.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.6.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.6.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.6.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.6.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.6.2.2 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.6.2.2 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.6.2.2 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.6.2.2 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.6.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.6.2.2 skrll * SUCH DAMAGE. 27 1.6.2.2 skrll */ 28 1.6.2.2 skrll 29 1.6.2.2 skrll #ifndef _ARM_TEGRA_DRM_H 30 1.6.2.2 skrll #define _ARM_TEGRA_DRM_H 31 1.6.2.2 skrll 32 1.6.2.2 skrll #include <drm/drm_fb_helper.h> 33 1.6.2.2 skrll 34 1.6.2.2 skrll #define DRIVER_AUTHOR "Jared McNeill" 35 1.6.2.2 skrll 36 1.6.2.2 skrll #define DRIVER_NAME "tegra" 37 1.6.2.2 skrll #define DRIVER_DESC "NVIDIA Tegra K1" 38 1.6.2.2 skrll #define DRIVER_DATE "20151108" 39 1.6.2.2 skrll 40 1.6.2.2 skrll #define DRIVER_MAJOR 0 41 1.6.2.2 skrll #define DRIVER_MINOR 1 42 1.6.2.2 skrll #define DRIVER_PATCHLEVEL 0 43 1.6.2.2 skrll 44 1.6.2.2 skrll struct tegra_framebuffer; 45 1.6.2.2 skrll 46 1.6.2.2 skrll struct tegra_gem_object; 47 1.6.2.2 skrll 48 1.6.2.2 skrll struct tegra_drm_softc { 49 1.6.2.2 skrll device_t sc_dev; 50 1.6.2.2 skrll struct drm_device *sc_ddev; 51 1.6.2.2 skrll 52 1.6.2.2 skrll bus_space_tag_t sc_bst; 53 1.6.2.2 skrll bus_dma_tag_t sc_dmat; 54 1.6.2.2 skrll 55 1.6.2.2 skrll int sc_phandle; 56 1.6.2.2 skrll 57 1.6.2.2 skrll struct clk *sc_clk_host1x; 58 1.6.2.2 skrll struct fdtbus_reset *sc_rst_host1x; 59 1.6.2.2 skrll 60 1.6.2.2 skrll struct clk *sc_clk_dc[2]; 61 1.6.2.2 skrll struct clk *sc_clk_dc_parent[2]; 62 1.6.2.2 skrll struct fdtbus_reset *sc_rst_dc[2]; 63 1.6.2.2 skrll 64 1.6.2.2 skrll struct clk *sc_clk_hdmi; 65 1.6.2.2 skrll struct clk *sc_clk_hdmi_parent; 66 1.6.2.2 skrll struct fdtbus_reset *sc_rst_hdmi; 67 1.6.2.2 skrll 68 1.6.2.2 skrll i2c_tag_t sc_ddc; 69 1.6.2.2 skrll struct fdtbus_gpio_pin *sc_pin_hpd; 70 1.6.2.2 skrll 71 1.6.2.2 skrll bool sc_force_dvi; 72 1.6.2.2 skrll 73 1.6.2.2 skrll uint32_t sc_vbl_received[2]; 74 1.6.2.2 skrll }; 75 1.6.2.2 skrll 76 1.6.2.2 skrll struct tegra_drmfb_attach_args { 77 1.6.2.2 skrll struct drm_device *tfa_drm_dev; 78 1.6.2.2 skrll struct drm_fb_helper *tfa_fb_helper; 79 1.6.2.2 skrll struct drm_fb_helper_surface_size tfa_fb_sizes; 80 1.6.2.2 skrll bus_space_tag_t tfa_fb_bst; 81 1.6.2.2 skrll bus_dma_tag_t tfa_fb_dmat; 82 1.6.2.2 skrll }; 83 1.6.2.2 skrll 84 1.6.2.2 skrll struct tegra_crtc { 85 1.6.2.2 skrll struct drm_crtc base; 86 1.6.2.2 skrll bus_space_tag_t bst; 87 1.6.2.2 skrll bus_space_handle_t bsh; 88 1.6.2.2 skrll bus_size_t size; 89 1.6.2.2 skrll int intr; 90 1.6.2.2 skrll int index; 91 1.6.2.2 skrll void *ih; 92 1.6.2.2 skrll bool enabled; 93 1.6.2.2 skrll struct clk *clk_parent; 94 1.6.2.2 skrll 95 1.6.2.2 skrll struct tegra_gem_object *cursor_obj; 96 1.6.2.2 skrll int cursor_x; 97 1.6.2.2 skrll int cursor_y; 98 1.6.2.2 skrll }; 99 1.6.2.2 skrll 100 1.6.2.2 skrll struct tegra_encoder { 101 1.6.2.2 skrll struct drm_encoder base; 102 1.6.2.2 skrll bus_space_tag_t bst; 103 1.6.2.2 skrll bus_space_handle_t bsh; 104 1.6.2.2 skrll bus_size_t size; 105 1.6.2.2 skrll }; 106 1.6.2.2 skrll 107 1.6.2.2 skrll struct tegra_connector { 108 1.6.2.2 skrll struct drm_connector base; 109 1.6.2.2 skrll i2c_tag_t ddc; 110 1.6.2.2 skrll struct i2c_adapter *adapter; 111 1.6.2.2 skrll struct fdtbus_gpio_pin *hpd; 112 1.6.2.2 skrll 113 1.6.2.2 skrll bool has_hdmi_sink; 114 1.6.2.2 skrll bool has_audio; 115 1.6.2.2 skrll }; 116 1.6.2.2 skrll 117 1.6.2.2 skrll struct tegra_gem_object { 118 1.6.2.2 skrll struct drm_gem_object base; 119 1.6.2.2 skrll bus_dma_tag_t dmat; 120 1.6.2.2 skrll bus_dma_segment_t dmasegs[1]; 121 1.6.2.2 skrll bus_size_t dmasize; 122 1.6.2.2 skrll bus_dmamap_t dmamap; 123 1.6.2.2 skrll void *dmap; 124 1.6.2.2 skrll }; 125 1.6.2.2 skrll 126 1.6.2.2 skrll struct tegra_framebuffer { 127 1.6.2.2 skrll struct drm_framebuffer base; 128 1.6.2.2 skrll struct tegra_gem_object *obj; 129 1.6.2.2 skrll }; 130 1.6.2.2 skrll 131 1.6.2.2 skrll struct tegra_fbdev { 132 1.6.2.2 skrll struct drm_fb_helper helper; 133 1.6.2.2 skrll }; 134 1.6.2.2 skrll 135 1.6.2.2 skrll #define HDMI_READ(enc, reg) \ 136 1.6.2.2 skrll bus_space_read_4((enc)->bst, (enc)->bsh, (reg)) 137 1.6.2.2 skrll #define HDMI_WRITE(enc, reg, val) \ 138 1.6.2.2 skrll bus_space_write_4((enc)->bst, (enc)->bsh, (reg), (val)) 139 1.6.2.2 skrll #define HDMI_SET_CLEAR(enc, reg, set, clr) \ 140 1.6.2.2 skrll tegra_reg_set_clear((enc)->bst, (enc)->bsh, (reg), (set), (clr)) 141 1.6.2.2 skrll 142 1.6.2.2 skrll #define DC_READ(crtc, reg) \ 143 1.6.2.2 skrll bus_space_read_4((crtc)->bst, (crtc)->bsh, (reg)) 144 1.6.2.2 skrll #define DC_WRITE(crtc, reg, val) \ 145 1.6.2.2 skrll bus_space_write_4((crtc)->bst, (crtc)->bsh, (reg), (val)) 146 1.6.2.2 skrll #define DC_SET_CLEAR(crtc, reg, set, clr) \ 147 1.6.2.2 skrll tegra_reg_set_clear((crtc)->bst, (crtc)->bsh, (reg), (set), (clr)) 148 1.6.2.2 skrll 149 1.6.2.2 skrll #define TEGRA_DC_DEPTH 32 150 1.6.2.2 skrll 151 1.6.2.2 skrll #define tegra_drm_private(ddev) (ddev)->dev_private 152 1.6.2.2 skrll #define to_tegra_crtc(x) container_of(x, struct tegra_crtc, base) 153 1.6.2.2 skrll #define to_tegra_encoder(x) container_of(x, struct tegra_encoder, base) 154 1.6.2.2 skrll #define to_tegra_connector(x) container_of(x, struct tegra_connector, base) 155 1.6.2.2 skrll #define to_tegra_framebuffer(x) container_of(x, struct tegra_framebuffer, base) 156 1.6.2.2 skrll #define to_tegra_fbdev(x) container_of(x, struct tegra_fbdev, helper) 157 1.6.2.2 skrll #define to_tegra_gem_obj(x) container_of(x, struct tegra_gem_object, base) 158 1.6.2.2 skrll 159 1.6.2.2 skrll int tegra_drm_mode_init(struct drm_device *); 160 1.6.2.2 skrll int tegra_drm_fb_init(struct drm_device *); 161 1.6.2.2 skrll u32 tegra_drm_get_vblank_counter(struct drm_device *, int); 162 1.6.2.2 skrll int tegra_drm_enable_vblank(struct drm_device *, int); 163 1.6.2.2 skrll void tegra_drm_disable_vblank(struct drm_device *, int); 164 1.6.2.2 skrll int tegra_drm_framebuffer_init(struct drm_device *, 165 1.6.2.2 skrll struct tegra_framebuffer *); 166 1.6.2.2 skrll 167 1.6.2.2 skrll struct tegra_gem_object *tegra_drm_obj_alloc(struct drm_device *, size_t); 168 1.6.2.2 skrll void tegra_drm_obj_free(struct tegra_gem_object *); 169 1.6.2.2 skrll 170 1.6.2.2 skrll int tegra_drm_gem_fault(struct uvm_faultinfo *, vaddr_t, struct vm_page **, 171 1.6.2.2 skrll int, int, vm_prot_t, int); 172 1.6.2.2 skrll void tegra_drm_gem_free_object(struct drm_gem_object *); 173 1.6.2.2 skrll 174 1.6.2.2 skrll #endif /* _ARM_TEGRA_DRM_H */ 175
Indexes created Wed Oct 22 13:09:56 GMT 2025