tegra_drm.h revision 1.9 1 1.9 riastrad /* $NetBSD: tegra_drm.h,v 1.9 2018/08/27 15:31:51 riastradh Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #ifndef _ARM_TEGRA_DRM_H
30 1.1 jmcneill #define _ARM_TEGRA_DRM_H
31 1.1 jmcneill
32 1.1 jmcneill #include <drm/drm_fb_helper.h>
33 1.8 jmcneill #include <drm/drm_gem_cma_helper.h>
34 1.1 jmcneill
35 1.1 jmcneill #define DRIVER_AUTHOR "Jared McNeill"
36 1.1 jmcneill
37 1.1 jmcneill #define DRIVER_NAME "tegra"
38 1.1 jmcneill #define DRIVER_DESC "NVIDIA Tegra K1"
39 1.1 jmcneill #define DRIVER_DATE "20151108"
40 1.1 jmcneill
41 1.1 jmcneill #define DRIVER_MAJOR 0
42 1.1 jmcneill #define DRIVER_MINOR 1
43 1.1 jmcneill #define DRIVER_PATCHLEVEL 0
44 1.1 jmcneill
45 1.1 jmcneill struct tegra_framebuffer;
46 1.1 jmcneill
47 1.1 jmcneill struct tegra_drm_softc {
48 1.1 jmcneill device_t sc_dev;
49 1.1 jmcneill struct drm_device *sc_ddev;
50 1.1 jmcneill
51 1.1 jmcneill bus_space_tag_t sc_bst;
52 1.3 jmcneill bus_dma_tag_t sc_dmat;
53 1.1 jmcneill
54 1.5 jmcneill int sc_phandle;
55 1.5 jmcneill
56 1.6 jmcneill struct clk *sc_clk_host1x;
57 1.6 jmcneill struct fdtbus_reset *sc_rst_host1x;
58 1.6 jmcneill
59 1.6 jmcneill struct clk *sc_clk_dc[2];
60 1.6 jmcneill struct clk *sc_clk_dc_parent[2];
61 1.6 jmcneill struct fdtbus_reset *sc_rst_dc[2];
62 1.6 jmcneill
63 1.6 jmcneill struct clk *sc_clk_hdmi;
64 1.6 jmcneill struct clk *sc_clk_hdmi_parent;
65 1.6 jmcneill struct fdtbus_reset *sc_rst_hdmi;
66 1.6 jmcneill
67 1.5 jmcneill i2c_tag_t sc_ddc;
68 1.5 jmcneill struct fdtbus_gpio_pin *sc_pin_hpd;
69 1.5 jmcneill
70 1.1 jmcneill bool sc_force_dvi;
71 1.1 jmcneill
72 1.2 jmcneill uint32_t sc_vbl_received[2];
73 1.1 jmcneill };
74 1.1 jmcneill
75 1.1 jmcneill struct tegra_drmfb_attach_args {
76 1.1 jmcneill struct drm_device *tfa_drm_dev;
77 1.1 jmcneill struct drm_fb_helper *tfa_fb_helper;
78 1.1 jmcneill struct drm_fb_helper_surface_size tfa_fb_sizes;
79 1.1 jmcneill bus_space_tag_t tfa_fb_bst;
80 1.1 jmcneill bus_dma_tag_t tfa_fb_dmat;
81 1.7 maya uint32_t tfa_fb_linebytes;
82 1.1 jmcneill };
83 1.1 jmcneill
84 1.1 jmcneill struct tegra_crtc {
85 1.1 jmcneill struct drm_crtc base;
86 1.1 jmcneill bus_space_tag_t bst;
87 1.1 jmcneill bus_space_handle_t bsh;
88 1.1 jmcneill bus_size_t size;
89 1.1 jmcneill int intr;
90 1.1 jmcneill int index;
91 1.2 jmcneill void *ih;
92 1.4 jmcneill bool enabled;
93 1.6 jmcneill struct clk *clk_parent;
94 1.4 jmcneill
95 1.8 jmcneill struct drm_gem_cma_object *cursor_obj;
96 1.4 jmcneill int cursor_x;
97 1.4 jmcneill int cursor_y;
98 1.1 jmcneill };
99 1.1 jmcneill
100 1.1 jmcneill struct tegra_encoder {
101 1.1 jmcneill struct drm_encoder base;
102 1.1 jmcneill bus_space_tag_t bst;
103 1.1 jmcneill bus_space_handle_t bsh;
104 1.1 jmcneill bus_size_t size;
105 1.1 jmcneill };
106 1.1 jmcneill
107 1.1 jmcneill struct tegra_connector {
108 1.1 jmcneill struct drm_connector base;
109 1.5 jmcneill i2c_tag_t ddc;
110 1.3 jmcneill struct i2c_adapter *adapter;
111 1.5 jmcneill struct fdtbus_gpio_pin *hpd;
112 1.1 jmcneill
113 1.1 jmcneill bool has_hdmi_sink;
114 1.1 jmcneill bool has_audio;
115 1.1 jmcneill };
116 1.1 jmcneill
117 1.1 jmcneill struct tegra_framebuffer {
118 1.1 jmcneill struct drm_framebuffer base;
119 1.8 jmcneill struct drm_gem_cma_object *obj;
120 1.1 jmcneill };
121 1.1 jmcneill
122 1.1 jmcneill struct tegra_fbdev {
123 1.1 jmcneill struct drm_fb_helper helper;
124 1.1 jmcneill };
125 1.1 jmcneill
126 1.1 jmcneill #define HDMI_READ(enc, reg) \
127 1.1 jmcneill bus_space_read_4((enc)->bst, (enc)->bsh, (reg))
128 1.1 jmcneill #define HDMI_WRITE(enc, reg, val) \
129 1.1 jmcneill bus_space_write_4((enc)->bst, (enc)->bsh, (reg), (val))
130 1.1 jmcneill #define HDMI_SET_CLEAR(enc, reg, set, clr) \
131 1.1 jmcneill tegra_reg_set_clear((enc)->bst, (enc)->bsh, (reg), (set), (clr))
132 1.1 jmcneill
133 1.1 jmcneill #define DC_READ(crtc, reg) \
134 1.1 jmcneill bus_space_read_4((crtc)->bst, (crtc)->bsh, (reg))
135 1.1 jmcneill #define DC_WRITE(crtc, reg, val) \
136 1.1 jmcneill bus_space_write_4((crtc)->bst, (crtc)->bsh, (reg), (val))
137 1.1 jmcneill #define DC_SET_CLEAR(crtc, reg, set, clr) \
138 1.1 jmcneill tegra_reg_set_clear((crtc)->bst, (crtc)->bsh, (reg), (set), (clr))
139 1.1 jmcneill
140 1.1 jmcneill #define TEGRA_DC_DEPTH 32
141 1.1 jmcneill
142 1.1 jmcneill #define tegra_drm_private(ddev) (ddev)->dev_private
143 1.1 jmcneill #define to_tegra_crtc(x) container_of(x, struct tegra_crtc, base)
144 1.1 jmcneill #define to_tegra_encoder(x) container_of(x, struct tegra_encoder, base)
145 1.1 jmcneill #define to_tegra_connector(x) container_of(x, struct tegra_connector, base)
146 1.1 jmcneill #define to_tegra_framebuffer(x) container_of(x, struct tegra_framebuffer, base)
147 1.1 jmcneill #define to_tegra_fbdev(x) container_of(x, struct tegra_fbdev, helper)
148 1.1 jmcneill
149 1.1 jmcneill int tegra_drm_mode_init(struct drm_device *);
150 1.1 jmcneill int tegra_drm_fb_init(struct drm_device *);
151 1.9 riastrad u32 tegra_drm_get_vblank_counter(struct drm_device *, unsigned int);
152 1.9 riastrad int tegra_drm_enable_vblank(struct drm_device *, unsigned int);
153 1.9 riastrad void tegra_drm_disable_vblank(struct drm_device *, unsigned int);
154 1.3 jmcneill int tegra_drm_framebuffer_init(struct drm_device *,
155 1.3 jmcneill struct tegra_framebuffer *);
156 1.3 jmcneill
157 1.1 jmcneill #endif /* _ARM_TEGRA_DRM_H */
158