tegra_drm.h revision 1.7.14.2
1 /* $NetBSD: tegra_drm.h,v 1.7.14.2 2017/12/03 11:35:54 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _ARM_TEGRA_DRM_H 30 #define _ARM_TEGRA_DRM_H 31 32 #include <drm/drm_fb_helper.h> 33 34 #define DRIVER_AUTHOR "Jared McNeill" 35 36 #define DRIVER_NAME "tegra" 37 #define DRIVER_DESC "NVIDIA Tegra K1" 38 #define DRIVER_DATE "20151108" 39 40 #define DRIVER_MAJOR 0 41 #define DRIVER_MINOR 1 42 #define DRIVER_PATCHLEVEL 0 43 44 struct tegra_framebuffer; 45 46 struct tegra_gem_object; 47 48 struct tegra_drm_softc { 49 device_t sc_dev; 50 struct drm_device *sc_ddev; 51 52 bus_space_tag_t sc_bst; 53 bus_dma_tag_t sc_dmat; 54 55 int sc_phandle; 56 57 struct clk *sc_clk_host1x; 58 struct fdtbus_reset *sc_rst_host1x; 59 60 struct clk *sc_clk_dc[2]; 61 struct clk *sc_clk_dc_parent[2]; 62 struct fdtbus_reset *sc_rst_dc[2]; 63 64 struct clk *sc_clk_hdmi; 65 struct clk *sc_clk_hdmi_parent; 66 struct fdtbus_reset *sc_rst_hdmi; 67 68 i2c_tag_t sc_ddc; 69 struct fdtbus_gpio_pin *sc_pin_hpd; 70 71 bool sc_force_dvi; 72 73 uint32_t sc_vbl_received[2]; 74 }; 75 76 struct tegra_drmfb_attach_args { 77 struct drm_device *tfa_drm_dev; 78 struct drm_fb_helper *tfa_fb_helper; 79 struct drm_fb_helper_surface_size tfa_fb_sizes; 80 bus_space_tag_t tfa_fb_bst; 81 bus_dma_tag_t tfa_fb_dmat; 82 uint32_t tfa_fb_linebytes; 83 }; 84 85 struct tegra_crtc { 86 struct drm_crtc base; 87 bus_space_tag_t bst; 88 bus_space_handle_t bsh; 89 bus_size_t size; 90 int intr; 91 int index; 92 void *ih; 93 bool enabled; 94 struct clk *clk_parent; 95 96 struct tegra_gem_object *cursor_obj; 97 int cursor_x; 98 int cursor_y; 99 }; 100 101 struct tegra_encoder { 102 struct drm_encoder base; 103 bus_space_tag_t bst; 104 bus_space_handle_t bsh; 105 bus_size_t size; 106 }; 107 108 struct tegra_connector { 109 struct drm_connector base; 110 i2c_tag_t ddc; 111 struct i2c_adapter *adapter; 112 struct fdtbus_gpio_pin *hpd; 113 114 bool has_hdmi_sink; 115 bool has_audio; 116 }; 117 118 struct tegra_gem_object { 119 struct drm_gem_object base; 120 bus_dma_tag_t dmat; 121 bus_dma_segment_t dmasegs[1]; 122 bus_size_t dmasize; 123 bus_dmamap_t dmamap; 124 void *dmap; 125 }; 126 127 struct tegra_framebuffer { 128 struct drm_framebuffer base; 129 struct tegra_gem_object *obj; 130 }; 131 132 struct tegra_fbdev { 133 struct drm_fb_helper helper; 134 }; 135 136 #define HDMI_READ(enc, reg) \ 137 bus_space_read_4((enc)->bst, (enc)->bsh, (reg)) 138 #define HDMI_WRITE(enc, reg, val) \ 139 bus_space_write_4((enc)->bst, (enc)->bsh, (reg), (val)) 140 #define HDMI_SET_CLEAR(enc, reg, set, clr) \ 141 tegra_reg_set_clear((enc)->bst, (enc)->bsh, (reg), (set), (clr)) 142 143 #define DC_READ(crtc, reg) \ 144 bus_space_read_4((crtc)->bst, (crtc)->bsh, (reg)) 145 #define DC_WRITE(crtc, reg, val) \ 146 bus_space_write_4((crtc)->bst, (crtc)->bsh, (reg), (val)) 147 #define DC_SET_CLEAR(crtc, reg, set, clr) \ 148 tegra_reg_set_clear((crtc)->bst, (crtc)->bsh, (reg), (set), (clr)) 149 150 #define TEGRA_DC_DEPTH 32 151 152 #define tegra_drm_private(ddev) (ddev)->dev_private 153 #define to_tegra_crtc(x) container_of(x, struct tegra_crtc, base) 154 #define to_tegra_encoder(x) container_of(x, struct tegra_encoder, base) 155 #define to_tegra_connector(x) container_of(x, struct tegra_connector, base) 156 #define to_tegra_framebuffer(x) container_of(x, struct tegra_framebuffer, base) 157 #define to_tegra_fbdev(x) container_of(x, struct tegra_fbdev, helper) 158 #define to_tegra_gem_obj(x) container_of(x, struct tegra_gem_object, base) 159 160 int tegra_drm_mode_init(struct drm_device *); 161 int tegra_drm_fb_init(struct drm_device *); 162 u32 tegra_drm_get_vblank_counter(struct drm_device *, int); 163 int tegra_drm_enable_vblank(struct drm_device *, int); 164 void tegra_drm_disable_vblank(struct drm_device *, int); 165 int tegra_drm_framebuffer_init(struct drm_device *, 166 struct tegra_framebuffer *); 167 168 struct tegra_gem_object *tegra_drm_obj_alloc(struct drm_device *, size_t); 169 void tegra_drm_obj_free(struct tegra_gem_object *); 170 171 int tegra_drm_gem_fault(struct uvm_faultinfo *, vaddr_t, struct vm_page **, 172 int, int, vm_prot_t, int); 173 void tegra_drm_gem_free_object(struct drm_gem_object *); 174 175 #endif /* _ARM_TEGRA_DRM_H */ 176
Indexes created Tue Oct 21 15:09:54 GMT 2025