tegra_ehci.c revision 1.10
1 /* $NetBSD: tegra_ehci.c,v 1.10 2015/11/19 22:09:16 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "locators.h" 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: tegra_ehci.c,v 1.10 2015/11/19 22:09:16 jmcneill Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/device.h> 37 #include <sys/intr.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 41 #include <dev/usb/usb.h> 42 #include <dev/usb/usbdi.h> 43 #include <dev/usb/usbdivar.h> 44 #include <dev/usb/usb_mem.h> 45 #include <dev/usb/ehcireg.h> 46 #include <dev/usb/ehcivar.h> 47 48 #include <arm/nvidia/tegra_reg.h> 49 #include <arm/nvidia/tegra_var.h> 50 #include <arm/nvidia/tegra_usbreg.h> 51 52 #define TEGRA_EHCI_REG_OFFSET 0x100 53 54 static int tegra_ehci_match(device_t, cfdata_t, void *); 55 static void tegra_ehci_attach(device_t, device_t, void *); 56 57 static void tegra_ehci_init(struct ehci_softc *); 58 59 struct tegra_ehci_softc { 60 struct ehci_softc sc; 61 bus_space_tag_t sc_bst; 62 bus_space_handle_t sc_bsh; 63 void *sc_ih; 64 u_int sc_port; 65 66 device_t sc_usbphydev; 67 }; 68 69 static int tegra_ehci_port_status(struct ehci_softc *sc, uint32_t v, 70 int i); 71 72 CFATTACH_DECL2_NEW(tegra_ehci, sizeof(struct tegra_ehci_softc), 73 tegra_ehci_match, tegra_ehci_attach, NULL, 74 ehci_activate, NULL, ehci_childdet); 75 76 static int 77 tegra_ehci_match(device_t parent, cfdata_t cf, void *aux) 78 { 79 return 1; 80 } 81 82 static void 83 tegra_ehci_attach(device_t parent, device_t self, void *aux) 84 { 85 struct tegra_ehci_softc * const sc = device_private(self); 86 struct tegraio_attach_args * const tio = aux; 87 const struct tegra_locators * const loc = &tio->tio_loc; 88 struct tegrausbphy_attach_args tup; 89 int error; 90 91 sc->sc_bst = tio->tio_bst; 92 error = bus_space_map(sc->sc_bst, TEGRA_AHB_A2_BASE + loc->loc_offset, 93 loc->loc_size, 0, &sc->sc_bsh); 94 if (error) { 95 aprint_error(": couldn't map USB%d\n", loc->loc_port + 1); 96 return; 97 } 98 sc->sc_port = loc->loc_port; 99 100 sc->sc.sc_dev = self; 101 sc->sc.sc_bus.hci_private = &sc->sc; 102 sc->sc.sc_bus.dmatag = tio->tio_dmat; 103 sc->sc.sc_bus.usbrev = USBREV_2_0; 104 sc->sc.sc_ncomp = 0; 105 sc->sc.sc_flags = EHCIF_ETTF; 106 sc->sc.sc_id_vendor = 0x10de; 107 strlcpy(sc->sc.sc_vendor, "Tegra", sizeof(sc->sc.sc_vendor)); 108 sc->sc.sc_size = loc->loc_size - TEGRA_EHCI_REG_OFFSET; 109 sc->sc.iot = sc->sc_bst; 110 bus_space_subregion(sc->sc_bst, sc->sc_bsh, TEGRA_EHCI_REG_OFFSET, 111 sc->sc.sc_size, &sc->sc.ioh); 112 sc->sc.sc_vendor_init = tegra_ehci_init; 113 sc->sc.sc_vendor_port_status = tegra_ehci_port_status; 114 115 aprint_naive("\n"); 116 aprint_normal(": USB%d\n", loc->loc_port + 1); 117 118 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 119 120 sc->sc_ih = intr_establish(loc->loc_intr, IPL_USB, IST_LEVEL, 121 ehci_intr, &sc->sc); 122 if (sc->sc_ih == NULL) { 123 aprint_error_dev(self, "couldn't establish interrupt %d\n", 124 loc->loc_intr); 125 return; 126 } 127 aprint_normal_dev(self, "interrupting on irq %d\n", loc->loc_intr); 128 129 tup.tup_bst = sc->sc_bst; 130 tup.tup_bsh = sc->sc_bsh; 131 tup.tup_port = sc->sc_port; 132 sc->sc_usbphydev = config_found_ia(self, "tegrausbphybus", &tup, NULL); 133 134 error = ehci_init(&sc->sc); 135 if (error != USBD_NORMAL_COMPLETION) { 136 aprint_error_dev(self, "init failed, error = %d\n", error); 137 return; 138 } 139 140 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 141 } 142 143 static void 144 tegra_ehci_init(struct ehci_softc *esc) 145 { 146 struct tegra_ehci_softc * const sc = device_private(esc->sc_dev); 147 uint32_t usbmode; 148 149 usbmode = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 150 TEGRA_EHCI_USBMODE_REG); 151 152 const u_int cm = __SHIFTOUT(usbmode, TEGRA_EHCI_USBMODE_CM); 153 if (cm != TEGRA_EHCI_USBMODE_CM_HOST) { 154 aprint_verbose_dev(esc->sc_dev, "switching to host mode\n"); 155 usbmode &= ~TEGRA_EHCI_USBMODE_CM; 156 usbmode |= __SHIFTIN(TEGRA_EHCI_USBMODE_CM_HOST, 157 TEGRA_EHCI_USBMODE_CM); 158 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 159 TEGRA_EHCI_USBMODE_REG, usbmode); 160 } 161 162 /* Parallel transceiver select */ 163 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, 164 TEGRA_EHCI_HOSTPC1_DEVLC_REG, 165 __SHIFTIN(TEGRA_EHCI_HOSTPC1_DEVLC_PTS_UTMI, 166 TEGRA_EHCI_HOSTPC1_DEVLC_PTS), 167 TEGRA_EHCI_HOSTPC1_DEVLC_PTS | 168 TEGRA_EHCI_HOSTPC1_DEVLC_STS); 169 170 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TEGRA_EHCI_TXFILLTUNING_REG, 171 __SHIFTIN(0x10, TEGRA_EHCI_TXFILLTUNING_TXFIFOTHRES)); 172 } 173 174 static int 175 tegra_ehci_port_status(struct ehci_softc *ehci_sc, uint32_t v, int i) 176 { 177 struct tegra_ehci_softc * const sc = device_private(ehci_sc->sc_dev); 178 bus_space_tag_t iot = sc->sc_bst; 179 bus_space_handle_t ioh = sc->sc_bsh; 180 181 i &= ~(UPS_HIGH_SPEED|UPS_LOW_SPEED); 182 183 uint32_t val = bus_space_read_4(iot, ioh, 184 TEGRA_EHCI_HOSTPC1_DEVLC_REG); 185 186 switch (__SHIFTOUT(val, TEGRA_EHCI_HOSTPC1_DEVLC_PSPD)) { 187 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_FS: 188 i |= UPS_FULL_SPEED; 189 break; 190 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_LS: 191 i |= UPS_LOW_SPEED; 192 break; 193 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_HS: 194 default: 195 i |= UPS_HIGH_SPEED; 196 break; 197 } 198 return i; 199 } 200
Indexes created Thu Sep 25 16:09:42 GMT 2025