tegra_ehci.c revision 1.13
1 /* $NetBSD: tegra_ehci.c,v 1.13 2016/04/23 10:15:28 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: tegra_ehci.c,v 1.13 2016/04/23 10:15:28 skrll Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 39 #include <dev/usb/usb.h> 40 #include <dev/usb/usbdi.h> 41 #include <dev/usb/usbdivar.h> 42 #include <dev/usb/usb_mem.h> 43 #include <dev/usb/ehcireg.h> 44 #include <dev/usb/ehcivar.h> 45 46 #include <arm/nvidia/tegra_reg.h> 47 #include <arm/nvidia/tegra_var.h> 48 #include <arm/nvidia/tegra_usbreg.h> 49 50 #include <dev/fdt/fdtvar.h> 51 52 #define TEGRA_EHCI_REG_OFFSET 0x100 53 54 static int tegra_ehci_match(device_t, cfdata_t, void *); 55 static void tegra_ehci_attach(device_t, device_t, void *); 56 57 static void tegra_ehci_init(struct ehci_softc *); 58 59 struct tegra_ehci_softc { 60 struct ehci_softc sc; 61 bus_space_tag_t sc_bst; 62 bus_space_handle_t sc_bsh; 63 void *sc_ih; 64 }; 65 66 static int tegra_ehci_port_status(struct ehci_softc *sc, uint32_t v, 67 int i); 68 69 CFATTACH_DECL2_NEW(tegra_ehci, sizeof(struct tegra_ehci_softc), 70 tegra_ehci_match, tegra_ehci_attach, NULL, 71 ehci_activate, NULL, ehci_childdet); 72 73 static int 74 tegra_ehci_match(device_t parent, cfdata_t cf, void *aux) 75 { 76 const char * const compatible[] = { "nvidia,tegra124-ehci", NULL }; 77 struct fdt_attach_args * const faa = aux; 78 79 return of_match_compatible(faa->faa_phandle, compatible); 80 } 81 82 static void 83 tegra_ehci_attach(device_t parent, device_t self, void *aux) 84 { 85 struct tegra_ehci_softc * const sc = device_private(self); 86 struct fdt_attach_args * const faa = aux; 87 char intrstr[128]; 88 bus_addr_t addr; 89 bus_size_t size; 90 int error; 91 92 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 93 aprint_error(": couldn't get registers\n"); 94 return; 95 } 96 97 sc->sc_bst = faa->faa_bst; 98 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 99 if (error) { 100 aprint_error(": couldn't map USB\n"); 101 return; 102 } 103 104 sc->sc.sc_dev = self; 105 sc->sc.sc_bus.ub_hcpriv = &sc->sc; 106 sc->sc.sc_bus.ub_dmatag = faa->faa_dmat; 107 sc->sc.sc_bus.ub_revision = USBREV_2_0; 108 sc->sc.sc_ncomp = 0; 109 sc->sc.sc_flags = EHCIF_ETTF; 110 sc->sc.sc_id_vendor = 0x10de; 111 strlcpy(sc->sc.sc_vendor, "Tegra", sizeof(sc->sc.sc_vendor)); 112 sc->sc.sc_size = size - TEGRA_EHCI_REG_OFFSET; 113 sc->sc.iot = sc->sc_bst; 114 bus_space_subregion(sc->sc_bst, sc->sc_bsh, TEGRA_EHCI_REG_OFFSET, 115 sc->sc.sc_size, &sc->sc.ioh); 116 sc->sc.sc_vendor_init = tegra_ehci_init; 117 sc->sc.sc_vendor_port_status = tegra_ehci_port_status; 118 119 aprint_naive("\n"); 120 aprint_normal(": USB\n"); 121 122 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 123 124 if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) { 125 aprint_error_dev(self, "failed to decode interrupt\n"); 126 return; 127 } 128 129 sc->sc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_USB, IST_MPSAFE, 130 ehci_intr, &sc->sc); 131 if (sc->sc_ih == NULL) { 132 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 133 intrstr); 134 return; 135 } 136 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 137 138 error = ehci_init(&sc->sc); 139 if (error) { 140 aprint_error_dev(self, "init failed, error = %d\n", error); 141 return; 142 } 143 144 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 145 } 146 147 static void 148 tegra_ehci_init(struct ehci_softc *esc) 149 { 150 struct tegra_ehci_softc * const sc = device_private(esc->sc_dev); 151 uint32_t usbmode; 152 153 usbmode = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 154 TEGRA_EHCI_USBMODE_REG); 155 156 const u_int cm = __SHIFTOUT(usbmode, TEGRA_EHCI_USBMODE_CM); 157 if (cm != TEGRA_EHCI_USBMODE_CM_HOST) { 158 aprint_verbose_dev(esc->sc_dev, "switching to host mode\n"); 159 usbmode &= ~TEGRA_EHCI_USBMODE_CM; 160 usbmode |= __SHIFTIN(TEGRA_EHCI_USBMODE_CM_HOST, 161 TEGRA_EHCI_USBMODE_CM); 162 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 163 TEGRA_EHCI_USBMODE_REG, usbmode); 164 } 165 166 /* Parallel transceiver select */ 167 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, 168 TEGRA_EHCI_HOSTPC1_DEVLC_REG, 169 __SHIFTIN(TEGRA_EHCI_HOSTPC1_DEVLC_PTS_UTMI, 170 TEGRA_EHCI_HOSTPC1_DEVLC_PTS), 171 TEGRA_EHCI_HOSTPC1_DEVLC_PTS | 172 TEGRA_EHCI_HOSTPC1_DEVLC_STS); 173 174 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TEGRA_EHCI_TXFILLTUNING_REG, 175 __SHIFTIN(0x10, TEGRA_EHCI_TXFILLTUNING_TXFIFOTHRES)); 176 } 177 178 static int 179 tegra_ehci_port_status(struct ehci_softc *ehci_sc, uint32_t v, int i) 180 { 181 struct tegra_ehci_softc * const sc = device_private(ehci_sc->sc_dev); 182 bus_space_tag_t iot = sc->sc_bst; 183 bus_space_handle_t ioh = sc->sc_bsh; 184 185 i &= ~(UPS_HIGH_SPEED|UPS_LOW_SPEED); 186 187 uint32_t val = bus_space_read_4(iot, ioh, 188 TEGRA_EHCI_HOSTPC1_DEVLC_REG); 189 190 switch (__SHIFTOUT(val, TEGRA_EHCI_HOSTPC1_DEVLC_PSPD)) { 191 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_FS: 192 i |= UPS_FULL_SPEED; 193 break; 194 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_LS: 195 i |= UPS_LOW_SPEED; 196 break; 197 case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_HS: 198 default: 199 i |= UPS_HIGH_SPEED; 200 break; 201 } 202 return i; 203 } 204
Indexes created Tue Sep 23 14:10:03 GMT 2025