tegra_mpioreg.h revision 1.1 1 1.1 jmcneill /* $NetBSD: tegra_mpioreg.h,v 1.1 2015/05/07 23:55:11 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #ifndef _ARM_TEGRA_MPIOREG_H
30 1.1 jmcneill #define _ARM_TEGRA_MPIOREG_H
31 1.1 jmcneill
32 1.1 jmcneill #define PADGRP_GMACFG_REG 0x0900
33 1.1 jmcneill #define PADGRP_SDIO1CFG_REG 0x08ec
34 1.1 jmcneill #define PADGRP_SDIO3CFG_REG 0x08b0
35 1.1 jmcneill #define PADGRP_SDIO4CFG_REG 0x09c4
36 1.1 jmcneill #define PADGRP_AOCFG0_REG 0x09b0
37 1.1 jmcneill #define PADGRP_AOCFG1_REG 0x0868
38 1.1 jmcneill #define PADGRP_AOCFG2_REG 0x086c
39 1.1 jmcneill #define PADGRP_AOCFG3_REG 0x09a8
40 1.1 jmcneill #define PADGRP_AOCFG4_REG 0x09c8
41 1.1 jmcneill #define PADGRP_CDEV1CFG_REG 0x0884
42 1.1 jmcneill #define PADGRP_CDEV2CFG_REG 0x0888
43 1.1 jmcneill #define PADGRP_CECCFG_REG 0x0938
44 1.1 jmcneill #define PADGRP_DAP1CFG_REG 0x0890
45 1.1 jmcneill #define PADGRP_DAP2CFG_REG 0x0898
46 1.1 jmcneill #define PADGRP_DAP3CFG_REG 0x0890
47 1.1 jmcneill #define PADGRP_DAP4CFG_REG 0x089c
48 1.1 jmcneill #define PADGRP_DAP5CFG_REG 0x0998
49 1.1 jmcneill #define PADGRP_DBGCFG_REG 0x08a0
50 1.1 jmcneill #define PADGRP_DDCCFG_REG 0x08fc
51 1.1 jmcneill #define PADGRP_DEV3CFG_REG 0x092c
52 1.1 jmcneill #define PADGRP_OWRCFG_REG 0x0920
53 1.1 jmcneill #define PADGRP_SPICFG_REG 0x08b4
54 1.1 jmcneill #define PADGRP_UAACFG_REG 0x08b8
55 1.1 jmcneill #define PADGRP_UABCFG_REG 0x08bc
56 1.1 jmcneill #define PADGRP_UART2CFG_REG 0x08c0
57 1.1 jmcneill #define PADGRP_UART3CFG_REG 0x08c4
58 1.1 jmcneill #define PADGRP_UDACFG_REG 0x0924
59 1.1 jmcneill #define PADGRP_ATCFG1_REG 0x0870
60 1.1 jmcneill #define PADGRP_ATCFG2_REG 0x0874
61 1.1 jmcneill #define PADGRP_ATCFG3_REG 0x0878
62 1.1 jmcneill #define PADGRP_ATCFG4_REG 0x087c
63 1.1 jmcneill #define PADGRP_ATCFG5_REG 0x0880
64 1.1 jmcneill #define PADGRP_ATCFG6_REG 0x0894
65 1.1 jmcneill #define PADGRP_GMECFG_REG 0x0910
66 1.1 jmcneill #define PADGRP_GMFCFG_REG 0x0914
67 1.1 jmcneill #define PADGRP_GMGCFG_REG 0x0918
68 1.1 jmcneill #define PADGRP_GMHCFG_REG 0x091c
69 1.1 jmcneill #define PADGRP_HVCFG0_REG 0x09b4
70 1.1 jmcneill #define PADGRP_GPVCFG_REG 0x0928
71 1.1 jmcneill #define PADGRP_USB_VBUS_EN_CFG_REG 0x099c
72 1.1 jmcneill
73 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA0_REG 0x3000
74 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA1_REG 0x3004
75 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA2_REG 0x3008
76 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA3_REG 0x300c
77 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA4_REG 0x3010
78 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA5_REG 0x3014
79 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA6_REG 0x3018
80 1.1 jmcneill #define PINMUX_AUX_ULPI_DATA7_REG 0x301c
81 1.1 jmcneill #define PINMUX_AUX_ULPI_CLK_REG 0x3020
82 1.1 jmcneill #define PINMUX_AUX_ULPI_DIR_REG 0x3024
83 1.1 jmcneill #define PINMUX_AUX_ULPI_NXT_REG 0x3028
84 1.1 jmcneill #define PINMUX_AUX_ULPI_STP_REG 0x302c
85 1.1 jmcneill #define PINMUX_AUX_DAP3_FS_REG 0x3030
86 1.1 jmcneill #define PINMUX_AUX_DAP3_DIN_REG 0x3034
87 1.1 jmcneill #define PINMUX_AUX_DAP3_DOUT_REG 0x3038
88 1.1 jmcneill #define PINMUX_AUX_DAP3_SCLK_REG 0x303c
89 1.1 jmcneill #define PINMUX_AUX_GPIO_PV0_REG 0x3040
90 1.1 jmcneill #define PINMUX_AUX_GPIO_PV1_REG 0x3044
91 1.1 jmcneill #define PINMUX_AUX_SDMMC1_CLK_REG 0x3048
92 1.1 jmcneill #define PINMUX_AUX_SDMMC1_CMD_REG 0x304c
93 1.1 jmcneill #define PINMUX_AUX_SDMMC1_DAT3_REG 0x3050
94 1.1 jmcneill #define PINMUX_AUX_SDMMC1_DAT2_REG 0x3054
95 1.1 jmcneill #define PINMUX_AUX_SDMMC1_DAT1_REG 0x3058
96 1.1 jmcneill #define PINMUX_AUX_SDMMC1_DAT0_REG 0x305c
97 1.1 jmcneill #define PINMUX_AUX_CLK2_OUT_REG 0x3068
98 1.1 jmcneill #define PINMUX_AUX_CLK2_REQ_REG 0x306c
99 1.1 jmcneill #define PINMUX_AUX_HDMI_INT_REG 0x3110
100 1.1 jmcneill #define PINMUX_AUX_DDC_SCL_REG 0x3114
101 1.1 jmcneill #define PINMUX_AUX_DDC_SDA_REG 0x3118
102 1.1 jmcneill #define PINMUX_AUX_UART2_RXD_REG 0x3164
103 1.1 jmcneill #define PINMUX_AUX_UART2_TXD_REG 0x3168
104 1.1 jmcneill #define PINMUX_AUX_UART2_RTS_N_REG 0x316c
105 1.1 jmcneill #define PINMUX_AUX_UART2_CTS_N_REG 0x3170
106 1.1 jmcneill #define PINMUX_AUX_UART3_TXD_REG 0x3174
107 1.1 jmcneill #define PINMUX_AUX_UART3_RXD_REG 0x3178
108 1.1 jmcneill #define PINMUX_AUX_UART3_CTS_N_REG 0x317c
109 1.1 jmcneill #define PINMUX_AUX_UART3_RTS_N_REG 0x3180
110 1.1 jmcneill #define PINMUX_AUX_GPIO_PU0_REG 0x3184
111 1.1 jmcneill #define PINMUX_AUX_GPIO_PU1_REG 0x3188
112 1.1 jmcneill #define PINMUX_AUX_GPIO_PU2_REG 0x318c
113 1.1 jmcneill #define PINMUX_AUX_GPIO_PU3_REG 0x3190
114 1.1 jmcneill #define PINMUX_AUX_GPIO_PU4_REG 0x3194
115 1.1 jmcneill #define PINMUX_AUX_GPIO_PU5_REG 0x3198
116 1.1 jmcneill #define PINMUX_AUX_GPIO_PU6_REG 0x319c
117 1.1 jmcneill #define PINMUX_AUX_GEN1_I2C_SDA_REG 0x31a0
118 1.1 jmcneill #define PINMUX_AUX_GEN1_I2C_SCL_REG 0x31a4
119 1.1 jmcneill #define PINMUX_AUX_DAP4_FS_REG 0x31a8
120 1.1 jmcneill #define PINMUX_AUX_DAP4_DIN_REG 0x31ac
121 1.1 jmcneill #define PINMUX_AUX_DAP4_DOUT_REG 0x31b0
122 1.1 jmcneill #define PINMUX_AUX_DAP4_SCLK_REG 0x31b4
123 1.1 jmcneill #define PINMUX_AUX_CLK3_OUT_REG 0x31b8
124 1.1 jmcneill #define PINMUX_AUX_CLK3_REQ_REG 0x31bc
125 1.1 jmcneill #define PINMUX_AUX_GPIO_PC7_REG 0x31c0
126 1.1 jmcneill #define PINMUX_AUX_GPIO_PI5_REG 0x31c4
127 1.1 jmcneill #define PINMUX_AUX_GPIO_PI7_REG 0x31c8
128 1.1 jmcneill #define PINMUX_AUX_GPIO_PK0_REG 0x31cc
129 1.1 jmcneill #define PINMUX_AUX_GPIO_PK1_REG 0x31d0
130 1.1 jmcneill #define PINMUX_AUX_GPIO_PJ0_REG 0x31d4
131 1.1 jmcneill #define PINMUX_AUX_GPIO_PJ2_REG 0x31d8
132 1.1 jmcneill #define PINMUX_AUX_GPIO_PK3_REG 0x31dc
133 1.1 jmcneill #define PINMUX_AUX_GPIO_PK4_REG 0x31e0
134 1.1 jmcneill #define PINMUX_AUX_GPIO_PK2_REG 0x31e4
135 1.1 jmcneill #define PINMUX_AUX_GPIO_PI3_REG 0x31e8
136 1.1 jmcneill #define PINMUX_AUX_GPIO_PI6_REG 0x31ec
137 1.1 jmcneill #define PINMUX_AUX_GPIO_PG0_REG 0x31f0
138 1.1 jmcneill #define PINMUX_AUX_GPIO_PG1_REG 0x31f4
139 1.1 jmcneill #define PINMUX_AUX_GPIO_PG2_REG 0x31f8
140 1.1 jmcneill #define PINMUX_AUX_GPIO_PG3_REG 0x31fc
141 1.1 jmcneill #define PINMUX_AUX_GPIO_PG4_REG 0x3200
142 1.1 jmcneill #define PINMUX_AUX_GPIO_PG5_REG 0x3204
143 1.1 jmcneill #define PINMUX_AUX_GPIO_PG6_REG 0x3208
144 1.1 jmcneill #define PINMUX_AUX_GPIO_PG7_REG 0x320c
145 1.1 jmcneill #define PINMUX_AUX_GPIO_PH0_REG 0x3210
146 1.1 jmcneill #define PINMUX_AUX_GPIO_PH1_REG 0x3214
147 1.1 jmcneill #define PINMUX_AUX_GPIO_PH2_REG 0x3218
148 1.1 jmcneill #define PINMUX_AUX_GPIO_PH3_REG 0x321c
149 1.1 jmcneill #define PINMUX_AUX_GPIO_PH4_REG 0x3220
150 1.1 jmcneill #define PINMUX_AUX_GPIO_PH5_REG 0x3224
151 1.1 jmcneill #define PINMUX_AUX_GPIO_PH6_REG 0x3228
152 1.1 jmcneill #define PINMUX_AUX_GPIO_PH7_REG 0x322c
153 1.1 jmcneill #define PINMUX_AUX_GPIO_PJ7_REG 0x3230
154 1.1 jmcneill #define PINMUX_AUX_GPIO_PB0_REG 0x3234
155 1.1 jmcneill #define PINMUX_AUX_GPIO_PB1_REG 0x3238
156 1.1 jmcneill #define PINMUX_AUX_GPIO_PK7_REG 0x323c
157 1.1 jmcneill #define PINMUX_AUX_GPIO_PI0_REG 0x3240
158 1.1 jmcneill #define PINMUX_AUX_GPIO_PI1_REG 0x3244
159 1.1 jmcneill #define PINMUX_AUX_GPIO_PI2_REG 0x3248
160 1.1 jmcneill #define PINMUX_AUX_GPIO_PI4_REG 0x324c
161 1.1 jmcneill #define PINMUX_AUX_GEN2_I2C_SCL_REG 0x3250
162 1.1 jmcneill #define PINMUX_AUX_GEN2_I2C_SDA_REG 0x3254
163 1.1 jmcneill #define PINMUX_AUX_SDMMC4_CLK_REG 0x3258
164 1.1 jmcneill #define PINMUX_AUX_SDMMC4_CMD_REG 0x325c
165 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT0_REG 0x3260
166 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT1_REG 0x3264
167 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT2_REG 0x3268
168 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT3_REG 0x326c
169 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT4_REG 0x3270
170 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT5_REG 0x3274
171 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT6_REG 0x3278
172 1.1 jmcneill #define PINMUX_AUX_SDMMC4_DAT7_REG 0x327c
173 1.1 jmcneill #define PINMUX_AUX_CAM_MCLK_REG 0x3284
174 1.1 jmcneill #define PINMUX_AUX_GPIO_PCC1_REG 0x3288
175 1.1 jmcneill #define PINMUX_AUX_GPIO_PBB0_REG 0x328c
176 1.1 jmcneill #define PINMUX_AUX_CAM_I2C_SCL_REG 0x3290
177 1.1 jmcneill #define PINMUX_AUX_CAM_I2C_SDA_REG 0x3294
178 1.1 jmcneill #define PINMUX_AUX_GPIO_PBB3_REG 0x3298
179 1.1 jmcneill #define PINMUX_AUX_GPIO_PBB4_REG 0x329c
180 1.1 jmcneill #define PINMUX_AUX_GPIO_PBB5_REG 0x32a0
181 1.1 jmcneill #define PINMUX_AUX_GPIO_PBB6_REG 0x32a4
182 1.1 jmcneill #define PINMUX_AUX_GPIO_PBB7_REG 0x32a8
183 1.1 jmcneill #define PINMUX_AUX_GPIO_PCC2_REG 0x32ac
184 1.1 jmcneill #define PINMUX_AUX_JTAG_RTCK_REG 0x32b0
185 1.1 jmcneill #define PINMUX_AUX_PWR_I2C_SCL_REG 0x32b4
186 1.1 jmcneill #define PINMUX_AUX_PWR_I2C_SDA_REG 0x32b8
187 1.1 jmcneill #define PINMUX_AUX_KB_ROW0_REG 0x32bc
188 1.1 jmcneill #define PINMUX_AUX_KB_ROW1_REG 0x32c0
189 1.1 jmcneill #define PINMUX_AUX_KB_ROW2_REG 0x32c4
190 1.1 jmcneill #define PINMUX_AUX_KB_ROW3_REG 0x32c8
191 1.1 jmcneill #define PINMUX_AUX_KB_ROW4_REG 0x32cc
192 1.1 jmcneill #define PINMUX_AUX_KB_ROW5_REG 0x32d0
193 1.1 jmcneill #define PINMUX_AUX_KB_ROW6_REG 0x32d4
194 1.1 jmcneill #define PINMUX_AUX_KB_ROW7_REG 0x32d8
195 1.1 jmcneill #define PINMUX_AUX_KB_ROW8_REG 0x32dc
196 1.1 jmcneill #define PINMUX_AUX_KB_ROW9_REG 0x32e0
197 1.1 jmcneill #define PINMUX_AUX_KB_ROW10_REG 0x32e4
198 1.1 jmcneill #define PINMUX_AUX_KB_ROW11_REG 0x32e8
199 1.1 jmcneill #define PINMUX_AUX_KB_ROW12_REG 0x32ec
200 1.1 jmcneill #define PINMUX_AUX_KB_ROW13_REG 0x32f0
201 1.1 jmcneill #define PINMUX_AUX_KB_ROW14_REG 0x32f4
202 1.1 jmcneill #define PINMUX_AUX_KB_ROW15_REG 0x32f8
203 1.1 jmcneill #define PINMUX_AUX_KB_COL0_REG 0x32fc
204 1.1 jmcneill #define PINMUX_AUX_KB_COL1_REG 0x3300
205 1.1 jmcneill #define PINMUX_AUX_KB_COL2_REG 0x3304
206 1.1 jmcneill #define PINMUX_AUX_KB_COL3_REG 0x3308
207 1.1 jmcneill #define PINMUX_AUX_KB_COL4_REG 0x330c
208 1.1 jmcneill #define PINMUX_AUX_KB_COL5_REG 0x3310
209 1.1 jmcneill #define PINMUX_AUX_KB_COL6_REG 0x3314
210 1.1 jmcneill #define PINMUX_AUX_KB_COL7_REG 0x3318
211 1.1 jmcneill #define PINMUX_AUX_CLK_32K_OUT_REG 0x331c
212 1.1 jmcneill #define PINMUX_AUX_CORE_PWR_REQ_REG 0x3324
213 1.1 jmcneill #define PINMUX_AUX_CPU_PWR_REQ_REG 0x3328
214 1.1 jmcneill #define PINMUX_AUX_PWR_INT_N_REG 0x332c
215 1.1 jmcneill #define PINMUX_AUX_CLK_32K_IN_REG 0x3330
216 1.1 jmcneill #define PINMUX_AUX_OWR_REG 0x3334
217 1.1 jmcneill #define PINMUX_AUX_DAP1_FS_REG 0x3338
218 1.1 jmcneill #define PINMUX_AUX_DAP1_DIN_REG 0x333c
219 1.1 jmcneill #define PINMUX_AUX_DAP1_DOUT_REG 0x3340
220 1.1 jmcneill #define PINMUX_AUX_DAP1_SCLK_REG 0x3344
221 1.1 jmcneill #define PINMUX_AUX_DAP_MCLK1_REQ_REG 0x3348
222 1.1 jmcneill #define PINMUX_AUX_DAP_MCLK1_REG 0x334c
223 1.1 jmcneill #define PINMUX_AUX_SPDIF_IN_REG 0x3350
224 1.1 jmcneill #define PINMUX_AUX_SPDIF_OUT_REG 0x3354
225 1.1 jmcneill #define PINMUX_AUX_DAP2_FS_REG 0x3358
226 1.1 jmcneill #define PINMUX_AUX_DAP2_DIN_REG 0x335c
227 1.1 jmcneill #define PINMUX_AUX_DAP2_DOUT_REG 0x3360
228 1.1 jmcneill #define PINMUX_AUX_DAP2_SCLK_REG 0x3364
229 1.1 jmcneill #define PINMUX_AUX_DVFS_PWM_REG 0x3368
230 1.1 jmcneill #define PINMUX_AUX_GPIO_X1_AUD_REG 0x336c
231 1.1 jmcneill #define PINMUX_AUX_GPIO_X3_AUD_REG 0x3370
232 1.1 jmcneill #define PINMUX_AUX_DVFS_CLK_REG 0x3374
233 1.1 jmcneill #define PINMUX_AUX_GPIO_X4_AUD_REG 0x3378
234 1.1 jmcneill #define PINMUX_AUX_GPIO_X5_AUD_REG 0x337c
235 1.1 jmcneill #define PINMUX_AUX_GPIO_X6_AUD_REG 0x3380
236 1.1 jmcneill #define PINMUX_AUX_GPIO_X7_AUD_REG 0x3384
237 1.1 jmcneill #define PINMUX_AUX_SDMMC3_CLK_REG 0x3390
238 1.1 jmcneill #define PINMUX_AUX_SDMMC3_CMD_REG 0x3394
239 1.1 jmcneill #define PINMUX_AUX_SDMMC3_DAT0_REG 0x3398
240 1.1 jmcneill #define PINMUX_AUX_SDMMC3_DAT1_REG 0x339c
241 1.1 jmcneill #define PINMUX_AUX_SDMMC3_DAT2_REG 0x33a0
242 1.1 jmcneill #define PINMUX_AUX_SDMMC3_DAT3_REG 0x33a4
243 1.1 jmcneill #define PINMUX_AUX_PEX_L0_RST_N_REG 0x33bc
244 1.1 jmcneill #define PINMUX_AUX_PEX_L0_CLKREQ_N_REG 0x33c0
245 1.1 jmcneill #define PINMUX_AUX_PEX_WAKE_N_REG 0x33c4
246 1.1 jmcneill #define PINMUX_AUX_PEX_L1_RST_N_REG 0x33cc
247 1.1 jmcneill #define PINMUX_AUX_PEX_L1_CLKREQ_N_REG 0x33d0
248 1.1 jmcneill #define PINMUX_AUX_HDMI_CEC_REG 0x33e0
249 1.1 jmcneill #define PINMUX_AUX_SDMMC1_WP_N_REG 0x33e4
250 1.1 jmcneill #define PINMUX_AUX_SDMMC3_CD_N_REG 0x33e8
251 1.1 jmcneill #define PINMUX_AUX_GPIO_W2_AUD_REG 0x33ec
252 1.1 jmcneill #define PINMUX_AUX_GPIO_W3_AUD_REG 0x33f0
253 1.1 jmcneill #define PINMUX_AUX_USB_VBUS_EN0_REG 0x33f4
254 1.1 jmcneill #define PINMUX_AUX_USB_VBUS_EN1_REG 0x33f8
255 1.1 jmcneill #define PINMUX_AUX_SDMMC3_CLK_LB_IN_REG 0x33fc
256 1.1 jmcneill #define PINMUX_AUX_SDMMC3_CLK_LB_OUT_REG 0x3400
257 1.1 jmcneill #define PINMUX_AUX_GMI_CLK_LB_REG 0x3404
258 1.1 jmcneill #define PINMUX_AUX_RESET_OUT_N_REG 0x3408
259 1.1 jmcneill #define PINMUX_AUX_KB_ROW16_REG 0x340c
260 1.1 jmcneill #define PINMUX_AUX_KB_ROW17_REG 0x3410
261 1.1 jmcneill #define PINMUX_AUX_USB_VBUS_EN2_REG 0x3414
262 1.1 jmcneill #define PINMUX_AUX_GPIO_PFF2_REG 0x3418
263 1.1 jmcneill #define PINMUX_AUX_DP_HPD_REG 0x3430
264 1.1 jmcneill
265 1.1 jmcneill #define PINMUX_AUX_RCV_SEL __BIT(9)
266 1.1 jmcneill #define PINMUX_AUX_IO_RESET __BIT(8)
267 1.1 jmcneill #define PINMUX_AUX_LOCK __BIT(7)
268 1.1 jmcneill #define PINMUX_AUX_OD __BIT(6)
269 1.1 jmcneill #define PINMUX_AUX_E_INPUT __BIT(5)
270 1.1 jmcneill #define PINMUX_AUX_TRISTATE __BIT(4)
271 1.1 jmcneill #define PINMUX_AUX_PUPD __BITS(3,2)
272 1.1 jmcneill #define PINMUX_AUX_PUPD_NORMAL 0
273 1.1 jmcneill #define PINMUX_AUX_PUPD_PULL_DOWN 1
274 1.1 jmcneill #define PINMUX_AUX_PUPD_PULL_UP 2
275 1.1 jmcneill #define PINMUX_AUX_PM __BITS(1,0)
276 1.1 jmcneill
277 1.1 jmcneill #endif /* _ARM_TEGRA_MPIOREG_H */
278