1 1.10 thorpej /* $NetBSD: tegra_rtc.c,v 1.10 2025/09/08 13:06:16 thorpej Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 8 1.1 jmcneill * modification, are permitted provided that the following conditions 9 1.1 jmcneill * are met: 10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 11 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the 14 1.1 jmcneill * documentation and/or other materials provided with the distribution. 15 1.1 jmcneill * 16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 jmcneill * SUCH DAMAGE. 27 1.1 jmcneill */ 28 1.1 jmcneill 29 1.1 jmcneill #include <sys/cdefs.h> 30 1.10 thorpej __KERNEL_RCSID(0, "$NetBSD: tegra_rtc.c,v 1.10 2025/09/08 13:06:16 thorpej Exp $"); 31 1.1 jmcneill 32 1.1 jmcneill #include <sys/param.h> 33 1.1 jmcneill #include <sys/bus.h> 34 1.1 jmcneill #include <sys/device.h> 35 1.1 jmcneill #include <sys/intr.h> 36 1.1 jmcneill #include <sys/systm.h> 37 1.1 jmcneill #include <sys/kernel.h> 38 1.1 jmcneill #include <sys/kmem.h> 39 1.1 jmcneill 40 1.1 jmcneill #include <dev/clock_subr.h> 41 1.1 jmcneill 42 1.1 jmcneill #include <arm/nvidia/tegra_reg.h> 43 1.1 jmcneill #include <arm/nvidia/tegra_rtcreg.h> 44 1.1 jmcneill #include <arm/nvidia/tegra_var.h> 45 1.1 jmcneill 46 1.2 jmcneill #include <dev/fdt/fdtvar.h> 47 1.2 jmcneill 48 1.1 jmcneill static int tegra_rtc_match(device_t, cfdata_t, void *); 49 1.1 jmcneill static void tegra_rtc_attach(device_t, device_t, void *); 50 1.1 jmcneill 51 1.1 jmcneill struct tegra_rtc_softc { 52 1.1 jmcneill device_t sc_dev; 53 1.1 jmcneill bus_space_tag_t sc_bst; 54 1.1 jmcneill bus_space_handle_t sc_bsh; 55 1.1 jmcneill 56 1.1 jmcneill struct todr_chip_handle sc_todr; 57 1.1 jmcneill }; 58 1.1 jmcneill 59 1.1 jmcneill static int tegra_rtc_gettime(todr_chip_handle_t, struct timeval *); 60 1.1 jmcneill static int tegra_rtc_settime(todr_chip_handle_t, struct timeval *); 61 1.1 jmcneill 62 1.1 jmcneill CFATTACH_DECL_NEW(tegra_rtc, sizeof(struct tegra_rtc_softc), 63 1.1 jmcneill tegra_rtc_match, tegra_rtc_attach, NULL, NULL); 64 1.1 jmcneill 65 1.1 jmcneill #define RTC_READ(sc, reg) \ 66 1.1 jmcneill bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 67 1.1 jmcneill #define RTC_WRITE(sc, reg, val) \ 68 1.1 jmcneill bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 69 1.1 jmcneill 70 1.8 thorpej static const struct device_compatible_entry compat_data[] = { 71 1.8 thorpej { .compat = "nvidia,tegra210-rtc" }, 72 1.8 thorpej { .compat = "nvidia,tegra124-rtc" }, 73 1.8 thorpej { .compat = "nvidia,tegra20-rtc" }, 74 1.8 thorpej DEVICE_COMPAT_EOL 75 1.8 thorpej }; 76 1.8 thorpej 77 1.1 jmcneill static int 78 1.1 jmcneill tegra_rtc_match(device_t parent, cfdata_t cf, void *aux) 79 1.1 jmcneill { 80 1.2 jmcneill struct fdt_attach_args * const faa = aux; 81 1.2 jmcneill 82 1.8 thorpej return of_compatible_match(faa->faa_phandle, compat_data); 83 1.1 jmcneill } 84 1.1 jmcneill 85 1.1 jmcneill static void 86 1.1 jmcneill tegra_rtc_attach(device_t parent, device_t self, void *aux) 87 1.1 jmcneill { 88 1.1 jmcneill struct tegra_rtc_softc * const sc = device_private(self); 89 1.2 jmcneill struct fdt_attach_args * const faa = aux; 90 1.2 jmcneill bus_addr_t addr; 91 1.2 jmcneill bus_size_t size; 92 1.2 jmcneill int error; 93 1.2 jmcneill 94 1.2 jmcneill if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 95 1.2 jmcneill aprint_error(": couldn't get registers\n"); 96 1.2 jmcneill return; 97 1.2 jmcneill } 98 1.1 jmcneill 99 1.1 jmcneill sc->sc_dev = self; 100 1.2 jmcneill sc->sc_bst = faa->faa_bst; 101 1.2 jmcneill error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 102 1.2 jmcneill if (error) { 103 1.7 skrll aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, error); 104 1.2 jmcneill return; 105 1.2 jmcneill } 106 1.1 jmcneill 107 1.1 jmcneill aprint_naive("\n"); 108 1.1 jmcneill aprint_normal(": RTC\n"); 109 1.1 jmcneill 110 1.1 jmcneill sc->sc_todr.todr_gettime = tegra_rtc_gettime; 111 1.1 jmcneill sc->sc_todr.todr_settime = tegra_rtc_settime; 112 1.9 thorpej sc->sc_todr.todr_dev = self; 113 1.10 thorpej todr_attach(&sc->sc_todr); 114 1.1 jmcneill } 115 1.1 jmcneill 116 1.1 jmcneill static int 117 1.1 jmcneill tegra_rtc_gettime(todr_chip_handle_t tch, struct timeval *tv) 118 1.1 jmcneill { 119 1.9 thorpej struct tegra_rtc_softc * const sc = device_private(tch->todr_dev); 120 1.1 jmcneill 121 1.1 jmcneill tv->tv_sec = RTC_READ(sc, RTC_SECONDS_REG); 122 1.1 jmcneill tv->tv_usec = 0; 123 1.1 jmcneill 124 1.1 jmcneill return 0; 125 1.1 jmcneill } 126 1.1 jmcneill 127 1.1 jmcneill static int 128 1.1 jmcneill tegra_rtc_settime(todr_chip_handle_t tch, struct timeval *tv) 129 1.1 jmcneill { 130 1.9 thorpej struct tegra_rtc_softc * const sc = device_private(tch->todr_dev); 131 1.1 jmcneill int retry = 500; 132 1.1 jmcneill 133 1.1 jmcneill while (--retry > 0) { 134 1.1 jmcneill if ((RTC_READ(sc, RTC_BUSY_REG) & RTC_BUSY_STATUS) == 0) 135 1.1 jmcneill break; 136 1.1 jmcneill delay(1); 137 1.1 jmcneill } 138 1.1 jmcneill if (retry == 0) { 139 1.1 jmcneill device_printf(sc->sc_dev, "RTC write failed (BUSY)\n"); 140 1.1 jmcneill return ETIMEDOUT; 141 1.1 jmcneill } 142 1.1 jmcneill 143 1.1 jmcneill RTC_WRITE(sc, RTC_SECONDS_REG, tv->tv_sec); 144 1.1 jmcneill 145 1.1 jmcneill return 0; 146 1.1 jmcneill } 147