tegra_rtc.c revision 1.1 1 1.1 jmcneill /* $NetBSD: tegra_rtc.c,v 1.1 2015/05/05 00:25:44 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include "locators.h"
30 1.1 jmcneill
31 1.1 jmcneill #include <sys/cdefs.h>
32 1.1 jmcneill __KERNEL_RCSID(0, "$NetBSD: tegra_rtc.c,v 1.1 2015/05/05 00:25:44 jmcneill Exp $");
33 1.1 jmcneill
34 1.1 jmcneill #include <sys/param.h>
35 1.1 jmcneill #include <sys/bus.h>
36 1.1 jmcneill #include <sys/device.h>
37 1.1 jmcneill #include <sys/intr.h>
38 1.1 jmcneill #include <sys/systm.h>
39 1.1 jmcneill #include <sys/kernel.h>
40 1.1 jmcneill #include <sys/kmem.h>
41 1.1 jmcneill
42 1.1 jmcneill #include <dev/clock_subr.h>
43 1.1 jmcneill
44 1.1 jmcneill #include <arm/nvidia/tegra_reg.h>
45 1.1 jmcneill #include <arm/nvidia/tegra_rtcreg.h>
46 1.1 jmcneill #include <arm/nvidia/tegra_var.h>
47 1.1 jmcneill
48 1.1 jmcneill static int tegra_rtc_match(device_t, cfdata_t, void *);
49 1.1 jmcneill static void tegra_rtc_attach(device_t, device_t, void *);
50 1.1 jmcneill
51 1.1 jmcneill struct tegra_rtc_softc {
52 1.1 jmcneill device_t sc_dev;
53 1.1 jmcneill bus_space_tag_t sc_bst;
54 1.1 jmcneill bus_space_handle_t sc_bsh;
55 1.1 jmcneill
56 1.1 jmcneill struct todr_chip_handle sc_todr;
57 1.1 jmcneill };
58 1.1 jmcneill
59 1.1 jmcneill static int tegra_rtc_gettime(todr_chip_handle_t, struct timeval *);
60 1.1 jmcneill static int tegra_rtc_settime(todr_chip_handle_t, struct timeval *);
61 1.1 jmcneill
62 1.1 jmcneill CFATTACH_DECL_NEW(tegra_rtc, sizeof(struct tegra_rtc_softc),
63 1.1 jmcneill tegra_rtc_match, tegra_rtc_attach, NULL, NULL);
64 1.1 jmcneill
65 1.1 jmcneill #define RTC_READ(sc, reg) \
66 1.1 jmcneill bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
67 1.1 jmcneill #define RTC_WRITE(sc, reg, val) \
68 1.1 jmcneill bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
69 1.1 jmcneill
70 1.1 jmcneill static int
71 1.1 jmcneill tegra_rtc_match(device_t parent, cfdata_t cf, void *aux)
72 1.1 jmcneill {
73 1.1 jmcneill return 1;
74 1.1 jmcneill }
75 1.1 jmcneill
76 1.1 jmcneill static void
77 1.1 jmcneill tegra_rtc_attach(device_t parent, device_t self, void *aux)
78 1.1 jmcneill {
79 1.1 jmcneill struct tegra_rtc_softc * const sc = device_private(self);
80 1.1 jmcneill struct tegraio_attach_args * const tio = aux;
81 1.1 jmcneill const struct tegra_locators * const loc = &tio->tio_loc;
82 1.1 jmcneill
83 1.1 jmcneill sc->sc_dev = self;
84 1.1 jmcneill sc->sc_bst = tio->tio_bst;
85 1.1 jmcneill bus_space_subregion(tio->tio_bst, tio->tio_bsh,
86 1.1 jmcneill loc->loc_offset, loc->loc_size, &sc->sc_bsh);
87 1.1 jmcneill
88 1.1 jmcneill aprint_naive("\n");
89 1.1 jmcneill aprint_normal(": RTC\n");
90 1.1 jmcneill
91 1.1 jmcneill sc->sc_todr.todr_gettime = tegra_rtc_gettime;
92 1.1 jmcneill sc->sc_todr.todr_settime = tegra_rtc_settime;
93 1.1 jmcneill sc->sc_todr.cookie = sc;
94 1.1 jmcneill todr_attach(&sc->sc_todr);
95 1.1 jmcneill }
96 1.1 jmcneill
97 1.1 jmcneill static int
98 1.1 jmcneill tegra_rtc_gettime(todr_chip_handle_t tch, struct timeval *tv)
99 1.1 jmcneill {
100 1.1 jmcneill struct tegra_rtc_softc * const sc = tch->cookie;
101 1.1 jmcneill
102 1.1 jmcneill tv->tv_sec = RTC_READ(sc, RTC_SECONDS_REG);
103 1.1 jmcneill tv->tv_usec = 0;
104 1.1 jmcneill
105 1.1 jmcneill return 0;
106 1.1 jmcneill }
107 1.1 jmcneill
108 1.1 jmcneill static int
109 1.1 jmcneill tegra_rtc_settime(todr_chip_handle_t tch, struct timeval *tv)
110 1.1 jmcneill {
111 1.1 jmcneill struct tegra_rtc_softc * const sc = tch->cookie;
112 1.1 jmcneill int retry = 500;
113 1.1 jmcneill
114 1.1 jmcneill while (--retry > 0) {
115 1.1 jmcneill if ((RTC_READ(sc, RTC_BUSY_REG) & RTC_BUSY_STATUS) == 0)
116 1.1 jmcneill break;
117 1.1 jmcneill delay(1);
118 1.1 jmcneill }
119 1.1 jmcneill if (retry == 0) {
120 1.1 jmcneill device_printf(sc->sc_dev, "RTC write failed (BUSY)\n");
121 1.1 jmcneill return ETIMEDOUT;
122 1.1 jmcneill }
123 1.1 jmcneill
124 1.1 jmcneill RTC_WRITE(sc, RTC_SECONDS_REG, tv->tv_sec);
125 1.1 jmcneill
126 1.1 jmcneill return 0;
127 1.1 jmcneill }
128