tegra_rtcreg.h revision 1.1 1 1.1 jmcneill /* $NetBSD: tegra_rtcreg.h,v 1.1 2015/05/05 00:25:44 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #ifndef _ARM_TEGRA_RTCREG_H
30 1.1 jmcneill #define _ARM_TEGRA_RTCREG_H
31 1.1 jmcneill
32 1.1 jmcneill #define RTC_CONTROL_REG 0x00
33 1.1 jmcneill #define RTC_BUSY_REG 0x04
34 1.1 jmcneill #define RTC_SECONDS_REG 0x08
35 1.1 jmcneill #define RTC_SHADOW_SECONDS_REG 0x0c
36 1.1 jmcneill #define RTC_MILLI_SECONDS_REG 0x10
37 1.1 jmcneill #define RTC_SECONDS_ALARM0_REG 0x14
38 1.1 jmcneill #define RTC_SECONDS_ALARM1_REG 0x18
39 1.1 jmcneill #define RTC_MILLI_SECONDS_ALARM_REG 0x1c
40 1.1 jmcneill #define RTC_SECONDS_COUNTDOWN_ALARM_REG 0x20
41 1.1 jmcneill #define RTC_MILLI_SECONDS_COUNTDOW_ALARM_REG 0x24
42 1.1 jmcneill #define RTC_INTR_MASK_REG 0x28
43 1.1 jmcneill #define RTC_INTR_STATUS_REG 0x2c
44 1.1 jmcneill #define RTC_INTR_SOURCE_REG 0x30
45 1.1 jmcneill #define RTC_INTR_SET_REG 0x34
46 1.1 jmcneill #define RTC_CORRECTION_FACTOR_REG 0x38
47 1.1 jmcneill
48 1.1 jmcneill #define RTC_BUSY_STATUS __BIT(0)
49 1.1 jmcneill
50 1.1 jmcneill #endif /* _ARM_TEGRA_RTCREG_H */
51