tegra_soc.c revision 1.16 1 1.16 jmcneill /* $NetBSD: tegra_soc.c,v 1.16 2018/09/24 22:22:16 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include "opt_tegra.h"
30 1.1 jmcneill #include "opt_multiprocessor.h"
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/cdefs.h>
33 1.16 jmcneill __KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.16 2018/09/24 22:22:16 jmcneill Exp $");
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/param.h>
36 1.1 jmcneill #include <sys/bus.h>
37 1.1 jmcneill #include <sys/cpu.h>
38 1.1 jmcneill #include <sys/device.h>
39 1.1 jmcneill
40 1.1 jmcneill #include <uvm/uvm_extern.h>
41 1.1 jmcneill
42 1.1 jmcneill #include <arm/bootconfig.h>
43 1.1 jmcneill #include <arm/cpufunc.h>
44 1.1 jmcneill
45 1.1 jmcneill #include <arm/nvidia/tegra_reg.h>
46 1.1 jmcneill #include <arm/nvidia/tegra_apbreg.h>
47 1.1 jmcneill #include <arm/nvidia/tegra_mcreg.h>
48 1.1 jmcneill #include <arm/nvidia/tegra_var.h>
49 1.1 jmcneill
50 1.3 jmcneill bus_space_handle_t tegra_ppsb_bsh;
51 1.1 jmcneill bus_space_handle_t tegra_apb_bsh;
52 1.1 jmcneill
53 1.1 jmcneill void
54 1.1 jmcneill tegra_bootstrap(void)
55 1.1 jmcneill {
56 1.15 ryo extern struct bus_space arm_generic_bs_tag;
57 1.15 ryo bus_space_tag_t bst = &arm_generic_bs_tag;
58 1.15 ryo
59 1.15 ryo if (bus_space_map(bst, TEGRA_PPSB_BASE, TEGRA_PPSB_SIZE, 0,
60 1.3 jmcneill &tegra_ppsb_bsh) != 0)
61 1.3 jmcneill panic("couldn't map PPSB");
62 1.15 ryo if (bus_space_map(bst, TEGRA_APB_BASE, TEGRA_APB_SIZE, 0,
63 1.3 jmcneill &tegra_apb_bsh) != 0)
64 1.3 jmcneill panic("couldn't map APB");
65 1.1 jmcneill }
66