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imx6_ccm.c revision 1.3
      1  1.3  bouyer /*	$NetBSD: imx6_ccm.c,v 1.3 2023/04/14 17:45:59 bouyer Exp $	*/
      2  1.1   skrll 
      3  1.1   skrll /*
      4  1.1   skrll  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
      5  1.1   skrll  * Written by Hashimoto Kenichi for Genetec Corporation.
      6  1.1   skrll  *
      7  1.1   skrll  * Redistribution and use in source and binary forms, with or without
      8  1.1   skrll  * modification, are permitted provided that the following conditions
      9  1.1   skrll  * are met:
     10  1.1   skrll  * 1. Redistributions of source code must retain the above copyright
     11  1.1   skrll  *    notice, this list of conditions and the following disclaimer.
     12  1.1   skrll  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1   skrll  *    notice, this list of conditions and the following disclaimer in the
     14  1.1   skrll  *    documentation and/or other materials provided with the distribution.
     15  1.1   skrll  *
     16  1.1   skrll  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     17  1.1   skrll  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  1.1   skrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  1.1   skrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     20  1.1   skrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  1.1   skrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  1.1   skrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  1.1   skrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  1.1   skrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  1.1   skrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  1.1   skrll  * POSSIBILITY OF SUCH DAMAGE.
     27  1.1   skrll  */
     28  1.1   skrll /*
     29  1.1   skrll  * Clock Controller Module (CCM) for i.MX6
     30  1.1   skrll  */
     31  1.1   skrll 
     32  1.1   skrll #include <sys/cdefs.h>
     33  1.3  bouyer __KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.3 2023/04/14 17:45:59 bouyer Exp $");
     34  1.1   skrll 
     35  1.1   skrll #include "opt_imx.h"
     36  1.1   skrll #include "opt_cputypes.h"
     37  1.1   skrll 
     38  1.1   skrll #include "locators.h"
     39  1.1   skrll 
     40  1.1   skrll #include <sys/types.h>
     41  1.1   skrll #include <sys/time.h>
     42  1.1   skrll #include <sys/bus.h>
     43  1.1   skrll #include <sys/device.h>
     44  1.1   skrll #include <sys/sysctl.h>
     45  1.1   skrll #include <sys/cpufreq.h>
     46  1.1   skrll #include <sys/param.h>
     47  1.1   skrll 
     48  1.1   skrll #include <machine/cpu.h>
     49  1.1   skrll 
     50  1.1   skrll #include <arm/nxp/imx6_ccmvar.h>
     51  1.1   skrll #include <arm/nxp/imx6_ccmreg.h>
     52  1.1   skrll 
     53  1.1   skrll #include <dev/clk/clk_backend.h>
     54  1.1   skrll 
     55  1.1   skrll static void imxccm_init_clocks(struct imx6ccm_softc *);
     56  1.1   skrll static struct clk *imxccm_clk_get(void *, const char *);
     57  1.1   skrll static void imxccm_clk_put(void *, struct clk *);
     58  1.1   skrll static u_int imxccm_clk_get_rate(void *, struct clk *);
     59  1.1   skrll static int imxccm_clk_set_rate(void *, struct clk *, u_int);
     60  1.1   skrll static int imxccm_clk_enable(void *, struct clk *);
     61  1.1   skrll static int imxccm_clk_disable(void *, struct clk *);
     62  1.1   skrll static int imxccm_clk_set_parent(void *, struct clk *, struct clk *);
     63  1.1   skrll static struct clk *imxccm_clk_get_parent(void *, struct clk *);
     64  1.1   skrll 
     65  1.1   skrll static const struct clk_funcs imxccm_clk_funcs = {
     66  1.1   skrll 	.get = imxccm_clk_get,
     67  1.1   skrll 	.put = imxccm_clk_put,
     68  1.1   skrll 	.get_rate = imxccm_clk_get_rate,
     69  1.1   skrll 	.set_rate = imxccm_clk_set_rate,
     70  1.1   skrll 	.enable = imxccm_clk_enable,
     71  1.1   skrll 	.disable = imxccm_clk_disable,
     72  1.1   skrll 	.set_parent = imxccm_clk_set_parent,
     73  1.1   skrll 	.get_parent = imxccm_clk_get_parent,
     74  1.1   skrll };
     75  1.1   skrll 
     76  1.1   skrll void
     77  1.3  bouyer imx6ccm_attach_common(device_t self, struct imx6_clk *imx6_clks, int size)
     78  1.1   skrll {
     79  1.1   skrll 	struct imx6ccm_softc * const sc = device_private(self);
     80  1.1   skrll 
     81  1.1   skrll 	sc->sc_dev = self;
     82  1.3  bouyer 	sc->sc_imx6_clks = imx6_clks;
     83  1.3  bouyer 	sc->sc_imx6_clksize = size;
     84  1.1   skrll 
     85  1.1   skrll 	sc->sc_clkdom.name = device_xname(self);
     86  1.1   skrll 	sc->sc_clkdom.funcs = &imxccm_clk_funcs;
     87  1.1   skrll 	sc->sc_clkdom.priv = sc;
     88  1.3  bouyer 	for (u_int n = 0; n < size; n++) {
     89  1.1   skrll 		imx6_clks[n].base.domain = &sc->sc_clkdom;
     90  1.1   skrll 		clk_attach(&imx6_clks[n].base);
     91  1.1   skrll 	}
     92  1.1   skrll 
     93  1.1   skrll 	imxccm_init_clocks(sc);
     94  1.1   skrll 
     95  1.3  bouyer 	for (int n = 0; n < size; n++) {
     96  1.1   skrll 		struct clk *clk = &imx6_clks[n].base;
     97  1.1   skrll 		struct clk *clk_parent = clk_get_parent(clk);
     98  1.1   skrll 		const char *parent_str = clk_parent ? clk_parent->name : "none";
     99  1.1   skrll 		aprint_verbose_dev(self, "%s (%s) : %u Hz\n", clk->name,
    100  1.1   skrll 		    parent_str, clk_get_rate(clk));
    101  1.1   skrll 	}
    102  1.1   skrll }
    103  1.1   skrll 
    104  1.1   skrll struct clk *
    105  1.3  bouyer imx6_get_clock(struct imx6ccm_softc *sc, const char *name)
    106  1.1   skrll {
    107  1.1   skrll 	struct imx6_clk *iclk;
    108  1.3  bouyer 	iclk = imx6_clk_find(sc, name);
    109  1.1   skrll 
    110  1.1   skrll 	if (iclk == NULL)
    111  1.1   skrll 		return NULL;
    112  1.1   skrll 
    113  1.1   skrll 	return &iclk->base;
    114  1.1   skrll }
    115  1.1   skrll 
    116  1.3  bouyer struct imx6_clk *
    117  1.3  bouyer imx6_clk_find(struct imx6ccm_softc *sc, const char *name)
    118  1.1   skrll {
    119  1.1   skrll 	if (name == NULL)
    120  1.1   skrll 		return NULL;
    121  1.1   skrll 
    122  1.3  bouyer 	for (int n = 0; n < sc->sc_imx6_clksize; n++) {
    123  1.3  bouyer 		if (strcmp(sc->sc_imx6_clks[n].base.name, name) == 0)
    124  1.3  bouyer 			return &sc->sc_imx6_clks[n];
    125  1.1   skrll 	}
    126  1.1   skrll 
    127  1.1   skrll 	return NULL;
    128  1.1   skrll }
    129  1.1   skrll 
    130  1.1   skrll struct imxccm_init_parent {
    131  1.1   skrll 	const char *clock;
    132  1.1   skrll 	const char *parent;
    133  1.1   skrll } imxccm_init_parents[] = {
    134  1.1   skrll 	{ "pll1_bypass",	"pll1" },
    135  1.1   skrll 	{ "pll2_bypass",	"pll2" },
    136  1.1   skrll 	{ "pll3_bypass",	"pll3" },
    137  1.1   skrll 	{ "pll4_bypass",	"pll4" },
    138  1.1   skrll 	{ "pll5_bypass",	"pll5" },
    139  1.1   skrll 	{ "pll6_bypass",	"pll6" },
    140  1.1   skrll 	{ "pll7_bypass",	"pll7" },
    141  1.1   skrll 	{ "lvds1_sel",		"sata_ref_100m" },
    142  1.1   skrll };
    143  1.1   skrll 
    144  1.1   skrll static void
    145  1.1   skrll imxccm_init_clocks(struct imx6ccm_softc *sc)
    146  1.1   skrll {
    147  1.1   skrll 	struct clk *clk;
    148  1.1   skrll 	struct clk *clk_parent;
    149  1.1   skrll 
    150  1.1   skrll 	for (u_int n = 0; n < __arraycount(imxccm_init_parents); n++) {
    151  1.1   skrll 		clk = clk_get(&sc->sc_clkdom, imxccm_init_parents[n].clock);
    152  1.1   skrll 		KASSERT(clk != NULL);
    153  1.1   skrll 		clk_parent = clk_get(&sc->sc_clkdom, imxccm_init_parents[n].parent);
    154  1.1   skrll 		KASSERT(clk_parent != NULL);
    155  1.1   skrll 
    156  1.1   skrll 		int error = clk_set_parent(clk, clk_parent);
    157  1.1   skrll 		if (error) {
    158  1.1   skrll 			aprint_error_dev(sc->sc_dev,
    159  1.1   skrll 			    "couldn't set '%s' parent to '%s': %d\n",
    160  1.1   skrll 			    clk->name, clk_parent->name, error);
    161  1.1   skrll 		}
    162  1.1   skrll 		clk_put(clk_parent);
    163  1.1   skrll 		clk_put(clk);
    164  1.1   skrll 	}
    165  1.1   skrll }
    166  1.1   skrll 
    167  1.1   skrll static u_int
    168  1.1   skrll imxccm_clk_get_rate_pll_generic(struct imx6ccm_softc *sc, struct imx6_clk *iclk,
    169  1.1   skrll     const u_int rate_parent)
    170  1.1   skrll {
    171  1.1   skrll 	struct imx6_clk_pll *pll = &iclk->clk.pll;
    172  1.1   skrll 	uint64_t freq = rate_parent;
    173  1.1   skrll 
    174  1.1   skrll 	KASSERT((pll->type == IMX6_CLK_PLL_GENERIC) ||
    175  1.1   skrll 	    (pll->type == IMX6_CLK_PLL_USB));
    176  1.1   skrll 
    177  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog, pll->reg);
    178  1.1   skrll 	uint32_t div = __SHIFTOUT(v, pll->mask);
    179  1.1   skrll 
    180  1.1   skrll 	return freq * ((div == 1) ? 22 : 20);
    181  1.1   skrll }
    182  1.1   skrll 
    183  1.1   skrll static u_int
    184  1.1   skrll imxccm_clk_get_rate_pll_sys(struct imx6ccm_softc *sc, struct imx6_clk *iclk,
    185  1.1   skrll     const u_int rate_parent)
    186  1.1   skrll {
    187  1.1   skrll 	struct imx6_clk_pll *pll = &iclk->clk.pll;
    188  1.1   skrll 	uint64_t freq = rate_parent;
    189  1.1   skrll 
    190  1.1   skrll 	KASSERT(pll->type == IMX6_CLK_PLL_SYS);
    191  1.1   skrll 
    192  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog, pll->reg);
    193  1.1   skrll 	uint32_t div = __SHIFTOUT(v, pll->mask);
    194  1.1   skrll 
    195  1.1   skrll 	return freq * div / 2;
    196  1.1   skrll }
    197  1.1   skrll 
    198  1.1   skrll #define PLL_AUDIO_VIDEO_NUM_OFFSET	0x10
    199  1.1   skrll #define PLL_AUDIO_VIDEO_DENOM_OFFSET	0x20
    200  1.1   skrll 
    201  1.1   skrll static u_int
    202  1.1   skrll imxccm_clk_get_rate_pll_audio_video(struct imx6ccm_softc *sc,
    203  1.1   skrll     struct imx6_clk *iclk, const u_int rate_parent)
    204  1.1   skrll {
    205  1.1   skrll 	struct imx6_clk_pll *pll = &iclk->clk.pll;
    206  1.1   skrll 	uint64_t freq = rate_parent;
    207  1.1   skrll 
    208  1.1   skrll 	KASSERT(pll->type == IMX6_CLK_PLL_AUDIO_VIDEO);
    209  1.1   skrll 
    210  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog, pll->reg);
    211  1.1   skrll 	uint32_t div = __SHIFTOUT(v, pll->mask);
    212  1.1   skrll 	uint32_t num = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog,
    213  1.1   skrll 	    pll->reg + PLL_AUDIO_VIDEO_NUM_OFFSET);
    214  1.1   skrll 	uint32_t denom = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog,
    215  1.1   skrll 	    pll->reg + PLL_AUDIO_VIDEO_DENOM_OFFSET);
    216  1.1   skrll 
    217  1.1   skrll 	uint64_t tmp = freq * num / denom;
    218  1.1   skrll 
    219  1.1   skrll 	return freq * div + tmp;
    220  1.1   skrll }
    221  1.1   skrll 
    222  1.1   skrll static u_int
    223  1.1   skrll imxccm_clk_get_rate_pll_enet(struct imx6ccm_softc *sc,
    224  1.1   skrll     struct imx6_clk *iclk, const u_int rate_parent)
    225  1.1   skrll {
    226  1.1   skrll 	struct imx6_clk_pll *pll = &iclk->clk.pll;
    227  1.1   skrll 
    228  1.1   skrll 	KASSERT(pll->type == IMX6_CLK_PLL_ENET);
    229  1.1   skrll 
    230  1.1   skrll 	return pll->ref;
    231  1.1   skrll }
    232  1.1   skrll 
    233  1.1   skrll static u_int
    234  1.1   skrll imxccm_clk_get_rate_fixed_factor(struct imx6ccm_softc *sc, struct imx6_clk *iclk)
    235  1.1   skrll {
    236  1.1   skrll 	struct imx6_clk_fixed_factor *fixed_factor = &iclk->clk.fixed_factor;
    237  1.1   skrll 	struct imx6_clk *parent;
    238  1.1   skrll 
    239  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_FIXED_FACTOR);
    240  1.1   skrll 
    241  1.3  bouyer 	parent = imx6_clk_find(sc, iclk->parent);
    242  1.1   skrll 	KASSERT(parent != NULL);
    243  1.1   skrll 
    244  1.1   skrll 	uint64_t rate_parent = imxccm_clk_get_rate(sc, &parent->base);
    245  1.1   skrll 
    246  1.1   skrll 	return rate_parent * fixed_factor->mult / fixed_factor->div;
    247  1.1   skrll }
    248  1.1   skrll 
    249  1.1   skrll static u_int
    250  1.1   skrll imxccm_clk_get_rate_pll(struct imx6ccm_softc *sc, struct imx6_clk *iclk)
    251  1.1   skrll {
    252  1.1   skrll 	struct imx6_clk_pll *pll = &iclk->clk.pll;
    253  1.1   skrll 	struct imx6_clk *parent;
    254  1.1   skrll 
    255  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_PLL);
    256  1.1   skrll 
    257  1.3  bouyer 	parent = imx6_clk_find(sc, iclk->parent);
    258  1.1   skrll 	KASSERT(parent != NULL);
    259  1.1   skrll 
    260  1.1   skrll 	uint64_t rate_parent = imxccm_clk_get_rate(sc, &parent->base);
    261  1.1   skrll 
    262  1.1   skrll 	switch(pll->type) {
    263  1.1   skrll 	case IMX6_CLK_PLL_GENERIC:
    264  1.1   skrll 		return imxccm_clk_get_rate_pll_generic(sc, iclk, rate_parent);
    265  1.1   skrll 	case IMX6_CLK_PLL_SYS:
    266  1.1   skrll 		return imxccm_clk_get_rate_pll_sys(sc, iclk, rate_parent);
    267  1.1   skrll 	case IMX6_CLK_PLL_USB:
    268  1.1   skrll 		return imxccm_clk_get_rate_pll_generic(sc, iclk, rate_parent);
    269  1.1   skrll 	case IMX6_CLK_PLL_AUDIO_VIDEO:
    270  1.1   skrll 		return imxccm_clk_get_rate_pll_audio_video(sc, iclk, rate_parent);
    271  1.1   skrll 	case IMX6_CLK_PLL_ENET:
    272  1.1   skrll 		return imxccm_clk_get_rate_pll_enet(sc, iclk, rate_parent);
    273  1.1   skrll 	default:
    274  1.1   skrll 		panic("imx6: unknown pll type %d", iclk->type);
    275  1.1   skrll 	}
    276  1.1   skrll }
    277  1.1   skrll 
    278  1.1   skrll static u_int
    279  1.1   skrll imxccm_clk_get_rate_div(struct imx6ccm_softc *sc, struct imx6_clk *iclk)
    280  1.1   skrll {
    281  1.1   skrll 	struct imx6_clk_div *div = &iclk->clk.div;
    282  1.1   skrll 	struct imx6_clk *parent;
    283  1.1   skrll 
    284  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_DIV);
    285  1.1   skrll 
    286  1.3  bouyer 	parent = imx6_clk_find(sc, iclk->parent);
    287  1.1   skrll 	KASSERT(parent != NULL);
    288  1.1   skrll 
    289  1.1   skrll 	u_int rate = imxccm_clk_get_rate(sc, &parent->base);
    290  1.1   skrll 
    291  1.1   skrll 	bus_space_handle_t ioh;
    292  1.1   skrll 	if (div->base == IMX6_CLK_REG_CCM_ANALOG)
    293  1.1   skrll 		ioh = sc->sc_ioh_analog;
    294  1.1   skrll 	else
    295  1.1   skrll 		ioh = sc->sc_ioh;
    296  1.1   skrll 
    297  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, ioh, div->reg);
    298  1.1   skrll 	uint32_t n = __SHIFTOUT(v, div->mask);
    299  1.1   skrll 
    300  1.1   skrll 	if (div->type == IMX6_CLK_DIV_TABLE) {
    301  1.1   skrll 		KASSERT(div->tbl != NULL);
    302  1.1   skrll 
    303  1.1   skrll 		for (int i = 0; div->tbl[i] != 0; i++)
    304  1.1   skrll 			if (i == n)
    305  1.1   skrll 				rate /= div->tbl[i];
    306  1.1   skrll 	} else {
    307  1.1   skrll 		rate /= n + 1;
    308  1.1   skrll 	}
    309  1.1   skrll 
    310  1.1   skrll 	return rate;
    311  1.1   skrll }
    312  1.1   skrll 
    313  1.1   skrll static u_int
    314  1.1   skrll imxccm_clk_get_rate_pfd(struct imx6ccm_softc *sc, struct imx6_clk *iclk)
    315  1.1   skrll {
    316  1.1   skrll 	struct imx6_clk_pfd *pfd = &iclk->clk.pfd;
    317  1.1   skrll 	struct imx6_clk *parent;
    318  1.1   skrll 
    319  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_PFD);
    320  1.1   skrll 
    321  1.3  bouyer 	parent = imx6_clk_find(sc, iclk->parent);
    322  1.1   skrll 	KASSERT(parent != NULL);
    323  1.1   skrll 
    324  1.1   skrll 	uint64_t rate_parent = imxccm_clk_get_rate(sc, &parent->base);
    325  1.1   skrll 
    326  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog, pfd->reg);
    327  1.1   skrll 	uint32_t n = __SHIFTOUT(v, __BITS(5, 0) << (pfd->index * 8));
    328  1.1   skrll 
    329  1.1   skrll 	KASSERT(n != 0);
    330  1.1   skrll 
    331  1.1   skrll 	return (rate_parent * 18) / n;
    332  1.1   skrll }
    333  1.1   skrll 
    334  1.1   skrll static int
    335  1.1   skrll imxccm_clk_mux_wait(struct imx6ccm_softc *sc, struct imx6_clk_mux *mux)
    336  1.1   skrll {
    337  1.1   skrll 	KASSERT(mux->busy_reg == 0);
    338  1.1   skrll 	KASSERT(mux->busy_mask == 0);
    339  1.1   skrll 
    340  1.1   skrll 	bus_space_handle_t ioh;
    341  1.1   skrll 	if (mux->base == IMX6_CLK_REG_CCM_ANALOG)
    342  1.1   skrll 		ioh = sc->sc_ioh_analog;
    343  1.1   skrll 	else
    344  1.1   skrll 		ioh = sc->sc_ioh;
    345  1.1   skrll 
    346  1.1   skrll 	while (bus_space_read_4(sc->sc_iot, ioh, mux->busy_reg) & mux->busy_mask)
    347  1.1   skrll 		delay(10);
    348  1.1   skrll 
    349  1.1   skrll 	return 0;
    350  1.1   skrll }
    351  1.1   skrll 
    352  1.1   skrll static int
    353  1.1   skrll imxccm_clk_set_parent_mux(struct imx6ccm_softc *sc,
    354  1.1   skrll     struct imx6_clk *iclk, struct clk *parent)
    355  1.1   skrll {
    356  1.1   skrll 	struct imx6_clk_mux *mux = &iclk->clk.mux;
    357  1.1   skrll 	const char *pname = parent->name;
    358  1.1   skrll 	u_int sel;
    359  1.1   skrll 
    360  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_MUX);
    361  1.1   skrll 
    362  1.1   skrll 	for (sel = 0; sel < mux->nparents; sel++)
    363  1.1   skrll 		if (strcmp(pname, mux->parents[sel]) == 0)
    364  1.1   skrll 			break;
    365  1.1   skrll 
    366  1.1   skrll 	if (sel == mux->nparents)
    367  1.1   skrll 		return EINVAL;
    368  1.1   skrll 
    369  1.1   skrll 	bus_space_handle_t ioh;
    370  1.1   skrll 	if (mux->base == IMX6_CLK_REG_CCM_ANALOG)
    371  1.1   skrll 		ioh = sc->sc_ioh_analog;
    372  1.1   skrll 	else
    373  1.1   skrll 		ioh = sc->sc_ioh;
    374  1.1   skrll 
    375  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, ioh, mux->reg);
    376  1.1   skrll 	v &= ~mux->mask;
    377  1.1   skrll 	v |= __SHIFTIN(sel, mux->mask);
    378  1.1   skrll 
    379  1.1   skrll 	bus_space_write_4(sc->sc_iot, ioh, mux->reg, v);
    380  1.1   skrll 
    381  1.1   skrll 	iclk->parent = pname;
    382  1.1   skrll 
    383  1.1   skrll 	if (mux->type == IMX6_CLK_MUX_BUSY)
    384  1.1   skrll 		imxccm_clk_mux_wait(sc, mux);
    385  1.1   skrll 
    386  1.1   skrll 	return 0;
    387  1.1   skrll }
    388  1.1   skrll 
    389  1.1   skrll static struct imx6_clk *
    390  1.1   skrll imxccm_clk_get_parent_mux(struct imx6ccm_softc *sc, struct imx6_clk *iclk)
    391  1.1   skrll {
    392  1.1   skrll 	struct imx6_clk_mux *mux = &iclk->clk.mux;
    393  1.1   skrll 
    394  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_MUX);
    395  1.1   skrll 
    396  1.1   skrll 	bus_space_handle_t ioh;
    397  1.1   skrll 	if (mux->base == IMX6_CLK_REG_CCM_ANALOG)
    398  1.1   skrll 		ioh = sc->sc_ioh_analog;
    399  1.1   skrll 	else
    400  1.1   skrll 		ioh = sc->sc_ioh;
    401  1.1   skrll 
    402  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, ioh, mux->reg);
    403  1.1   skrll 	u_int sel = __SHIFTOUT(v, mux->mask);
    404  1.1   skrll 
    405  1.1   skrll 	KASSERT(sel < mux->nparents);
    406  1.1   skrll 
    407  1.1   skrll 	iclk->parent = mux->parents[sel];
    408  1.1   skrll 
    409  1.3  bouyer 	return imx6_clk_find(sc, iclk->parent);
    410  1.1   skrll }
    411  1.1   skrll 
    412  1.1   skrll static int
    413  1.1   skrll imxccm_clk_set_rate_pll(struct imx6ccm_softc *sc,
    414  1.1   skrll     struct imx6_clk *iclk, u_int rate)
    415  1.1   skrll {
    416  1.1   skrll 	/* ToDo */
    417  1.1   skrll 
    418  1.1   skrll 	return EOPNOTSUPP;
    419  1.1   skrll }
    420  1.1   skrll 
    421  1.1   skrll static int
    422  1.1   skrll imxccm_clk_set_rate_div(struct imx6ccm_softc *sc,
    423  1.1   skrll     struct imx6_clk *iclk, u_int rate)
    424  1.1   skrll {
    425  1.1   skrll 	struct imx6_clk_div *div = &iclk->clk.div;
    426  1.1   skrll 	struct imx6_clk *parent;
    427  1.1   skrll 
    428  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_DIV);
    429  1.1   skrll 
    430  1.3  bouyer 	parent = imx6_clk_find(sc, iclk->parent);
    431  1.1   skrll 	KASSERT(parent != NULL);
    432  1.1   skrll 
    433  1.1   skrll 	u_int rate_parent = imxccm_clk_get_rate(sc, &parent->base);
    434  1.1   skrll 	u_int divider = uimax(1, rate_parent / rate);
    435  1.1   skrll 
    436  1.1   skrll 	bus_space_handle_t ioh;
    437  1.1   skrll 	if (div->base == IMX6_CLK_REG_CCM_ANALOG)
    438  1.1   skrll 		ioh = sc->sc_ioh_analog;
    439  1.1   skrll 	else
    440  1.1   skrll 		ioh = sc->sc_ioh;
    441  1.1   skrll 
    442  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, ioh, div->reg);
    443  1.1   skrll 	v &= ~div->mask;
    444  1.1   skrll 	if (div->type == IMX6_CLK_DIV_TABLE) {
    445  1.1   skrll 		int n = -1;
    446  1.1   skrll 
    447  1.1   skrll 		KASSERT(div->tbl != NULL);
    448  1.1   skrll 		for (int i = 0; div->tbl[i] != 0; i++)
    449  1.1   skrll 			if (div->tbl[i] == divider)
    450  1.1   skrll 				n = i;
    451  1.1   skrll 
    452  1.1   skrll 		if (n >= 0)
    453  1.1   skrll 			v |= __SHIFTIN(n, div->mask);
    454  1.1   skrll 		else
    455  1.1   skrll 			return EINVAL;
    456  1.1   skrll 	} else {
    457  1.1   skrll 		v |= __SHIFTIN(divider - 1, div->mask);
    458  1.1   skrll 	}
    459  1.1   skrll 	bus_space_write_4(sc->sc_iot, ioh, div->reg, v);
    460  1.1   skrll 
    461  1.1   skrll 	return 0;
    462  1.1   skrll }
    463  1.1   skrll 
    464  1.1   skrll /*
    465  1.1   skrll  * CLK Driver APIs
    466  1.1   skrll  */
    467  1.1   skrll static struct clk *
    468  1.1   skrll imxccm_clk_get(void *priv, const char *name)
    469  1.1   skrll {
    470  1.1   skrll 	struct imx6_clk *iclk;
    471  1.3  bouyer 	struct imx6ccm_softc *sc = priv;
    472  1.1   skrll 
    473  1.3  bouyer 	iclk = imx6_clk_find(sc, name);
    474  1.1   skrll 	if (iclk == NULL)
    475  1.1   skrll 		return NULL;
    476  1.1   skrll 
    477  1.1   skrll 	atomic_inc_uint(&iclk->refcnt);
    478  1.1   skrll 
    479  1.1   skrll 	return &iclk->base;
    480  1.1   skrll }
    481  1.1   skrll 
    482  1.1   skrll static void
    483  1.1   skrll imxccm_clk_put(void *priv, struct clk *clk)
    484  1.1   skrll {
    485  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    486  1.1   skrll 
    487  1.1   skrll 	KASSERT(iclk->refcnt > 0);
    488  1.1   skrll 
    489  1.1   skrll 	atomic_dec_uint(&iclk->refcnt);
    490  1.1   skrll }
    491  1.1   skrll 
    492  1.1   skrll static u_int
    493  1.1   skrll imxccm_clk_get_rate(void *priv, struct clk *clk)
    494  1.1   skrll {
    495  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    496  1.1   skrll 	struct clk *parent;
    497  1.1   skrll 	struct imx6ccm_softc *sc = priv;
    498  1.1   skrll 
    499  1.1   skrll 	switch (iclk->type) {
    500  1.1   skrll 	case IMX6_CLK_FIXED:
    501  1.1   skrll 		return iclk->clk.fixed.rate;
    502  1.1   skrll 	case IMX6_CLK_FIXED_FACTOR:
    503  1.1   skrll 		return imxccm_clk_get_rate_fixed_factor(sc, iclk);
    504  1.1   skrll 	case IMX6_CLK_PLL:
    505  1.1   skrll 		return imxccm_clk_get_rate_pll(sc, iclk);
    506  1.1   skrll 	case IMX6_CLK_MUX:
    507  1.1   skrll 	case IMX6_CLK_GATE:
    508  1.1   skrll 		parent = imxccm_clk_get_parent(sc, clk);
    509  1.1   skrll 		return imxccm_clk_get_rate(sc, parent);
    510  1.1   skrll 	case IMX6_CLK_DIV:
    511  1.1   skrll 		return imxccm_clk_get_rate_div(sc, iclk);
    512  1.1   skrll 	case IMX6_CLK_PFD:
    513  1.1   skrll 		return imxccm_clk_get_rate_pfd(sc, iclk);
    514  1.1   skrll 	default:
    515  1.1   skrll 		panic("imx6: unknown clk type %d", iclk->type);
    516  1.1   skrll 	}
    517  1.1   skrll }
    518  1.1   skrll 
    519  1.1   skrll static int
    520  1.1   skrll imxccm_clk_set_rate(void *priv, struct clk *clk, u_int rate)
    521  1.1   skrll {
    522  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    523  1.1   skrll 	struct imx6ccm_softc *sc = priv;
    524  1.1   skrll 
    525  1.1   skrll 	switch (iclk->type) {
    526  1.1   skrll 	case IMX6_CLK_FIXED:
    527  1.1   skrll 	case IMX6_CLK_FIXED_FACTOR:
    528  1.1   skrll 		return ENXIO;
    529  1.1   skrll 	case IMX6_CLK_PLL:
    530  1.1   skrll 		return imxccm_clk_set_rate_pll(sc, iclk, rate);
    531  1.1   skrll 	case IMX6_CLK_MUX:
    532  1.1   skrll 		return ENXIO;
    533  1.1   skrll 	case IMX6_CLK_GATE:
    534  1.1   skrll 		return ENXIO;
    535  1.1   skrll 	case IMX6_CLK_DIV:
    536  1.1   skrll 		return imxccm_clk_set_rate_div(sc, iclk, rate);
    537  1.1   skrll 	case IMX6_CLK_PFD:
    538  1.1   skrll 		return EINVAL;
    539  1.1   skrll 	default:
    540  1.1   skrll 		panic("imx6: unknown clk type %d", iclk->type);
    541  1.1   skrll 	}
    542  1.1   skrll }
    543  1.1   skrll 
    544  1.1   skrll static int
    545  1.1   skrll imxccm_clk_enable_pll(struct imx6ccm_softc *sc, struct imx6_clk *iclk, bool enable)
    546  1.1   skrll {
    547  1.1   skrll 	struct imx6_clk_pll *pll = &iclk->clk.pll;
    548  1.1   skrll 
    549  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_PLL);
    550  1.1   skrll 
    551  1.1   skrll 	/* Power up bit */
    552  1.1   skrll 	if (pll->type == IMX6_CLK_PLL_USB)
    553  1.1   skrll 		enable = !enable;
    554  1.1   skrll 
    555  1.1   skrll 	bus_space_handle_t ioh = sc->sc_ioh_analog;
    556  1.1   skrll 	uint32_t  v = bus_space_read_4(sc->sc_iot, ioh, pll->reg);
    557  1.1   skrll 	if (__SHIFTOUT(v, pll->powerdown) != enable)
    558  1.1   skrll 		return 0;
    559  1.1   skrll 	if (enable)
    560  1.1   skrll 		v &= ~pll->powerdown;
    561  1.1   skrll 	else
    562  1.1   skrll 		v |= pll->powerdown;
    563  1.1   skrll 	bus_space_write_4(sc->sc_iot, ioh, pll->reg, v);
    564  1.1   skrll 
    565  1.1   skrll 	/* wait look */
    566  1.1   skrll 	while (!(bus_space_read_4(sc->sc_iot, ioh, pll->reg) & CCM_ANALOG_PLL_LOCK))
    567  1.1   skrll 		delay(10);
    568  1.1   skrll 
    569  1.1   skrll 	return 0;
    570  1.1   skrll }
    571  1.1   skrll 
    572  1.1   skrll static int
    573  1.1   skrll imxccm_clk_enable_gate(struct imx6ccm_softc *sc, struct imx6_clk *iclk, bool enable)
    574  1.1   skrll {
    575  1.1   skrll 	struct imx6_clk_gate *gate = &iclk->clk.gate;
    576  1.1   skrll 
    577  1.1   skrll 	KASSERT(iclk->type == IMX6_CLK_GATE);
    578  1.1   skrll 
    579  1.1   skrll 	bus_space_handle_t ioh;
    580  1.1   skrll 	if (gate->base == IMX6_CLK_REG_CCM_ANALOG)
    581  1.1   skrll 		ioh = sc->sc_ioh_analog;
    582  1.1   skrll 	else
    583  1.1   skrll 		ioh = sc->sc_ioh;
    584  1.1   skrll 
    585  1.1   skrll 	uint32_t v = bus_space_read_4(sc->sc_iot, ioh, gate->reg);
    586  1.1   skrll 	if (enable) {
    587  1.1   skrll 		if (gate->exclusive_mask)
    588  1.1   skrll 			v &= ~gate->exclusive_mask;
    589  1.1   skrll 		v |= gate->mask;
    590  1.1   skrll 	} else {
    591  1.1   skrll 		if (gate->exclusive_mask)
    592  1.1   skrll 			v |= gate->exclusive_mask;
    593  1.1   skrll 		v &= ~gate->mask;
    594  1.1   skrll 	}
    595  1.1   skrll 	bus_space_write_4(sc->sc_iot, ioh, gate->reg, v);
    596  1.1   skrll 
    597  1.1   skrll 	return 0;
    598  1.1   skrll }
    599  1.1   skrll 
    600  1.1   skrll static int
    601  1.1   skrll imxccm_clk_enable(void *priv, struct clk *clk)
    602  1.1   skrll {
    603  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    604  1.1   skrll 	struct imx6_clk *parent = NULL;
    605  1.1   skrll 	struct imx6ccm_softc *sc = priv;
    606  1.1   skrll 
    607  1.3  bouyer 	if ((parent = imx6_clk_find(sc, iclk->parent)) != NULL)
    608  1.1   skrll 		imxccm_clk_enable(sc, &parent->base);
    609  1.1   skrll 
    610  1.1   skrll 	switch (iclk->type) {
    611  1.1   skrll 	case IMX6_CLK_FIXED:
    612  1.1   skrll 	case IMX6_CLK_FIXED_FACTOR:
    613  1.1   skrll 		return 0;	/* always on */
    614  1.1   skrll 	case IMX6_CLK_PLL:
    615  1.1   skrll 		return imxccm_clk_enable_pll(sc, iclk, true);
    616  1.1   skrll 	case IMX6_CLK_MUX:
    617  1.1   skrll 	case IMX6_CLK_DIV:
    618  1.1   skrll 	case IMX6_CLK_PFD:
    619  1.1   skrll 		return 0;
    620  1.1   skrll 	case IMX6_CLK_GATE:
    621  1.1   skrll 		return imxccm_clk_enable_gate(sc, iclk, true);
    622  1.1   skrll 	default:
    623  1.1   skrll 		panic("imx6: unknown clk type %d", iclk->type);
    624  1.1   skrll 	}
    625  1.1   skrll }
    626  1.1   skrll 
    627  1.1   skrll static int
    628  1.1   skrll imxccm_clk_disable(void *priv, struct clk *clk)
    629  1.1   skrll {
    630  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    631  1.1   skrll 	struct imx6ccm_softc *sc = priv;
    632  1.1   skrll 
    633  1.1   skrll 	switch (iclk->type) {
    634  1.1   skrll 	case IMX6_CLK_FIXED:
    635  1.1   skrll 	case IMX6_CLK_FIXED_FACTOR:
    636  1.1   skrll 		return EINVAL;	/* always on */
    637  1.1   skrll 	case IMX6_CLK_PLL:
    638  1.1   skrll 		return imxccm_clk_enable_pll(sc, iclk, false);
    639  1.1   skrll 	case IMX6_CLK_MUX:
    640  1.1   skrll 	case IMX6_CLK_DIV:
    641  1.1   skrll 	case IMX6_CLK_PFD:
    642  1.1   skrll 		return EINVAL;
    643  1.1   skrll 	case IMX6_CLK_GATE:
    644  1.1   skrll 		return imxccm_clk_enable_gate(sc, iclk, false);
    645  1.1   skrll 	default:
    646  1.1   skrll 		panic("imx6: unknown clk type %d", iclk->type);
    647  1.1   skrll 	}
    648  1.1   skrll }
    649  1.1   skrll 
    650  1.1   skrll static int
    651  1.1   skrll imxccm_clk_set_parent(void *priv, struct clk *clk, struct clk *parent)
    652  1.1   skrll {
    653  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    654  1.1   skrll 	struct imx6ccm_softc *sc = priv;
    655  1.1   skrll 
    656  1.1   skrll 	switch (iclk->type) {
    657  1.1   skrll 	case IMX6_CLK_FIXED:
    658  1.1   skrll 	case IMX6_CLK_FIXED_FACTOR:
    659  1.1   skrll 	case IMX6_CLK_PLL:
    660  1.1   skrll 	case IMX6_CLK_GATE:
    661  1.1   skrll 	case IMX6_CLK_DIV:
    662  1.1   skrll 	case IMX6_CLK_PFD:
    663  1.1   skrll 		return EINVAL;
    664  1.1   skrll 	case IMX6_CLK_MUX:
    665  1.1   skrll 		return imxccm_clk_set_parent_mux(sc, iclk, parent);
    666  1.1   skrll 	default:
    667  1.1   skrll 		panic("imx6: unknown clk type %d", iclk->type);
    668  1.1   skrll 	}
    669  1.1   skrll }
    670  1.1   skrll 
    671  1.1   skrll static struct clk *
    672  1.1   skrll imxccm_clk_get_parent(void *priv, struct clk *clk)
    673  1.1   skrll {
    674  1.1   skrll 	struct imx6_clk *iclk = (struct imx6_clk *)clk;
    675  1.1   skrll 	struct imx6_clk *parent = NULL;
    676  1.1   skrll 	struct imx6ccm_softc *sc = priv;
    677  1.1   skrll 
    678  1.1   skrll 	switch (iclk->type) {
    679  1.1   skrll 	case IMX6_CLK_FIXED:
    680  1.1   skrll 	case IMX6_CLK_FIXED_FACTOR:
    681  1.1   skrll 	case IMX6_CLK_PLL:
    682  1.1   skrll 	case IMX6_CLK_GATE:
    683  1.1   skrll 	case IMX6_CLK_DIV:
    684  1.1   skrll 	case IMX6_CLK_PFD:
    685  1.1   skrll 		if (iclk->parent != NULL)
    686  1.3  bouyer 			parent = imx6_clk_find(sc, iclk->parent);
    687  1.1   skrll 		break;
    688  1.1   skrll 	case IMX6_CLK_MUX:
    689  1.1   skrll 		parent = imxccm_clk_get_parent_mux(sc, iclk);
    690  1.1   skrll 		break;
    691  1.1   skrll 	default:
    692  1.1   skrll 		panic("imx6: unknown clk type %d", iclk->type);
    693  1.1   skrll 	}
    694  1.1   skrll 
    695  1.1   skrll 	return (struct clk *)parent;
    696  1.1   skrll }
    697