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imx6_gpc.c revision 1.1 
      1 /*	$NetBSD: imx6_gpc.c,v 1.1 2020/12/23 14:42:38 skrll Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
      5  * Written by Hashimoto Kenichi for Genetec Corporation.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: imx6_gpc.c,v 1.1 2020/12/23 14:42:38 skrll Exp $");
     31 
     32 #include "opt_fdt.h"
     33 
     34 #include <sys/param.h>
     35 #include <sys/bus.h>
     36 #include <sys/device.h>
     37 
     38 #include <dev/fdt/fdtvar.h>
     39 
     40 #include <arm/cortex/gic_intr.h>
     41 #include <arm/nxp/imx6_gpcreg.h>
     42 
     43 struct imxgpc_softc {
     44 	device_t sc_dev;
     45 
     46 	bus_space_tag_t sc_iot;
     47 	bus_space_handle_t sc_ioh;
     48 };
     49 
     50 static int imxgpc_match(device_t, struct cfdata *, void *);
     51 static void imxgpc_attach(device_t, device_t, void *);
     52 
     53 static void *imxgpc_establish(device_t, u_int *, int, int,
     54     int (*)(void *), void *);
     55 static void imxgpc_disestablish(device_t, void *);
     56 static bool imxgpc_intrstr(device_t, u_int *, char *, size_t);
     57 
     58 struct fdtbus_interrupt_controller_func imxgpc_funcs = {
     59 	.establish = imxgpc_establish,
     60 	.disestablish = imxgpc_disestablish,
     61 	.intrstr = imxgpc_intrstr
     62 };
     63 
     64 CFATTACH_DECL_NEW(imxgpc, sizeof(struct imxgpc_softc),
     65     imxgpc_match, imxgpc_attach, NULL, NULL);
     66 
     67 static int
     68 imxgpc_match(device_t parent, cfdata_t cf, void *aux)
     69 {
     70 	const char * const compatible[] = { "fsl,imx6q-gpc", NULL };
     71 	struct fdt_attach_args * const faa = aux;
     72 
     73 	return of_match_compatible(faa->faa_phandle, compatible);
     74 }
     75 
     76 static void
     77 imxgpc_attach(device_t parent, device_t self, void *aux)
     78 {
     79 	struct imxgpc_softc * const sc = device_private(self);
     80 	struct fdt_attach_args * const faa = aux;
     81 	const int phandle = faa->faa_phandle;
     82 	bus_addr_t gpc_addr;
     83 	bus_size_t gpc_size;
     84 	int error;
     85 
     86 	if (fdtbus_get_reg(phandle, 0, &gpc_addr, &gpc_size) != 0) {
     87 		aprint_error(": couldn't get gpc registers\n");
     88 		return;
     89 	}
     90 
     91 	sc->sc_dev = self;
     92 	sc->sc_iot = faa->faa_bst;
     93 
     94 	error = bus_space_map(sc->sc_iot, gpc_addr, gpc_size, 0,
     95 	    &sc->sc_ioh);
     96 	if (error) {
     97 		aprint_error(": couldn't map gpc registers: %d\n", error);
     98 		return;
     99 	}
    100 
    101 	error = fdtbus_register_interrupt_controller(self, faa->faa_phandle,
    102 	    &imxgpc_funcs);
    103 	if (error) {
    104 		aprint_error(": couldn't register with fdtbus: %d\n", error);
    105 		return;
    106 	}
    107 
    108 	aprint_naive("\n");
    109 	aprint_normal(": General Power Controller\n");
    110 
    111 	return;
    112 }
    113 
    114 static void *
    115 imxgpc_establish(device_t dev, u_int *specifier, int ipl, int flags,
    116     int (*func)(void *), void *arg)
    117 {
    118 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
    119 	/* 2nd cell is the interrupt number */
    120 	/* 3rd cell is flags */
    121 
    122 	const u_int type = be32toh(specifier[0]);
    123 	const u_int intr = be32toh(specifier[1]);
    124 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
    125 	const u_int trig = be32toh(specifier[2]) & 0xf;
    126 	const u_int level = (trig & 0x3) ? IST_EDGE : IST_LEVEL;
    127 
    128 	const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
    129 
    130 	aprint_debug_dev(dev, "intr establish irq %d, level %d\n", irq, level);
    131 	return intr_establish(irq, ipl, level | mpsafe, func, arg);
    132 }
    133 
    134 static void
    135 imxgpc_disestablish(device_t dev, void *ih)
    136 {
    137 	intr_disestablish(ih);
    138 }
    139 
    140 static bool
    141 imxgpc_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen)
    142 {
    143 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
    144 	/* 2nd cell is the interrupt number */
    145 	/* 3rd cell is flags */
    146 
    147 	if (!specifier)
    148 		return false;
    149 
    150 	const u_int type = be32toh(specifier[0]);
    151 	const u_int intr = be32toh(specifier[1]);
    152 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
    153 
    154 	snprintf(buf, buflen, "irq %d", irq);
    155 
    156 	return true;
    157 }
    158