1 1.3 thorpej /* $NetBSD: imx6_pwm.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $ */ 2 1.1 skrll /*- 3 1.1 skrll * Copyright (c) 2019 Genetec Corporation. All rights reserved. 4 1.1 skrll * Written by Hashimoto Kenichi for Genetec Corporation. 5 1.1 skrll * 6 1.1 skrll * Redistribution and use in source and binary forms, with or without 7 1.1 skrll * modification, are permitted provided that the following conditions 8 1.1 skrll * are met: 9 1.1 skrll * 1. Redistributions of source code must retain the above copyright 10 1.1 skrll * notice, this list of conditions and the following disclaimer. 11 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 skrll * notice, this list of conditions and the following disclaimer in the 13 1.1 skrll * documentation and/or other materials provided with the distribution. 14 1.1 skrll * 15 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.1 skrll * SUCH DAMAGE. 26 1.1 skrll */ 27 1.1 skrll 28 1.1 skrll #include <sys/cdefs.h> 29 1.3 thorpej __KERNEL_RCSID(0, "$NetBSD: imx6_pwm.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $"); 30 1.1 skrll 31 1.1 skrll #include <sys/types.h> 32 1.1 skrll #include <sys/param.h> 33 1.1 skrll #include <sys/bus.h> 34 1.1 skrll #include <sys/device.h> 35 1.1 skrll 36 1.1 skrll #include <arm/imx/imxpwmvar.h> 37 1.1 skrll 38 1.1 skrll #include <dev/fdt/fdtvar.h> 39 1.1 skrll 40 1.1 skrll struct imxpwm_fdt_softc { 41 1.1 skrll struct imxpwm_softc sc_imxpwm; /* Must be first */ 42 1.1 skrll }; 43 1.1 skrll 44 1.1 skrll static int imx6_pwm_match(device_t, cfdata_t, void *); 45 1.1 skrll static void imx6_pwm_attach(device_t, device_t, void *); 46 1.1 skrll 47 1.1 skrll CFATTACH_DECL_NEW(imxpwm_fdt, sizeof(struct imxpwm_fdt_softc), 48 1.1 skrll imx6_pwm_match, imx6_pwm_attach, NULL, NULL); 49 1.1 skrll 50 1.1 skrll static pwm_tag_t 51 1.1 skrll imxpwm_get_tag(device_t dev, const void *data, size_t len) 52 1.1 skrll { 53 1.1 skrll struct imxpwm_fdt_softc * const ifsc = device_private(dev); 54 1.1 skrll struct imxpwm_softc * const sc = &ifsc->sc_imxpwm; 55 1.1 skrll const u_int *pwm = data; 56 1.1 skrll 57 1.1 skrll if (len < 12) 58 1.1 skrll return NULL; 59 1.1 skrll 60 1.1 skrll const u_int index = be32toh(pwm[1]); 61 1.1 skrll if (index != 0) 62 1.1 skrll return NULL; 63 1.1 skrll const u_int period = be32toh(pwm[2]); 64 1.1 skrll 65 1.1 skrll sc->sc_conf.period = period; 66 1.1 skrll if (len >= 16) { 67 1.1 skrll const u_int polarity = be32toh(pwm[3]); 68 1.1 skrll sc->sc_conf.period = polarity ? PWM_ACTIVE_LOW : PWM_ACTIVE_HIGH; 69 1.1 skrll } 70 1.1 skrll 71 1.1 skrll return &sc->sc_pwm; 72 1.1 skrll } 73 1.1 skrll 74 1.1 skrll static struct fdtbus_pwm_controller_func imxpwm_funcs = { 75 1.1 skrll .get_tag = imxpwm_get_tag 76 1.1 skrll }; 77 1.1 skrll 78 1.3 thorpej static const struct device_compatible_entry compat_data[] = { 79 1.3 thorpej { .compat = "fsl,imx6q-pwm" }, 80 1.3 thorpej DEVICE_COMPAT_EOL 81 1.3 thorpej }; 82 1.3 thorpej 83 1.1 skrll static int 84 1.1 skrll imx6_pwm_match(device_t parent, cfdata_t cf, void *aux) 85 1.1 skrll { 86 1.1 skrll struct fdt_attach_args * const faa = aux; 87 1.1 skrll 88 1.3 thorpej return of_compatible_match(faa->faa_phandle, compat_data); 89 1.1 skrll } 90 1.1 skrll 91 1.1 skrll void 92 1.1 skrll imx6_pwm_attach(device_t parent, device_t self, void *aux) 93 1.1 skrll { 94 1.1 skrll struct imxpwm_fdt_softc * const ifsc = device_private(self); 95 1.1 skrll struct imxpwm_softc * const sc = &ifsc->sc_imxpwm; 96 1.1 skrll struct fdt_attach_args * const faa = aux; 97 1.1 skrll const int phandle = faa->faa_phandle; 98 1.1 skrll char intrstr[128]; 99 1.1 skrll bus_addr_t addr; 100 1.1 skrll bus_size_t size; 101 1.1 skrll int error; 102 1.1 skrll 103 1.1 skrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 104 1.1 skrll aprint_error(": couldn't get PWM registers\n"); 105 1.1 skrll return; 106 1.1 skrll } 107 1.1 skrll 108 1.1 skrll sc->sc_dev = self; 109 1.1 skrll sc->sc_iot = faa->faa_bst; 110 1.1 skrll 111 1.1 skrll error = bus_space_map(sc->sc_iot, addr, size, 0, 112 1.1 skrll &sc->sc_ioh); 113 1.1 skrll if (error) { 114 1.1 skrll aprint_error(": couldn't map gpc registers: %d\n", error); 115 1.1 skrll return; 116 1.1 skrll } 117 1.1 skrll 118 1.1 skrll if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 119 1.1 skrll aprint_error_dev(self, "failed to decode interrupt\n"); 120 1.1 skrll return; 121 1.1 skrll } 122 1.1 skrll 123 1.2 jmcneill sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 124 1.2 jmcneill 0, imxpwm_intr, sc, device_xname(self)); 125 1.1 skrll if (sc->sc_ih == NULL) { 126 1.1 skrll aprint_error_dev(self, "failed to establish interrupt on %s\n", 127 1.1 skrll intrstr); 128 1.1 skrll return; 129 1.1 skrll } 130 1.1 skrll aprint_normal_dev(self, "interrupting on %s\n", intrstr); 131 1.1 skrll 132 1.1 skrll sc->sc_clk = fdtbus_clock_get(phandle, "per"); 133 1.1 skrll if (sc->sc_clk == NULL) { 134 1.1 skrll aprint_error(": couldn't get clk\n"); 135 1.1 skrll return; 136 1.1 skrll } 137 1.1 skrll sc->sc_freq = clk_get_rate(sc->sc_clk); 138 1.1 skrll 139 1.1 skrll imxpwm_attach_common(sc); 140 1.1 skrll 141 1.1 skrll fdtbus_register_pwm_controller(self, phandle, 142 1.1 skrll &imxpwm_funcs); 143 1.1 skrll 144 1.1 skrll return; 145 1.1 skrll } 146 1.1 skrll 147