1 1.1 skrll /* $NetBSD: imx6_usbphyreg.h,v 1.1 2020/12/23 14:42:38 skrll Exp $ */ 2 1.1 skrll 3 1.1 skrll /* 4 1.1 skrll * Copyright (c) 2017 Genetec Corporation. All rights reserved. 5 1.1 skrll * Written by Hashimoto Kenichi for Genetec Corporation. 6 1.1 skrll * 7 1.1 skrll * Redistribution and use in source and binary forms, with or without 8 1.1 skrll * modification, are permitted provided that the following conditions 9 1.1 skrll * are met: 10 1.1 skrll * 1. Redistributions of source code must retain the above copyright 11 1.1 skrll * notice, this list of conditions and the following disclaimer. 12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 skrll * notice, this list of conditions and the following disclaimer in the 14 1.1 skrll * documentation and/or other materials provided with the distribution. 15 1.1 skrll * 16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 1.1 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.1 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.1 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 1.1 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.1 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.1 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.1 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.1 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.1 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1 skrll * POSSIBILITY OF SUCH DAMAGE. 27 1.1 skrll */ 28 1.1 skrll 29 1.1 skrll #ifndef _ARM_NXP_IMX6_USBPHYREG_H 30 1.1 skrll #define _ARM_NXP_IMX6_USBPHYREG_H 31 1.1 skrll 32 1.1 skrll #include <sys/cdefs.h> 33 1.1 skrll 34 1.1 skrll #define USBPHY_PWD 0x00000000 35 1.1 skrll #define USBPHY_PWD_SET 0x00000004 36 1.1 skrll #define USBPHY_PWD_CLR 0x00000008 37 1.1 skrll #define USBPHY_PWD_TOG 0x0000000c 38 1.1 skrll #define USBPHY_TX 0x00000010 39 1.1 skrll #define USBPHY_TX_SET 0x00000014 40 1.1 skrll #define USBPHY_TX_CLR 0x00000018 41 1.1 skrll #define USBPHY_TX_TOG 0x0000001c 42 1.1 skrll #define USBPHY_TX_USBPHY_TX_EDGECTRL __BITS(28, 26) 43 1.1 skrll #define USBPHY_TX_TXCAL45DP __BITS(19, 16) 44 1.1 skrll #define USBPHY_TX_TXCAL45DN __BITS(11, 8) 45 1.1 skrll #define USBPHY_TX_D_CAL __BITS(3, 0) 46 1.1 skrll #define USBPHY_RX 0x00000020 47 1.1 skrll #define USBPHY_RX_SET 0x00000024 48 1.1 skrll #define USBPHY_RX_CLR 0x00000028 49 1.1 skrll #define USBPHY_RX_TOG 0x0000002c 50 1.1 skrll #define USBPHY_CTRL 0x00000030 51 1.1 skrll #define USBPHY_CTRL_SET 0x00000034 52 1.1 skrll #define USBPHY_CTRL_CLR 0x00000038 53 1.1 skrll #define USBPHY_CTRL_TOG 0x0000003c 54 1.1 skrll #define USBPHY_CTRL_SFTRST __BIT(31) 55 1.1 skrll #define USBPHY_CTRL_CLKGATE __BIT(30) 56 1.1 skrll #define USBPHY_CTRL_ENUTMILEVEL3 __BIT(15) 57 1.1 skrll #define USBPHY_CTRL_ENUTMILEVEL2 __BIT(14) 58 1.1 skrll #define USBPHY_STATUS 0x00000040 59 1.1 skrll #define USBPHY_DEBUG 0x00000050 60 1.1 skrll #define USBPHY_DEBUG0_STATUS 0x00000060 61 1.1 skrll #define USBPHY_DEBUG1 0x00000070 62 1.1 skrll #define USBPHY_VERSION 0x00000080 63 1.1 skrll 64 1.1 skrll #endif /* _ARM_NXP_IMX6_USBPHYREG_H */ 65